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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Operational testing of prototype 4H-SiC JFET ICs across an unrivaled ambient temperature span in excess of 1000 °C, from -190 °C to +812 °C, has been demonstrated without any change/adjustment of input signal levels or power supply voltages. This unique ability is expected to simplify infusion of this IC technology into a broader range of beneficial applications.
The prospects for beneficial infusion of integrated circuits (ICs) into previously inaccessible extreme-temperature application environments has increased with recent NASA Glenn demonstrations of 4H-SiC Junction Field Effect Transistor & Resistor (JFET-R) chips functioning for over a year at 500 °C in air ambient [1]. This paper focuses on fabrication process choices believed key to demonstrated 500 °C durability that must be considered when porting this uniquely durable IC capability into commercial foundry manufacturing.
All prior reports of long-term 500 °C operation of SiC JFET-R ICs have noted the existence of an initial “burn-in” period of changes in measured electrical characteristics for the first few hundred hours oven-testing. This work reports measurements of “burn-in parasitic MOSFET conduction” that can substantially impact the performance of some circuits during initial heat-up of JFET ICs, but then subsequently disappears after a few hours of operation at 500 °C. The behavior appears generally consistent with the known MOS phenomenon of bias-temperature driven redistribution of mobile ionic contamination. Approaches for further mitigating this initial burn-in conduction mechanism are discussed.
All prior reports of long-term 500 °C operation of SiC JFET-R ICs have noted the existence of an initial “burn-in” period of changes in measured electrical characteristics for the first few hundred hours oven-testing. This work reports measurements of “burn-in parasitic MOSFET conduction” that can substantially impact the performance of some circuits during initial heat-up of JFET ICs, but then subsequently disappears after a few hours of operation at 500 °C.
Feasibility of using liquid fluorine and oxygen /FLOX/ as oxidizer to improve performance of Saturn S-IC stage
Vibration, shock, and acoustic test requirements and procedures for qualification of Saturn S-IC stage components
Scale model acoustical tests for predicting performance of S-IC static test facility sound suppressor
Method for determining axial and angular motion of each bellows in S-IC feed system of Saturn vehicle
Titanium alloy skin section for Saturn S-IC FUEL tank
Structural analysis, design, and development of titanium alloy skin section for Saturn S-IC STAGE
Stability of Saturn S-IC stage open loop propellant hydraulic system
Wind tunnel testing of thermal and pressure in base of Saturn S-IC booster
Study of stability of S-IC open loop propellant hydraulic system
Saturn S-IC open-loop propellant-hydraulic system study
Design and processing development, and tooling and fabrication plan for S-IC fuel tank Y-ring segment
Saturn V S-IC electron beam welding system
Cryogenic stretch form helium bottles for Saturn V S-IC vehicle
We present color-magnitude diagrams and luminosity functions of stars in the nearby galaxy IC 10, based on VI CCD photometry acquired with the COSMIC prime-focus camera on the Palomer 5m telescope.