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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Life cycle energy demand and carbon emissions of scalable single-junction and tandem perovskite PV

Perovskite photovoltaics reached record efficiencies in the laboratory and, if sustainably commercialized, they would accelerate a green energy transition. Here, this article presents the development of life-cycle inventory material and energy databases of most promising four single-junction and three tandem scalable perovskite systems with assumptions regarding scalable production validated by industry experts. We conducted comprehensive “ex ante” Life Cycle Analysis (LCA) and Net Energy Analysis, analyzing their cumulative energy demand, global warming potential profiles, energy payback times and energy return on investment (EROI). LCA contribution analysis elucidates the most impactful material and process choices. It shows that solution-based perovskite manufacturing would have lower environmental impact than vapor-based methods, and that roll-to-roll (RtR) printing offers the lowest impact. Among material choices, MoOx/Al has lower impact than Ag, and fluorine-tin-oxide lower than indium-tin-oxide. Furthermore, we compare perovskites with commercial crystalline-silicon and thin-film PV, accounting for the most recent developments in crystalline-Si wafer production and differences in life expectancies and efficiencies. It is shown that perovskite systems produced with RtR manufacturing could reach in only 12 years of life the same EROI as that of single-crystalline-Si PV lasting 30-years. This work lays a foundation for sustainability investigations of perovskite large-scale deployment.

14 SOLAR ENERGY↗
DOE OSTI2024

Multiphysics Co-Optimization Design and Analysis of Double-Side Cooled Silicon Carbide-Based Power Module: Preprint

With the rapid growth of Electric Vehicles (EVs) and Hybrid Electric Vehicles (HEVs), much more rigorous design targets have been set for automotive power electronics, including high power density, high reliability, and low cost. Novel power module and inverter technologies based on wide bandgap (WEG) semiconductors have been developed to meet these design targets, while providing optimal power semiconductor operating temperature and promising thermomechanical performance. Compared with conventional cooling techniques which are normally applied only on one side of power module, double-side cooling approach is now believed to be the solution to enable high power density and low thermal resistance of WEG semiconductor-based power electronics. In this work, we develop a three-phase power module that is double-sided cooled using dielectric fluid jet impingement. In each phase, four silicon carbide (SiC) power semiconductors are bonded to copper busbars without electrical insulation layers. A finite element analysis (FEA) model is created for thermal and thermomechanical analysis. Based on FEA modeling results, we select particular dimensions for a parametric study to optimize thermal and mechanical performance. Using a multi-objective genetic algorithm (MOGA)-based optimization method, we have minimized the maximum junction temperature and thermal stresses within the power module. The multiphysics co-optimization approach has enabled an efficient design process of power modules with greatly reduced computational cost, as compared to conventional processes that rely on exhaustive numerical simulations and iterations.

ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2020

Localization and reduction of superconducting quantum coherent circuit losses

Quantum sensing and computation can be realized with superconducting microwave circuits. Qubits are engineered quantum systems of capacitors and inductors with non-linear Josephson junctions. They operate in the single-excitation quantum regime, photons of $27 \mu$eV at 6.5 GHz. Quantum coherence is fundamentally limited by materials defects, in particular atomic-scale parasitic two-level systems (TLS) in amorphous dielectrics at circuit interfaces.[1] The electric fields driving oscillating charges in quantum circuits resonantly couple to TLS, producing phase noise and dissipation. We use coplanar niobium-on-silicon superconducting resonators to probe decoherence in quantum circuits. By selectively modifying interface dielectrics, we show that most TLS losses come from the silicon surface oxide, and most non-TLS losses are distributed throughout the niobium surface oxide. Through post-fabrication interface modification we reduced TLS losses by 85% and non-TLS losses by 72%, obtaining record single-photon resonator quality factors above 5 million and approaching a regime where non-TLS losses are dominant. [1]M\"uller, C., Cole, J. H. & Lisenfeld, J. Towards understanding two-level-systems in amorphous solids: insights from quantum circuits. Rep. Prog. Phys. 82, 124501 (2019)

Altoé, M Virginia P↗
DOE OSTI2025

Synchronous detection of cosmic rays and correlated errors in superconducting qubit arrays

Quantum information processing at scale will require sufficiently stable and long-lived qubits, likely enabled by error-correction codes. Several recent superconducting-qubit experiments, however, reported observing intermittent spatiotemporally correlated errors that would be problematic for conventional codes, with ionizing radiation being a likely cause. Here, we directly measured the cosmic-ray contribution to spatiotemporally correlated qubit errors. We accomplished this by synchronously monitoring cosmic-ray detectors and qubit energy-relaxation dynamics of 10 transmon qubits distributed across a 5 × 5 × 0.35 mm 3 silicon chip. Cosmic rays caused correlated errors at a rate of $1/\left(592\begin{array}{c}+48\\ -41\end{array}\,{\rm{s}}\right)$, accounting for 17.1 ± 1.3% of all such events. Our qubits responded to essentially all of the cosmic rays and their secondary particles incident on the chip, consistent with the independently measured arrival flux. Moreover, we observed that the landscape of the superconducting gap in proximity to the Josephson junctions dramatically impacts the qubit response to cosmic rays. Given the practical difficulties associated with shielding cosmic rays, our results indicate the importance of radiation hardening—for example, superconducting gap engineering—to the realization of robust quantum error correction.

Science & Technology - Other Topics↗
DOE OSTI2026

Ultra-low thermal resistance and pressure drop copper and copper-tungsten diamond-shaped pin fin cold plates for liquid cooling of electronics

Modern and future data centers face increasing cooling challenges due to increasing chip thermal design power and die size, along with the need to reduce energy consumption used for cooling. High performance cooling solutions that maintain a low chip junction temperature are needed to ensure electronics reliability. This work develops an ultra-low thermal resistance and low pressure drop 75 mm × 75 mm cold plate, intended for next-generation electronics cooling. The cold plate features an array of diamond-shaped pin fins and integrated copper tungsten heat spreader, selected for its low coefficient of thermal expansion which reduces thermomechanical deformation and allows for closer integration of the cold plate with silicon dies. Starting with 300 candidate designs, three-dimensional computational fluid dynamics simulations predict the thermal-hydraulic performance of cold plate subsections. The highest performing geometries are evaluated with high fidelity simulations. Four cold plates are manufactured for experiments: three with diamond-shaped pin fins and one with straights fins for comparison purposes. The cold plates are fabricated from copper-tungsten (CuW), copper (Cu), or aluminum-silicon-magnesium alloy (AlSi10Mg). The diamond-shaped pin fins achieve a roughly 15 % lower thermal resistance compared to the conventional straight fin microchannel. The highest performing design achieves a chip-to-coolant (including thermal interface material) thermal resistance of 9.0 K/kW in CuW and 6.9 K/kW in Cu under a 1 kW heat load with an inlet-to-outlet pressure drop of 9.0 kPa and water as the working fluid. This work demonstrates ultra-low thermal resistance and pressure drop cold plates for large die, high heat load applications, and shows that CuW is an attractive cold plate material for improved reliability in next generation data center cooling.

Coefficient of thermal expansion↗
DOE OSTI2020

In-Situ Measurement of Power Loss for Crystalline Silicon Modules Undergoing Thermal Cycling and Mechanical Loading Stress Testing

An in-situ method is proposed for monitoring and estimating the power degradation of mc-Si photovoltaic (PV) modules undergoing thermo-mechanical degradation tests that primarily manifest through cell cracking, such as mechanical load tests, thermal cycling and humidity freeze tests. The method is based on in-situ measurement of the module’s dark current-voltage (I-V) characteristic curve during the stress test, as well as initial and final module flash testing on a Sun simulator. The method uses superposition of the dark I-V curve with final flash test module short-circuit current to account for shunt and junction recombination losses, as well as series resistance estimation from the in-situ measured dark I-Vs and final flash test measurements. The method is developed based on mc-Si standard modules undergoing several stages of thermo-mechanical stress testing and degradation, for which we investigate the impact of the degradation on the modules light I-V curve parameters, and equivalent solar cell model parameters. Experimental validation of the method on the modules tested shows good agreement between the in-situ estimated power degradation and the flash test measured power loss of the modules, of up to 4.31 % error (RMSE), as the modules experience primarily junction defect recombination and increased series resistance losses. However, the application of the method will be limited for modules experiencing extensive photo-current degradation or delamination, which are not well reflected in the dark I-V characteristic of the PV module.

14 SOLAR ENERGY↗
DOE OSTI2026

Material-dependent photon ionizing radiation effects in Si and GaAs PIN diodes: A numerical investigation

We present a finite-element drift-diffusion-Poisson model in the Multiphysics Object-Oriented Simulation Environment (MOOSE) framework to compare the radiation response of silicon (Si) and gallium arsenide (GaAs) PIN diodes under high-energy photon irradiation. The model solves coupled carrier continuity and Poisson’s equations with Shockley-Read-Hall recombination, and is verified against standard analytical J-V behavior. Using a simplified 1D geometry with ideal Ohmic contacts, we quantify device response under forward and reverse bias with a 100 MeV photon flux. Under forward bias, Si exhibits markedly greater radiation sensitivity than GaAs, including larger increases in current density, stronger local field and carrier-product perturbations, and higher recombination. Under reverse bias, GaAs shows larger radiation-induced photocurrent and broader current-density peaks near junctions, indicating an advantage for photodetection. Integrated steady-state recombination is consistently higher in Si across voltages. Under periodic photon pulses, GaAs produces higher-amplitude photoresponse and settles more rapidly than Si. These results highlight material-dependent trade-offs for radiation-tolerant, high-speed optoelectronics and provide guidance for selecting PIN architectures in aerospace, nuclear, and high-energy physics environments.

36 MATERIALS SCIENCE↗
DOE OSTI2024

SQMS science advances impact on Rigetti commercial processors

The collaboration between the Superconducting Quantum Materials and Systems Center (SQMS) and Rigetti Computing produced several advancements in our understanding of the role of materials characteristics in quantum processor performance. This partnership leverages SQMS's extensive characterization infrastructure and cutting-edge research in materials, and Rigetti's expertise in quantum hardware and robust nanofabrication to improve precision and performance of Rigetti's test QPUs. Qubit frequency is determined in large part by the properties of Josephson junctions (JJs) made of amorphous oxide tunnel barriers; the Alternating-Bias Assisted Annealing (ABAA) process allows us to tune JJs to their desired frequency [1]. Work by SQMS researchers in characterizing high-precision JJs post-processed (using ABAA) have yielded crucial information on the nature of the structure and chemical bonding uniformity of the ABAA processed amorphous oxides. Performance has also been improved through a comprehensive series of experiments that tested encapsulation and surface treatment. Encapsulation of the niobium metal layer with tantalum resulted in an T1 improvement of 80%, experimentally confirming the role of Nb surface losses in qubit performance [2]. Pre-treatment of the underlying silicon surface prior to JJ fabrication by replacing a buffered oxide etch (BOE) with hydrofluoric acid (HF) followed by aqueous ammonium fluoride (NH4F) has shown a statistically significant improvement of T1 by 22%, and reduction in the number of strongly-coupled TLS [3]. These examples, as well as many other published and ongoing investigations, demonstrate the mutual benefits that come from Rigetti's involvement in the SQMS collaboration. [1] - Pappas, D.P., et al. (2024). https://doi.org/10.1038/s43246-024-00596-z [2] - Bal, M., et al. (2024). https://doi.org/10.1038/s41534-024-00840-x [3] Kopas, C. J. et al. Preprint at https://doi.org/10.48550/arXiv.2408.02863 (2024).

Lachman, Ella↗
DOE OSTI2022

A PCB-Embedded 1.2 kV SiC MOSFET Half-Bridge Package for a 22 kW AC–DC Converter

This article presents the design and analysis of a double-side-cooled printed circuit board (PCB) embedded silicon carbide (SiC) MOSFET half-bridge package with low loop inductances and an integrated gate driver. The 1.2 kV SiC MOSFET dies used in the half-bridge package are embedded in the PCB using AT&S's patented technique. The dies are cooled and electrically connected to traces in the PCB through copper-filled microvias. The design methodology accounts for both electrical and thermal performance, limiting the power-loop inductance to 2.3 nH and the maximum package temperature to less than the 175 °C limit. The integration of the gate drive circuitry allows for a high power density and 2.2 nH gate-loop inductances. At 0.12 K/W, the measured junction-to-case thermal resistance with double-sided cooling is 57% lower than that of a TO-247 package. Under similar operating conditions, the PCB-embedded half-bridge package also achieves a 5.6 times lower voltage overshoot and a 0.5% higher peak efficiency than a TO-247-based half-bridge. This article reports the first demonstration of PCB-embedded 1.2 kV SiC MOSFET packages in buck, boost, and ac–dc converters. Furthermore, the prototype three-phase ac–dc converter for an electric vehicle on-board charger is composed of six PCB-embedded half-bridge packages and achieves an efficiency of 98.2% and a power density of 182 W/in 3 .

42 ENGINEERING↗
DOE OSTI2023

Structure and Electronic Properties of Mesopores in Si PV Devices with PLEO Contacts

All current state-of-the-art silicon photovoltaic (PV) devices employ some flavor of passivating contact structure to minimize detrimental recombination while providing good conductivity. These properties are most often provided by a dielectric layer (SiNx, Al2O3, or SiOx) that is in contact with the crystalline silicon (c-Si) substrate. The effectiveness of these layers is heavily dependent on the nanoscale structure of both the dielectric layers and the crystalline silicon interface. As an example, the tunneling probability for charge carriers across thin SiOx layers, a process that is critical to maintain high conductivity, is extremely sensitive to the SiOx thickness. SiOx with a thickness below 2 nm readily allows charge carrier tunneling, whereas it is impeded for greater thicknesses. In the latter case it has been shown that modifications to the thermal processing schedule can induce disruptions, or pinholes, in thick SiOx layers that allow transport of charge carriers while maintaining excellent passivation. However, this requires higher temperatures processes that may inhibit widespread adoption by industry. Recently, another option has been presented that may circumvent the necessity for high temperature processing, namely metal assisted chemical etching (MACE). MACE relies on deposition of Ag nanoparticles onto the SiOx layers with subsequent electroless etching to form mesopores in the SiOx layers that are analogous to the pinholes created with high temperature processing. The size and density can be controlled based on the Ag nanoparticle deposition conditions. The resulting contact structure is known as polysilicon on locally etched oxide (PLEO) contacts. The nanoscale structure of the mesopores in PLEO contacts define the device level observables such as recombination current (Jo) and junction resistance. In this work we present atomic resolution transmission electron microscopy (TEM) analysis of mesopores in PLEO contacts formed with a different processing conditions to connect provide insight into how the nanoscale structure of the SiOx layer influences PV device properties. Additionally, we have previously used electron beam induced current (EBIC) to probe local transport properties in Si PV devices with a SiOx layer containing pinholes due to high temperature processing. Using EBIC we were able to directly show the enhance charge carrier transport through the pinholes. Here we also employ EBIC to study non-uniformities in charge carrier recombination and transport associated with mesopores in PLEO contacts and compare these results with our previous work on devices with pinholes in the SiOx formed through high temperature processes. The products of this work provide critical information that is required to both further optimize performance of Si PV devices with PLEO contact and to drive future adoption of this technology by industry.

ENGINEERING,SOLAR ENERGY↗
DOE OSTI2020

Design, Analysis, Comparison, and Experimental Validation of Insulated Metal Substrates for High-Power Wide-Bandgap Power Modules

Direct bonded copper (DBC) substrates used in power modules have limited heat spreading and manufacturing capability due to ceramic properties and manufacturing technology. The ceramic and copper bonding is also subject to high mechanical stress due to coefficient of thermal expansion mismatch between the copper and the ceramic. For wide-bandgap (WBG) devices, it is of interest exploring new substrate technologies that can overcome some of the challenges of direct bonded copper substrates. In this technical paper, the design, analysis, and comparison of insulated metal substrates (IMSs) for high-power wide-bandgap semiconductor-based power modules are discussed. This paper starts with technical description and discussion of state-of-the-art DBC substrates with different ceramic insulators such as aluminum nitride (AlN), Al 2 O 3 , and Si 3 N 4 . Next, an introduction of IMSs and their material properties, and a design approach for SiC (silicon carbide) metal-oxide-semiconductor field-effect transistor (MOSFET)-based power modules for high-power applications is provided. The influence of dielectric thickness on the power handling capability of the substrate are also discussed. The designed IMS and DBC substrates were characterized in terms of steady-state and transient thermal performance using finite element simulation. Finally, the performance of the IMS and DBC are validated in an experimental setup under different loading and cooling temperature conditions. We report the simulation and experimental results showed that the IMS can provide high steady-state thermal performance for high-power modules based on SiC MOSFETs. Furthermore, the IMS provided enhanced transient thermal performance, which provided a reduced junction temperature when the module is operated at low fundamental output frequencies in traction drive systems.

42 ENGINEERING↗
DOE OSTI2025

Photosynthesis of CO from CO 2 with an iron polypyridyl catalyst at a passivated silicon photoelectrode

A first-row transition metal catalyst, [Fe(tpy)(Mebim-py)(NCCH 3 )] 2+ (tpy = 2,2′:6′,2′′-terpyridine, Mebim-py = 1-methylbenzimidazol-2-ylidene-3-(2′-pyridine)) mediates CO 2 reduction to CO at passivated p-Si photoelectrodes with applied potentials 240 mV positive of the standard CO 2 /CO reduction potential. The molecular catalyst's selectivity for CO was retained under photoelectrochemical conditions, with negligible direct proton reduction promoted by the photoelectrode. The faradaic efficiency for CO (44 ± 6%) was slightly enhanced relative to the catalyst performance in the dark (33%). A photosynthetic cell based on this photocathode system, coupled with ferrocene oxidation at the anode, successfully operated at a cell voltage of −1.2 V. The photovoltage generated by illumination of p-Si–CH 3 met and surpassed the potential required for CO 2 reduction when coupled with ferrocene oxidation. By leveraging a low-overpotential CO 2 reduction electrocatalyst, a photo-assisted electrochemical efficiency of 0.15% and applied bias photon-to-current efficiency of 0.05% was achieved for this single-junction cell, ultimately storing 46 kJ mol −1 (11 kcal mol −1 ) of photon energy.

Carbon Dioxide Reduction↗
DOE OSTI2021

Characterization of Highly Thermally Conductive Organic Substrates for a Double-Sided Cooled Power Module

Abstract Silicon-Carbide (SiC) power devices have become a promising option for traditional Silicon (Si) due to the superior material properties. To fully take advantage of the SiC devices, a high-performance power device packaging solution is necessary. This study proposes a cost-effective double-sided cooled (DSC) 1.2 kV SiC half-bridge power module using organic epoxy-resin composite dielectric (ERCD) substrates. The high mechanical and thermal performance of the power module is achieved by the low-modulus, moderate thermal conductivity, and relatively thin (120 μm) layer of ERCD material compared with traditional metal-clad ceramic approaches. This novel organic dielectric can withstand high voltage (5 kV @ 120 μm) and operate up to 250°C continuously, which is indispensable for high power applications. The thermal modeling results show that the equivalent thermal resistance junction-to-case (Rjc_eq) of the DSC power module using dual direct bonded copper (DBC) is 17% higher than the dual ERCD configuration. Furthermore, a non-insulated DSC power module concept is proposed for maximizing thermal performance by considering thermal vias in the ERCD substrate and direct-soldered heat sink. A thought process for optimization of thermal via design is demonstrated and it shows up to 24% of improvement on thermal performance compared with the insulated DSC power module.

Double-sided cooling, epoxy-resin composite dielec↗
DOE OSTI2021

Electric-Drive Vehicle Power Electronics Thermal Management: Current Status, Challenges, and Future Directions

Effective thermal management of traction-drive power electronics is critical to the advancement of electric-drive vehicles and is necessary for increasing power density and improving reliability. Replacing traditional silicon devices with more efficient, higher temperature, higher voltage, and higher frequency wide-bandgap (WBG) devices will enable increased power density but will result in higher device heat fluxes. Compact packaging of high-temperature WBG devices near low-temperature-rated components creates thermal management challenges that need to be addressed for future power-dense systems. This paper summarizes the thermal performance of on-road automotive power electronics thermal management systems and provides thermal performance and pumping-power metrics for select vehicles. Thermal analyses reveal that the package/conduction resistance dominates the total thermal resistance (for existing automotive systems). We model advanced packaging concepts and compare the results with existing packaging designs to quantify their thermal performance enhancements. Double-side-cooled configurations that do not use thermal interface materials are package concepts predicted to provide a low junction-to-fluid thermal resistance (compared to current packages). Dielectric-fluid-cooled concepts enable a redesign of the package to reduce the package resistance, can be implemented in single- and two-phase cooling approaches, and allow for cooling of passive components (e.g., capacitors) and bus bars.

33 ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2023

Mitigation of shunt in poly -Si/SiO$_{x}$ passivated interdigitated back contact monocrystalline Si solar cells by self-aligned etching between doped fingers

Polycrystalline silicon on silicon oxide (poly-Si/SiO x ) passivating contacts can be used for ultra-high-efficiency interdigitated back contact (IBC) monocrystalline silicon solar cells. We evaluate the use of intrinsic poly-Si for the region that isolates the p- and n-type fingers at the back side of IBC devices. To mitigate shunt across the isolation region between the doped p- and n-type fingers, we demonstrate self-aligned subtractive processing by etching the poly-Si in the isolation region using SF6 plasma followed by etching in a tetramethylammonium hydroxide (TMAH) solution. After removal of the poly-Si, the isolation region was passivated with SiN x and Al 2 O 3 , which resulted in an 11.7% increase in the fill factor in a 19.8% efficient device. Furthermore, we evaluate the limitations of this device through Suns-V oc analysis and simulations using SunSolve and Quokka3 solar cell simulation software. Through Quokka3, we show that the most significant efficiency losses come from junction recombination current (J 02 ) in the isolation region between doped fingers. We predict that the cell efficiency can be most improved with reduced J 02 through better isolation of heavily doped fingers by etching the isolation region deeper into the bulk or through enhanced surface chemical passivation in this region.

14 SOLAR ENERGY↗
DOE OSTI2024

Passivated Contacts for Direct Wafer Product (Final Technical Report)

This TCF project developed a thin-oxide (SiO 2 )/polycrystalline silicon (poly-Si) passivated contact solar cell on CubicPV's (formally 1366 Technologies, Inc.) Direct Wafer® Product (DWP) kerfless wafers. The project used two NREL-developed technologies described in U.S. Patent No. 9,911,873, Hydrogenation of Passivated Contacts and U.S. Patent Application Serial No. 15/890,172, Doped Passivated Contacts . The project was motivated by a potential higher efficiency cell (compared to a PERC cell) using passivated contacts on the ultra-low cost kerfless wafers grown using the Direct Wafer process. The hope was to accelerate market adoption of the cell and wafer by delivering the lowest LCOE in the PV industry. The project tested both n-type and p-type SiO 2 /poly-Si passivated contacts grown by thermal oxidation and plasma enhanced chemical vapor deposition (PECVD) of the poly-Si layer on DWP with varying wafer resistivities. Both deposition techniques are industry standards and thus economically viable methods for commercializing the contacts. The results indicated that both n-type and p-type poly-Si passivated contacts can be formed on polycrystalline DWP wafers, but implied open-circuit voltages (i Voc ) were limited to below 0.65 mV (compared with ~ 730 mV on n-Cz wafers). Diffusion of H to the Si/SiO 2 /poly-Si interface was key to obtaining high i Voc values. In this study, H was diffused from a high-temperature SiN x layer deposited over the poly-Si layer during a high-temperature firing step, similar to one used for screen printed metals. The study concluded that poly-Si passivated contacts on DWP wafers passivated the surface of the wafers as well as PERC passivated surfaces, which use a less expensive dielectric layer stack. The project showed that Direct Wafer Product wafers grown by CubicPV could produce high i Voc values (~0.647 mV), which could produce a cell over 20% efficient with proper processing and metallization. These cells, though not economically viable in 2024 as a stand-alone cell, could be integrated with a wide-bandgap top solar cell to form a two-junction tandem cell that could be viable under certain circumstances. This is because the bottom cell of a 30%, two-terminal tandem only needs to be a 20% cell under one-sun conditions. Thus, the DWP could be an ideal low-cost wafer for tandems. The project also revealed that a TOPCon type cell could be formed on a p-type DWP wafer using a P-diffused emitter and a p-type poly-Si contact. In fact, the p-type version of the poly-Si contact out-performed the n-type version for a variety of wafer resistivities, from highly doped to lowly doped. This curiosity requires more work to understand because on Cz wafers, the n-type poly-Si contact is of much higher quality than the p-type version.

14 SOLAR ENERGY↗
DOE OSTI2025

Optimizing energy yield of monolithic perovskite/silicon tandem solar cells in real-world Conditions: The impact of luminescent coupling

Efficient light management is key to maximizing power conversion efficiency (PCE) in monolithic perovskite/silicon tandem solar cells. Achieving peak efficiency requires closely matched current generation in all junctions, especially in integrated configurations. However, real-world conditions vary significantly due to factors such as sunlight spectrum, diffuse-to-direct sunlight ratio, angular distribution of light, subcell temperature coefficients, and ground reflection. This study introduces a comprehensive optical and device simulation to optimize perovskite/silicon tandem cells, considering experimental luminescent coupling (LC) efficiency and its dependence on working conditions, alongside variations in radiative recombination, effect of temperature on absorptivity spectra, and cloud cover. Our results show potential energy yield improvements of up to 1.4 % with LC, based on current perovskite radiative recombination records, and up to 4 % with direct bandgap materials. Although radiative recombination's dependence on excitation intensity reduces output power and requires thicker absorbers, LC compensates for these losses. LC also lowers the optimized bandgap for the perovskite top cell from 1.72 eV to 1.64–1.68 eV, or even lower in regions with redshifted irradiance. Additionally, optimization revealed that thinner silicon bottom cells require a higher perovskite top cell bandgap, impacting the balance between fabrication cost and cell stability.

14 SOLAR ENERGY↗