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The purpose of this test was to determine the heavy ion-induced single-event effect (SEE) susceptibility of the Samsung solid state drive (SSD) containing the Vertical-NAND (VNAND) flash technology. This test was supported by the NASA Electronics Parts and Packaging (NEPP) Program.
The performance of electronic devices in a space radiation environment is often limited by susceptibility to single-event effects (SEE), total ionizing dose (TID), and displacement damage (DD). Interpreting the results of SEE, TID, and DD testing of complex devices is quite difficult given the rapidly changing nature of both technology and the related radiation issues. Radiation testing is performed to establish the sensitivities of candidate spacecraft electronics to single-event upset (SEU), single-event latchup (SEL), single-event gate rupture (SEGR), single-event burnout (SEB), single-event transients (SETs), TID, and DD effects. Knowing where to search for these test results is a valuable resource for the aerospace engineer or spacecraft design engineer. This poster is intended to be a resource tool for finding radiation test data.
We present results and analysis investigating the effects of radiation on a variety of candidate spacecraft electronics to proton and heavy ion induced single event effects (SEE), proton-induced displacement damage (DD), and total ionizing dose (TID). Introduction: This paper is a summary of test results.NASA spacecraft are subjected to a harsh space environment that includes exposure to various types of ionizing radiation. The performance of electronic devices in a space radiation environment is often limited by its susceptibility to single event effects (SEE), total ionizing dose (TID), and displacement damage (DD). Ground-based testing is used to evaluate candidate spacecraft electronics to determine risk to spaceflight applications. Interpreting the results of radiation testing of complex devices is quite difficult. Given the rapidly changing nature of technology, radiation test data are most often application-specific and adequate understanding of the test conditions is critical. Studies discussed herein were undertaken to establish the application-specific sensitivities of candidate spacecraft and emerging electronic devices to single-event upset (SEU), single-event latchup (SEL), single-event gate rupture (SEGR), single-event burnout (SEB), single-event transient (SET), TID, enhanced low dose rate sensitivity (ELDRS), and DD effects.
The purpose of this test was to characterize the single-event effects (SEE) susceptibility of the Texas Instrument (TI) DRV8881 2.5A Dual H-Bridge Motor Driver. The device’s output was monitored for changes during exposure to heavy-ions at Lawrence Berkeley National Laboratory (LBNL) 88-inch Cyclotron. The main goal of testing was to test for destructive SEEs. Nondestructive SEEs were recorded during testing but not fully characterized. Testing was performed on November 9th and 11th, 2022.
While we have been utilizing standard fluence levels such as those listed in the JESD57 document, we have begun revisiting what an appropriate test fluence is when it comes to qualifying a device for single events. Instead of a fixed fluence level or until a specific number of events occurs, a different thought process is required.
As we continue to advance in exploring space frontiers, technology must also advance. The need for faster data recovery and data processing is crucial. In this, the less equipment used, and lighter that equipment is, the better. Because integrated circuits become more sensitive in high altitude, experimental verification and quantification is required. The Center for Applied Radiation Research (CARR) at Prairie View A&M University was awarded a grant by NASA to participate in the NASA ER-2 Flight Program, the APEX balloon flight program, and the Student Launch Program. These programs are to test anomalous errors in integrated circuits due to single event effects (SEE). CARR had already begun experiments characterizing the SEE behavior of high speed and high density SRAM's. The research center built a error testing system using a PC-104 computer unit, an Iomega Zip drive for storage, a test board with the components under test, and a latchup detection and reset unit. A test program was written to continuously monitor a stored data pattern in the SRAM chip and record errors. The devices under test were eight 4Mbit memory chips totaling 4Mbytes of memory. CARR was successful at obtaining data using the Electronic TestBed System (EBS) in various NASA ER-2 test flights. These series of high altitude flights of up to 70,000 feet, were effective at yielding the conditions which single event effects usually occur. However, the data received from the series of flights indicated one error per twenty-four hours. Because flight test time is very expensive, the initial design proved not to be cost effective. The need for orders of magnitude with more memory became essential. Therefore, a project which could test more memory within a given time was created. The goal of this project was not only to test more memory within a given time, but also to have a system with a faster processing speed, and which used less peripherals. This paper will describe procedures used to build an updated Electronic Testbed System.
The Xilinx Vix-11 Pro is a platform FPGA that embeds multiple microprocessors within the fabric of an SRAM-based reprogrammable FPGA. The variety and quantity of resources provided by this family of devices make them very attractive for spaceflight applications. However,these devices will be susceptible to single event effects (SEE), which must be mitigated. Observations from prior testing of the Xilinx Virtex-II Pro suggest that the PowerPC core has significant vulnerability to SEES. However, these initial tests were not designed to exclusively target the functionality of the PowerPC, therefore making it difficult to distinguish processor upsets from fabric upsets. The main focus of this paper involves detailed SEE testing of the embedded PowerPC core. Due to the complexity of the PowerPC, various custom test applications, both static and dynamic, will be designed to isolate each Unit of the processor. Collective analysis of the test results will provide insight into the exact upset mechanism of the PowerPC. With this information, mitigations schemes can be developed and tested that address the specific susceptibilities of these devices. The test bed will be the Xilinx SEE Consortium Virtex-II Pro test board, which allows for configuration scrubbing, design triplication, and ease of data collection. Testing will be performed at the Indiana University Cyclotron Facility using protons of varying energy levels and fluencies. This paper will present the detailed test approach along with the results.
We report low-energy proton and alpha particle SEE data on a 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) static random access memory (SRAM) that demonstrates the criticality of understanding and using low-energy protons for SEE testing of highly-scaled technologies
Testing was done to characterize the Texas Instruments Operational Amplifiers OPA691 single event effects (SEE) response. The primary SEE concerns for this device are single event latchup (SEL) and single event transients (SETs). Testing focused on determining susceptibility to SEL and characterizing the SET response. Testing occurred on November 11, 2022.
Testing was done to characterize the Texas Instruments Operational Amplifiers OPA842 single event effects (SEE) response. The primary SEE concerns for this device are single event latchup (SEL) and single event transients (SETs). Testing focused on determining susceptibility to SEL and characterizing the SET response. Testing occurred on November 11, 2022.
With the dearth of dedicated radiation hardened foundries, new and novel techniques are being developed for hardening designs using non-dedicated foundry services. In this paper, we will discuss the implications of validating these methods for the natural space radiation environment issues: total ionizing dose (TID) and single event effects (SEE). Topics of discussion include: Types of tests that are required, Design coverage (i.e., design libraries: do they need validating for each application?) A new task within NASA to compare existing design. This latter task is a new effort in FY03 utilizing a 8051 microcontroller core from multiple design hardening developers as a test vehicle to evaluate each mitigative technique.
The Single Event Effect (SEE) responses of two FireWire serial buses based on the IEEE 1394 standard were tested with heavy ions and protons. A unique approach to testing and categorizing the SEEs is presented.
We present SEE test results for the Cobham SpaceWire transceiver after dosing the device to 300 krad(Si). We performed SEU characterization with variable data rates and patterns. Events resembling SEFIs were also observed and recorded.
This study was undertaken to determine the single event effect (SEE) susceptibility of two different MOSFET components. Heavy-ion testing was conducted at the Lawrence Berkeley National Laboratory (LBNL) Berkeley Accelerator Space Effects (BASE) Facility 88” Cyclotron. Its purpose was to evaluate these devices as candidates for use on Goddard Modular SmallSat Architecture (GMSA) adapter board for the GTOSat project.
A Technology Computer Aided Design (TCAD) simulation-based method is developed to evaluate whether derating of high-energy heavy-ion accelerator test data bounds the risk for single-event gate rupture (SEGR) from much higher energy on-orbit ions for a mission linear energy transfer (LET) requirement. It is shown that a typical derating factor of 0.75 applied to a single-event effect (SEE) response curve defined by high-energy accelerator SEGR test data provides reasonable on-orbit hardness assurance, although in a high-voltage power MOSFET, it did not bound the risk of failure.
The JEDEC JESD57 test standard, Procedures for the Measurement of Single-Event Effects in Semiconductor Devices from Heavy-Ion Irradiation, is undergoing its first revision since 1996. In this talk, we place this test standard into context with other relevant radiation test standards to show its importance for single-event effect radiation testing for space applications. We show the range of industry, government, and end-user party involvement in the revision. Finally, we highlight some of the key changes being made and discuss the trade-space in which setting standards must be made to be both useful and broadly adopted.
This study was being undertaken to determine the single event effect susceptibility of the commercial Vishay 60-V TrenchFET power MOSFET. Heavy-ion testing was conducted at the Texas AM University Cyclotron Single Event Effects Test Facility (TAMU) and the Lawrence Berkeley National Laboratory BASE Cyclotron Facility (LBNL). In addition, initial 200-MeV proton testing was conducted at Massachusetts General Hospital (MGH) Francis H. Burr Proton Beam Therapy Center. Testing was performed to evaluate this device for single-event effects from lower-LET, lighter ions relevant to higher risk tolerant space missions.
Testing of an Intel 14nm desktop processor was conducted under proton irradiation. We share lessons learned, demonstrating that complex devices beget further complex challenges requiring practical and theoretical investigative expertise to solve.