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At least 127 records · Page 7

Test aspects of the JPL Viterbi decoder

The generation of test vectors and design-for-test aspects of the Jet Propulsion Laboratory (JPL) Very Large Scale Integration (VLSI) Viterbi decoder chip is discussed. Each processor integrated circuit (IC) contains over 20,000 gates. To achieve a high degree of testability, a scan architecture is employed. The logic has been partitioned so that very few test vectors are required to test the entire chip. In addition, since several blocks of logic are replicated numerous times on this chip, test vectors need only be generated for each block, rather than for the entire circuit. These unique blocks of logic have been identified and test sets generated for them. The approach employed for testing was to use pseudo-exhaustive test vectors whenever feasible. That is, each cone of logid is tested exhaustively. Using this approach, no detailed logic design or fault model is required. All faults which modify the function of a block of combinational logic are detected, such as all irredundant single and multiple stuck-at faults.

Breuer, M. A.↗

Laboratory Investigation of the Effect of Venusian Weathering on Mineral Spectra

Introduction: The recent selection of two missions to Venus has renewed the importance of deter-mining weathering reactions between minerals and the Venusian atmosphere, and the spectral signatures of minerals before, during, and after these reactions. The rate at which weathering reactions progress also constrain show long unstable minerals will be present on the surface (e.g., [1]), and enables the use of mineralogy as a constraint on surface age(e.g., [2-3]).In order to gain an understanding of how mineral compositions and spectra change with weathering, we have begun conducting experiments in a 1 atm experimental setup at Wesleyan University. This setup exposes minerals to the temperature and most abundant gases of the Venus atmosphere (CO2, SO2, N2).We conducted initial experiments using biotite, calcite, and montmorillonite in order to test our methodology with minerals that may be relevant to recording the history of water on Venus. Methods: Experiments were conducted in Thermo Fisher Scientific Lindberg/Blue M Mini-Mite horizontal tube furnaces at Wesleyan University. Experiments used natural mineral chips and powders, and were conducted at 1 atmosphere and 460 °C under pre-mixed gases provided by Air Gas(Table 1). The furnaces are set up in a flow through configuration so that solid samples are exposed to a fixed gas composition, and quartz glass process tubes were used in all experiments (1/4” diameter for experiment V4, ½” diameter for all others). These conditions were maintained for the du-rations listed in Table 1, at which point the furnace was turned off with gas flowing until the sample was cool enough to extract under N2and be placed in a desiccator for storage. Run products were carbon coated and examined using a Hitachi SU5000 Field Emission Gun Scanning Electron Microscope (SEM) equipped with an EDAX Octane Pro EDS detector located at Wesley-an University. Visible-Near Infrared Spectroscopy (VNIR) analysis was performed on powdered samples under a nitrogen atmosphere using an ASD Fieldspec Proover the 350-2500 nm range. Powdered mineral samples were milled to a particle size of < 45μm and were spiked with an internal standard (Al2O3, corundum) to obtain quantitative mineralogy. Samples were analyzed using a Panalytical X’Pert pro X-ray Diffractometer (XRD), with an X’Celerator high speed detector and Co Kα radiation, with data collected at a step size of 0.02 ̊/minute step counting rate from 2 to 80 degrees 2θ at 45 mA/40kV in the X-ray Diffraction Laboratory located at NASA Johnson Space Center. Materials Data Inc (MDI) software suite, JadeTMv9 was used for Rietveld refinement to determine phase abundances and mineral identification by comparing XRD patterns to International Center for Diffraction Data (ICDD) database patterns. Table 1: Experimental matrix. Experiment Name Duration (Days)Gas Com-position (trace gas)MineralsV487SO2/N2(1.4%)Montmorillonite, biotiteV519SO2/N2(1.4%)CalciteV619CO2/SO2/N2(1.4% SO2, 2.1% N2)Montmorillonite, biotiteV828SO2/N2(1.4%)Biotite, calcite Results: Calcite. In both experiments, calcite was exposed to the SO2/N2gas mixture, and in both experimental run products, XRD analysis detected anhydrite, which is consistent with EDS measurements conducted in the SEM. The XRD analyses show greater amounts of anhydrite present after 28 days than 19, suggesting the calcite reaction progressed further given longer duration. Grain surface morphology as seen in the SEM also shows secondary mineral growth (Fig. 1). VNIR spectra show no change, as expected since anhydrite lacks spectral features in this wavelength range. Montmorillonite. Montmorillonite was exposed to two different gas mixtures, the SO2/N2mix and CO2/SO2/N2mix over different durations (87 and 19 days, respectively). VNIR analyses of both run products show a reduction in the 1441and1910 nm water features as well as a shift of the 1411 and 2011 nm features to shorter wavelengths that may indicate re-structuring in the crystal lattice and the production of amorphous phases [4]. XRD results are consistent with this, showing a shift of the 001 peak from 15Åto 10Åin both run products. The amount of X-ray amorphous material in the montmorillonite run products was greater than that present in the unreacted clay, being the greatest in the 87 day V4 experiment. No other secondary phases were detected in the run products, however sulfur was present in EDS analyses of powder samples.

A R Santos↗

Computer circuit will fit on single silicon chip

A simplified computer logic circuit of two NAND/NOR gates and three additional inputs to accomplish the count and shift function is described. The circuit has capacity for parallel read-in, counting, serial shiftout, complement input and set and reset.

Smith, C.↗

A 2 Thz Schottky Solid-State Heterodyne Receiver for Atmospheric Studies

Obtaining temperature, pressure, and composition profiles along with wind velocities in the Earth's thermosphere/ionosphere system is a key NASA goal for understanding our planet. We report on the status of a technology development effort to build an all-solid-state heterodyne receiver at 2.06 terahertz that will allow the measurement of the 2.06 terahertz [OI] line for altitudes greater than 100 kilometers. The receiver front end features low-parasitic Schottky diode mixer chips that are driven by a local oscillator (LO) source using Schottky diode based multipliers. The multiplier chain consists of a 38 gigahertz oscillator followed by a set of three cascaded triplers at 114 gigahertz, 343 gigahertz and 1.03 terahertz.

Treuttel, Jeanne↗

Yield analysis of large capacity magnetic bubble circuits with redundancy design

The fabrication yield of an on-chip modifiable redundant circuit design for a 100M bit serial shift register is evaluated. The yield model is a redundancy design in which there is a primary loop and a set of secondary loops which can be enabled/disabled without introducing blanks to the data stream. This function has a finite yield, the loop-modification yield factor, which must be greater than 0.9 to make the system more economical than the simple nonredundant design. It is further established that small loop capacities greatly degrade the yield because of the effect of the modification yield factor, while large loop capacities degrade the yield because of defects in the operating area. As the modification yield increases the optimum loop capacity decreases. An optimum value for the number of redundant loops exists for each loop capacity. Other factors that affect the yield are the garnet film and the processed circuit.

Bailey, R. F.↗

Otoconial complexes as ion reservoirs in endolymph

Scintillation spectrometry was employed to examine the Ca-45(2+) uptake and exchange by otoconial complexes in the sensory region endolymph medium, and a comparison was made with bone mineral deposition. CaCl was injected intraperitoneally into 222 rats and blood samples were collected at set intervals during the subsequent 15 min-l mo life durations of the animals. The animals were eventually sacrificed and saccular and utricular otoconial complexes were microdissected while bone chips from the otic bone and femur were gathered by scraping. Ca-45 was present in the saccular otoconial complexes within 15 min of injection, an uptake similar to the bone deposition, while slower rates were observed with the utricular complexes. Utricular uptake, however, accelerated 5-6 hr postinjection, and total otoconial content was always lower than proportional bone absorption.

Ross, M. D.↗

Walsh function generator for the Electronically Scanned Thinned Array Radiometer (ESTAR) instrument

A prototype Walsh Function Generator (WFG) for the ESTAR (Electronically Scanned Thinned Array Radiometer) instrument has been designed and tested. Implemented in a single Xilinx XC3020PC68-50 Field Programmable Gate Array (FPGA), it generates a user-programmable set of 32 consecutive Walsh Functions for noise cancellation in the analog circuitry of the Front-End Modules (FEM's). It is implemented in a 68-pin plastic leaded chip carrier (PLCC) package, is fully testable, and can be used for noise cancellation periods as small as 2 msec.

Chren, William A., Jr.↗

Power

The space station requires an increase in power or energy of at least several orders of magnitude compared to previous space missions. With the requirement up in the range of 10 kilowatt hours, this obviiously requires the development of new technology. Although the power area is very well integrated in the spacecraft itself, it represents a diverse set of components necessary for energy conversion, electronics, and energy distribution. Considerable work is ongoing at NASA Lewis in the power devices development area, including transformers, large area solid-state chips, transistors, and fast recovery diodes. This work is oriented toward eventual application to both AC and DC power conversion approaches. In the energy storage area, there are many options available to fit into the space station representing various degrees of risk and leverage combination, such as the near-term integral-pressure-vessel nickel hydrogen battery, an advanced Ni-H2 battery concept, and the regenrative hydrogen-oxygen system utilizing essentially the Shuttle orbiter type of fuel cell.

Corbett, R.↗

A parallel row-based algorithm with error control for standard-cell replacement on a hypercube multiprocessor

A new row-based parallel algorithm for standard-cell placement targeted for execution on a hypercube multiprocessor is presented. Key features of this implementation include a dynamic simulated-annealing schedule, row-partitioning of the VLSI chip image, and two novel new approaches to controlling error in parallel cell-placement algorithms; Heuristic Cell-Coloring and Adaptive (Parallel Move) Sequence Control. Heuristic Cell-Coloring identifies sets of noninteracting cells that can be moved repeatedly, and in parallel, with no buildup of error in the placement cost. Adaptive Sequence Control allows multiple parallel cell moves to take place between global cell-position updates. This feedback mechanism is based on an error bound derived analytically from the traditional annealing move-acceptance profile. Placement results are presented for real industry circuits and the performance is summarized of an implementation on the Intel iPSC/2 Hypercube. The runtime of this algorithm is 5 to 16 times faster than a previous program developed for the Hypercube, while producing equivalent quality placement. An integrated place and route program for the Intel iPSC/2 Hypercube is currently being developed.

Sargent, Jeff Scott↗

CHOMPTT (CubeSat Handling of Multisystem Precision Timing Transfer): From Concept to Launch Pad

Here we present the evolution of a student satellite mission: CHOMPTT (CubeSat Handling of Multisystem Precision Time Transfer), from its original concept as a candidate for the University NanoSatellite Program 8 (UNP8), to a spacecraft ready for launch in Fall of 2017 on ELaNa XIX (Educational Launch of Nanosatellites). The 3U CubeSat houses a 1 kg, 1U OPTI (Optical Precision Timing Instrument) payload, designed and built at the University of Florida, and a 1.5U EDSNNODeS-derived bus from NASA Ames Research Center. The OPTI payload comprises of: 1) a supervisor board that handles payload data, power regulation, and mode settings, 2) an optics assembly of six 1 cm retroreflectors and four laser beacon diodes for ground-tracking; and 3) two fully redundant timing channels, each consisting of: a chip-scale atomic clock, a microprocessor with clock counter, a picosecond event timer, and an avalanche photodetector (APD) with band-pass filter. Several iterations of OPTI have been developed, tested, and designed to achieve its current functionality and design a laboratory breadboard design, a 1.5U high altitude balloon design, engineering unit design, and its current flight unit design. In-lab testing of the current OPTI design indicates a short-term precision of 100 ps, equivalent to a range accuracy of 3 cm necessary to achieve our primary objective of 200 ps time transfer error, and a long-term timing accuracy of 20 ns over one orbit (1.5 hours). After the spacecraft reaches its nominal 500 km orbit at a 85 degree inclination, an experimental laser ranging facility at Kennedy Space Center in Florida, will track and emit 1064 nm nanosecond optical pulses at the CHOMPTT spacecraft. The laser pulses will then reflect off the retroreflector array mounted on the nadir face of CHOMPTT, and return the pulse to the laser ranging facility where the laser ranging facility will record the round-trip duration of the laser pulses. At the same time the pulse arrives at the spacecraft and is reflected by the array, an APD will record the arrival time of the pulses at the nanosatellite. By comparing the arrival of the pulse at the CubeSat and the duration of the round-trip of the laser pulse, the clock discrepancy between the ground and CubeSat atomic clocks can be determined, in addition to the CubeSats range from the facility. The design and verification of the flight version of CHOMPTT will be reviewed and an overview of the lifetime development and progression of CHOMPTT from the inception to launch pad will be presented.

CHOMPTT↗

LANDSAT 4 investigation of thematic mapper and multispectral scanner applications

Six different band combinations of TM data were selected for evaluation by four experienced photointerpreters who were asked to rank the band combinations according to the ease with which the category of image feature designated for each set of combinations could be distinguished. There were four sets of combinations selected for each category of image feature. Scenes of Oklahoma City, Oklahoma and of the Sacramento Valley, California area were enlarged to 1:250,000 and 2 cm circular chips were cut from each print. A nonparametric rank order test was carried out on the data to determine if the interpreters found no difference among the band combinations in ranking for the designated categories. Kendall's coefficient of concordance (W) was calculated and the significance of the W value was determined by a chi-square test. A table summarizes the results of the evaluation and shows the rank order of band combinations indicated as valid by rejection of the null hypothesis.

Lauer, D. T.↗

Smart Power Supply for Battery-Powered Systems

A power supply for battery-powered systems has been designed with an embedded controller that is capable of monitoring and maintaining batteries, charging hardware, while maintaining output power. The power supply is primarily designed for rovers and other remote science and engineering vehicles, but it can be used in any battery alone, or battery and charging source applications. The supply can function autonomously, or can be connected to a host processor through a serial communications link. It can be programmed a priori or on the fly to return current and voltage readings to a host. It has two output power busses: a constant 24-V direct current nominal bus, and a programmable bus for output from approximately 24 up to approximately 50 V. The programmable bus voltage level, and its output power limit, can be changed on the fly as well. The power supply also offers options to reduce the programmable bus to 24 V when the set power limit is reached, limiting output power in the case of a system fault detected in the system. The smart power supply is based on an embedded 8051-type single-chip microcontroller. This choice was made in that a credible progression to flight (radiation hard, high reliability) can be assumed as many 8051 processors or gate arrays capable of accepting 8051-type core presently exist and will continue to do so for some time. To solve the problem of centralized control, this innovation moves an embedded microcontroller to the power supply and assigns it the task of overseeing the operation and charging of the power supply assets. This embedded processor is connected to the application central processor via a serial data link such that the central processor can request updates of various parameters within the supply, such as battery current, bus voltage, remaining power in battery estimations, etc. This supply has a direct connection to the battery bus for common (quiescent) power application. Because components from multiple vendors may have differing power needs, this supply also has a secondary power bus, which can be programmed a priori or on-the-fly to boost the primary battery voltage level from 24 to 50 V to accommodate various loads as they are brought on line. Through voltage and current monitoring, the device can also shield the charging source from overloads, keep it within safe operating modes, and can meter available power to the application and maintain safe operations.

Krasowski, Michael J.↗

A variable rate speech compressor for mobile applications

One of the most promising speech coder at the bit rate of 9.6 to 4.8 kbits/s is CELP. Code Excited Linear Prediction (CELP) has been dominating 9.6 to 4.8 kbits/s region during the past 3 to 4 years. Its set back however, is its expensive implementation. As an alternative to CELP, the Base-Band CELP (CELP-BB) was developed which produced good quality speech comparable to CELP and a single chip implementable complexity as reported previously. Its robustness was also improved to tolerate errors up to 1.0 pct. and maintain intelligibility up to 5.0 pct. and more. Although, CELP-BB produces good quality speech at around 4.8 kbits/s, it has a fundamental problem when updating the pitch filter memory. A sub-optimal solution is proposed for this problem. Below 4.8 kbits/s, however, CELP-BB suffers from noticeable quantization noise as a result of the large vector dimensions used. Efficient representation of speech below 4.8 kbits/s is reported by introducing Sinusoidal Transform Coding (STC) to represent the LPC excitation which is called Sine Wave Excited LPC (SWELP). In this case, natural sounding good quality synthetic speech is obtained at around 2.4 kbits/s.

Yeldener, S.↗

Low-cost TDRSS communications for NASA's long duration balloon project

A new transponder and RF ground support equipment for the NASA Tracking and Data Relay Satellite System (TDRSS) intended to support long duration scientific balloon flights in Antarctica are described. The new balloon class transponder features a highly integrated spread spectrum receiver design based on programmable charge coupled device (CCD) correlators and digital signal processing chips. The correlator chip is a Lincoln Labs 4ABC with four CCD channels. The balloon transponder is capable of reporting an estimate of its input bit error rate using digital signal processing. The TDRSS user RF test set is based on a set of RF ground support equipment capable of providing both the RF communications and direct control and monitoring necessary for transponder testing and a two-way RF link for preflight testing.

Israel, David J.↗

First Results of Digital Topography Applied to Macromolecular Crystals

An inexpensive digital CCD camera was used to record X-ray topographs directly from large imperfect crystals of cubic insulin. The topographs recorded were not as detailed as those which can be measured with film or emulsion plates but do show great promise. Six reflections were recorded using a set of finely spaced stills encompassing the rocking curve of each reflection. A complete topographic reflection profile could be digitally imaged in minutes. Interesting and complex internal structure was observed by this technique.The CCD chip used in the camera has anti-blooming circuitry and produced good data quality even when pixels became overloaded.

Lovelace, J.↗

Challenges and Opportunities in Gen3 Embedded Cooling with High-Quality Microgap Flow

Gen3, Embedded Cooling, promises to revolutionize thermal management of advanced microelectronic systems by eliminating the sequential conductive and interfacial thermal resistances which dominate the present 'remote cooling' paradigm. Single-phase interchip microfluidic flow with high thermal conductivity chips and substrates has been used successfully to cool single transistors dissipating more than 40kW/sq cm, but efficient heat removal from transistor arrays, larger chips, and chip stacks operating at these prodigious heat fluxes would require the use of high vapor fraction (quality), two-phase cooling in intra- and inter-chip microgap channels. The motivation, as well as the challenges and opportunities associated with evaporative embedded cooling in realistic form factors, is the focus of this paper. The paper will begin with a brief review of the history of thermal packaging, reflecting the 70-year 'inward migration' of cooling technology from the computer-room, to the rack, and then to the single chip and multichip module with 'remote' or attached air- and liquid-cooled coldplates. Discussion of the limitations of this approach and recent results from single-phase embedded cooling will follow. This will set the stage for discussion of the development challenges associated with application of this Gen3 thermal management paradigm to commercial semiconductor hardware, including dealing with the effects of channel length, orientation, and manifold-driven centrifugal acceleration on the governing behavior.

microchannel↗

Fault-tolerant computer study

A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed.

Rennels, D. A.↗

JMOSFET: A MOSFET parameter extractor with geometry-dependent terms

The parameters from metal-oxide-silicon field-effect transistors (MOSFETs) that are included on the Combined Release and Radiation Effects Satellite (CRRES) test chips need to be extracted to have a simple but comprehensive method that can be used in wafer acceptance, and to have a method that is sufficiently accurate that it can be used in integrated circuits. A set of MOSFET parameter extraction procedures that are directly linked to the MOSFET model equations and that facilitate the use of simple, direct curve-fitting techniques are developed. In addition, the major physical effects that affect MOSFET operation in the linear and saturation regions of operation for devices fabricated in 1.2 to 3.0 mm CMOS technology are included. The fitting procedures were designed to establish single values for such parameters as threshold voltage and transconductance and to provide for slope matching between the linear and saturation regions of the MOSFET output current-voltage curves. Four different sizes of transistors that cover a rectangular-shaped region of the channel length-width plane are analyzed.

Buehler, M. G.↗