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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7

A multicomputer and real time Ada environment

A multicomputer is defined as a set of tightly-coupled yet autonomous computers capable of synchronizing and communicating in parallel but also of operating independently. The architectural concepts and requirements for executing the Ada programs in a multicomputer system are discussed. Synchronization, commmunication, and protection of shared data between the Ada program entities are addressed. Decomposition or partitioning of the Ada program in a multicomputer system is also studied. Finally, a multicomputer and real time Ada environment is described using FLEX/32 multicomputer system.

Naeini, Ray↗

The JPL telerobot operator control station. Part 1: Hardware

The Operator Control Station of the Jet Propulsion Laboratory (JPL)/NASA Telerobot Demonstrator System provides the man-machine interface between the operator and the system. It provides all the hardware and software for accepting human input for the direct and indirect (supervised) manipulation of the robot arms and tools for task execution. Hardware and software are also provided for the display and feedback of information and control data for the operator's consumption and interaction with the task being executed. The hardware design, system architecture, and its integration and interface with the rest of the Telerobot Demonstrator System are discussed.

Kan, Edwin P.↗

Parallelized reliability estimation of reconfigurable computer networks

A parallelized system, ASSURE, for computing the reliability of embedded avionics flight control systems which are able to reconfigure themselves in the event of failure is described. ASSURE accepts a grammar that describes a reliability semi-Markov state-space. From this it creates a parallel program that simultaneously generates and analyzes the state-space, placing upper and lower bounds on the probability of system failure. ASSURE is implemented on a 32-node Intel iPSC/860, and has achieved high processor efficiencies on real problems. Through a combination of improved algorithms, exploitation of parallelism, and use of an advanced microprocessor architecture, ASSURE has reduced the execution time on substantial problems by a factor of one thousand over previous workstation implementations. Furthermore, ASSURE's parallel execution rate on the iPSC/860 is an order of magnitude faster than its serial execution rate on a Cray-2 supercomputer. While dynamic load balancing is necessary for ASSURE's good performance, it is needed only infrequently; the particular method of load balancing used does not substantially affect performance.

Nicol, David M.↗

Recommendations for an Executive Information System (EIS) for the NASA Accounting and Financial Information System (NAFIS)

The objectives were to: (1) survey state-of-the-art computing architectures, tools, and technologies for implementing an Executive Information System (EIS); (2) review MSFC capabilities and efforts in developing an EIS for Shuttle Projects Office and the Payloads Project Office; (3) review management reporting requirements for the NASA Accounting and Financial Information System (NAFIS) Project in the areas of cost, schedule, and technical performance, and insure that the EIS fully supports these requirements; and (4) develop and implement a pilot concept for a NAFIS EIS. A summary of the findings of this work is presented.

Goss, Ernest Preston↗

Processor architecture and data buffering

A set of architectures from three major architecture families: stack, register, and memory-to-memory is discussed. It is shown that scalable architectures are not applicable for low-density technologies because they require at least 32 words of local memory. Software support is shown to be capable of bridging the performance gap between scalable and nonscalable architectures. A register architecture with 32 words of local memory allocated interprocedurally outperforms scalable architectures with equal sizes local memories and even some with larger size local memories. The performance advantage of unscalable architectures becomes significant when in addition to quality compile-time support, a small cache is added to an unscalable architecture. A 32-register architecture with 512 byte cache executes 20 percent less cycles when compared with an 8-set multiple overlapping set organization.

Mulder, Hans↗

ASICs Approach for the Implementation of a Symmetric Triangular Fuzzy Coprocessor and Its Application to Adaptive Filtering

This paper discusses the implementation of a fuzzy logic system using an ASICs design approach. The approach is based upon combining the inherent advantages of symmetric triangular membership functions and fuzzy singleton sets to obtain a novel structure for fuzzy logic system application development. The resulting structure utilizes a fuzzy static RAM to store the rule-base and the end-points of the triangular membership functions. This provides advantages over other approaches in which all sampled values of membership functions for all universes must be stored. The fuzzy coprocessor structure implements the fuzzification and defuzzification processes through a two-stage parallel pipeline architecture which is capable of executing complex fuzzy computations in less than 0.55us with an accuracy of more than 95%, thus making it suitable for a wide range of applications. Using the approach presented in this paper, a fuzzy logic rule-base can be directly downloaded via a host processor to an onchip rule-base memory with a size of 64 words. The fuzzy coprocessor's design supports up to 49 rules for seven fuzzy membership functions associated with each of the chip's two input variables. This feature allows designers to create fuzzy logic systems without the need for additional on-board memory. Finally, the paper reports on simulation studies that were conducted for several adaptive filter applications using the least mean squared adaptive algorithm for adjusting the knowledge rule-base.

Starks, Scott↗

Gilgamesh: A Multithreaded Processor-In-Memory Architecture for Petaflops Computing

Processor-in-Memory (PIM) architectures avoid the von Neumann bottleneck in conventional machines by integrating high-density DRAM and CMOS logic on the same chip. Parallel systems based on this new technology are expected to provide higher scalability, adaptability, robustness, fault tolerance and lower power consumption than current MPPs or commodity clusters. In this paper we describe the design of Gilgamesh, a PIM-based massively parallel architecture, and elements of its execution model. Gilgamesh extends existing PIM capabilities by incorporating advanced mechanisms for virtualizing tasks and data and providing adaptive resource management for load balancing and latency tolerance. The Gilgamesh execution model is based on macroservers, a middleware layer which supports object-based runtime management of data and threads allowing explicit and dynamic control of locality and load balancing. The paper concludes with a discussion of related research activities and an outlook to future work.

management locality load balance↗

A computer architecture for intelligent machines

The Theory of Intelligent Machines proposes a hierarchical organization for the functions of an autonomous robot based on the Principle of Increasing Precision With Decreasing Intelligence. An analytic formulation of this theory using information-theoretic measures of uncertainty for each level of the intelligent machine has been developed in recent years. A computer architecture that implements the lower two levels of the intelligent machine is presented. The architecture supports an event-driven programming paradigm that is independent of the underlying computer architecture and operating system. Details of Execution Level controllers for motion and vision systems are addressed, as well as the Petri net transducer software used to implement Coordination Level functions. Extensions to UNIX and VxWorks operating systems which enable the development of a heterogeneous, distributed application are described. A case study illustrates how this computer architecture integrates real-time and higher-level control of manipulator and vision systems.

Lefebvre, D. R.↗

Architecture and design of a 500-MHz gallium-arsenide processing element for a parallel supercomputer

The design of the processing element of GASP, a GaAs supercomputer with a 500-MHz instruction issue rate and 1-GHz subsystem clocks, is presented. The novel, functionally modular, block data flow architecture of GASP is described. The architecture and design of a GASP processing element is then presented. The processing element (PE) is implemented in a hybrid semiconductor module with 152 custom GaAs ICs of eight different types. The effects of the implementation technology on both the system-level architecture and the PE design are discussed. SPICE simulations indicate that parts of the PE are capable of being clocked at 1 GHz, while the rest of the PE uses a 500-MHz clock. The architecture utilizes data flow techniques at a program block level, which allows efficient execution of parallel programs while maintaining reasonably good performance on sequential programs. A simulation study of the architecture indicates that an instruction execution rate of over 30,000 MIPS can be attained with 65 PEs.

Fouts, Douglas J.↗

On-Board Planning for New Millenium Deep Space One Autonomy

The Deep Space One (DS1) mission, scheduled to fly in 1998, will be the first NASA spacecraft to feature an on-board planner. The planner is part of an artificial intelligence based control architecture that comprises the planner/scheduler, a plan execution engine, and a model-based fault diagnosis and reconfiguration engine...This paper describes the on-board planning and scheduling component of the DS1 autonomy architecture.

Deep↗

Enterprise Mission Integration for Artemis Lunar Missions

Mission integration is an iterative process by which a specific mission is formulated, refined, planned, and executed within the established vehicle(s), architecture, and ground systems design. Mission integration includes the people, vehicle(s) and ground hardware/software, products, processes, analyses, schedules, facilities, Certification of Flight Readiness, etc. The Artemis Mission Integration Task Team (MITT) developed a series of products and processes to support the complex mission integration across various Programs within the Artemis Mission Campaign (Orion, Space Launch Systems, Exploration Ground Systems, Gateway, Human Landing System, and Extravehicular Activity and Human Surface Mobility). The Moon to Mars (M2M) Program is referred to as ‘the enterprise’ as it includes both the M2M organization and the Programs supporting the Artemis Mission Campaign. Artemis Mission Integration has five phases: mission capability, mission definition, mission preparation, mission execution, and post-mission assessment. This paper focuses on one of the enterprise-level mission checkpoints as a kick-off to the Mission Preparation phase, the Mission Integration Review (MIR), which occurs 18-24 months prior to launch. The MIR helps to confirm the defined mission technical baseline is within the existing analyzed design envelope. Details are provided on the identification of dependencies, issues, or gaps for mission-specific objectives and requirements, as well as the definition of the analysis, training, mission execution products, facilities, and detailed supporting operations requirements. The MIR was held for both Artemis I and II and this paper aims to share with the aerospace community its value as we prepare for upcoming Artemis Missions.

Mary Anne Plaza↗

ATAMM analysis tool

Diagnostics software for analyzing Algorithm to Architecture Mapping Model (ATAMM) based concurrent processing systems is presented. ATAMM is capable of modeling the execution of large grain algorithms on distributed data flow architectures. The tool graphically displays algorithm activities and processor activities for evaluation of the behavior and performance of an ATAMM based system. The tool's measurement capabilities indicate computing speed, throughput, concurrency, resource utilization, and overhead. Evaluations are performed on a simulated system using the software tool. The tool is used to estimate theoretical lower bound performance. Analysis results are shown to be comparable to the predictions.

Jones, Robert↗

Exploration Systems Development Mission Directorate: Moon to Mars Architecture Definition Document

The National Aeronautics and Space Administration (NASA) explores the unknown in air and space, innovates for the benefit of humanity, and inspires the world through discovery. Extending the reach of humanity through the human exploration of the Moon, Mars, and beyond is key to that mission. NASA’s Moon to Mars Strategy and Objectives document establishes long-term goals and objectives for crewed deep space exploration; however, satisfying NASA’s Moon to Mars Objectives requires an innovative approach to the definition, management, and execution of NASA’s Moon to Mars Architecture. An architecture offers a high-level unifying structure and defines a system. It provides rules, guidelines, and constraints that define a cohesive and coherent framework that identifies constituent parts, relationships, and connections and establishes how those parts fit and work together. This Architecture Definition Document (ADD) establishes the process for the decomposition of objectives empowers the agency’s success in achieving human exploration of the cosmos. NASA updates this document annually to reflect the maturation of the architecture and the progress NASA and partners make toward achieving exploration objectives. The ADD is not a manifest or requirements document. Instead, it serves as a tool for the programs, projects, and engineers who will implement and execute NASA’s bold ambitions for crewed exploration of deep space. As established in the Moon to Mars Strategy and Objectives, “Why” we explore encompasses three pillars: Science, Inspiration, and National Posture. Ensuring success in all three areas requires an architectural approach that incorporates innovation, collaboration, and partnerships that can be sustained across a multi-decadal effort. This second revision (Rev-B) of the ADD, developed to support NASA’s 2024 Architecture Concept Review (ACR), incorporates several key updates to support the continued evolution of the architecture. Since the last revision of the ADD, NASA has significantly improved the clarity of the objective decomposition, which distills exploration objectives into the characteristics and needs and use cases and functions needed to achieve them. The updated decomposition incorporates findings from internal studies and diverse stakeholder feedback. A model-based systems engineering approach ensures coherence and consistency, removing inconsistency and repetition. Revision B also incorporates advancements to NASA’s Mars architecture, including insight into initial capabilities, systems, and operations necessary to support the Humans to Mars segment. Updates to objective decomposition for Mars add significant detail to the ADD and hint at areas of forward work and future study. An appendix adds greater depth in the future decisions needed for Mars that will drive lunar needs. They are not the only decisions to be made, but they will have huge effects on subsequent decisions. NASA continues to introduce new exploration systems into the architecture. Two new elements — initial surface habitat and lunar surface cargo lander—successfully passed mission concept review in 2024 as a result of extensive analysis, concept refinement, and studies. These elements and their respective reference missions appear in this revision. NASA also continues to apply architecture processes to cross-agency efforts and coordination with external stakeholders by including definitions of architecture technology gaps — essential areas for engagement across and beyond the agency. The technology gaps appendix identifies areas that need attention and innovation to enable future exploration. In publishing this information, NASA communicates the technologies and capabilities that may benefit from partnership with industry, academia, other U.S. government agencies, and international space agencies. Ultimately, NASA established the Moon to Mars Architecture approach to communicate and facilitate humanity’s journey into the universe according to the principles and recurring tenets of NASA’s Moon to Mars Strategy and Objectives. The NASA architecture team thanks their many stakeholders, participants, and partners for their efforts to review and provide feedback. Their support has been critical to the success of this approach.

Elements↗

Common modeling system for digital simulation

The Joint Modeling and Simulation System is a tri-service investigation into a common modeling framework for the development digital models. The basis for the success of this framework is an X-window-based, open systems architecture, object-based/oriented methodology, standard interface approach to digital model construction, configuration, execution, and post processing. For years Department of Defense (DOD) agencies have produced various weapon systems/technologies and typically digital representations of the systems/technologies. These digital representations (models) have also been developed for other reasons such as studies and analysis, Cost Effectiveness Analysis (COEA) tradeoffs, etc. Unfortunately, there have been no Modeling and Simulation (M&S) standards, guidelines, or efforts towards commonality in DOD M&S. The typical scenario is an organization hires a contractor to build hardware and in doing so an digital model may be constructed. Until recently, this model was not even obtained by the organization. Even if it was procured, it was on a unique platform, in a unique language, with unique interfaces, and, with the result being UNIQUE maintenance required. Additionally, the constructors of the model expended more effort in writing the 'infrastructure' of the model/simulation (e.g. user interface, database/database management system, data journalizing/archiving, graphical presentations, environment characteristics, other components in the simulation, etc.) than in producing the model of the desired system. Other side effects include: duplication of efforts; varying assumptions; lack of credibility/validation; and decentralization in policy and execution. J-MASS provides the infrastructure, standards, toolset, and architecture to permit M&S developers and analysts to concentrate on the their area of interest.

Painter, Rick↗

Report from the MPP Working Group to the NASA Associate Administrator for Space Science and Applications

NASA's Office of Space Science and Applications (OSSA) gave a select group of scientists the opportunity to test and implement their computational algorithms on the Massively Parallel Processor (MPP) located at Goddard Space Flight Center, beginning in late 1985. One year later, the Working Group presented its report, which addressed the following: algorithms, programming languages, architecture, programming environments, the way theory relates, and performance measured. The findings point to a number of demonstrated computational techniques for which the MPP architecture is ideally suited. For example, besides executing much faster on the MPP than on conventional computers, systolic VLSI simulation (where distances are short), lattice simulation, neural network simulation, and image problems were found to be easier to program on the MPP's architecture than on a CYBER 205 or even a VAX. The report also makes technical recommendations covering all aspects of MPP use, and recommendations concerning the future of the MPP and machines based on similar architectures, expansion of the Working Group, and study of the role of future parallel processors for space station, EOS, and the Great Observatories era.

Fischer, James R.↗

Enhanced ATAMM for increased throughput performance of multicomputer data flow architectures

The Algorithm To Architecture Mapping Model (ATAMM) is a Petri-net-based model which provides a strategy for periodic execution of a class of real-time algorithms on multicomputer dataflow architectures. The problem domain of particular interest is the execution of large-grained, decision-free algorithms on homogeneous processing elements. Design techniques are discussed and performance measurements are defined. A multiple-graph execution strategy is shown to increase throughput performance. It is shown that the same increase in performance is attainable with minor modifications to the existing ATAMM.

Jones, R. L.↗

Overview and Software Architecture of the Copernicus Trajectory Design and Optimization System

The Copernicus Trajectory Design and Optimization System represents an innovative and comprehensive approach to on-orbit mission design, trajectory analysis and optimization. Copernicus integrates state of the art algorithms in optimization, interactive visualization, spacecraft state propagation, and data input-output interfaces, allowing the analyst to design spacecraft missions to all possible Solar System destinations. All of these features are incorporated within a single architecture that can be used interactively via a comprehensive GUI interface, or passively via external interfaces that execute batch processes. This paper describes the Copernicus software architecture together with the challenges associated with its implementation. Additionally, future development and planned new capabilities are discussed. Key words: Copernicus, Spacecraft Trajectory Optimization Software.

Williams, Jacob↗

A generic fine-grained parallel C

With the present availability of parallel processors of vastly different architectures, there is a need for a common language interface to multiple types of machines. The parallel C compiler, currently under development, is intended to be such a language. This language is based on the belief that an algorithm designed around fine-grained parallelism can be mapped relatively easily to different parallel architectures, since a large percentage of the parallelism has been identified. The compiler generates a FORTH-like machine-independent intermediate code. A machine-dependent translator will reside on each machine to generate the appropriate executable code, taking advantage of the particular architectures. The goal of this project is to allow a user to run the same program on such machines as the Massively Parallel Processor, the CRAY, the Connection Machine, and the CYBER 205 as well as serial machines such as VAXes, Macintoshes and Sun workstations.

Hamet, L.↗