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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
NASA NTRS2008

Silicon-On-Insulator (SOI) Devices and Mixed-Signal Circuits for Extreme Temperature Applications

Electronic systems in planetary exploration missions and in aerospace applications are expected to encounter extreme temperatures and wide thermal swings in their operational environments. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of the missions. Electronic parts based on silicon-on-insulator (SOI) technology are known, based on device structure, to provide faster switching, consume less power, and offer better radiation-tolerance compared to their silicon counterparts. They also exhibit reduced current leakage and are often tailored for high temperature operation. However, little is known about their performance at low temperature. The performance of several SOI devices and mixed-signal circuits was determined under extreme temperatures, cold-restart, and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these devices for use in space exploration missions under extreme temperatures. The experimental results obtained on selected SOI devices are presented and discussed in this paper.

Patterson, Richard↗
NASA NTRS2005

Advances in Single and Multijunction III-V Photovoltaics on Silicon for Space Power

A collaborative research effort at MIT, Ohio State University and NASA has resulted in the demonstration of record quality gallium arsenide (GaAs) based single junction photovoltaic devices on silicon (Si) substrates. The ability to integrate highly efficient, radiation hard III-V based devices on silicon offers the potential for dramatic reductions in cell mass (approx.2x) and increases in cell area. Both of these improvements offer the potential for dramatic reductions in the cost of on-orbit electrical power. Recently, lattice matched InGaP/GaAs and metamorphic InGaP/InGaAs dual junction solar cells were demonstrated by MBE and OMVPE, respectively. Single junction GaAs on Si devices have been integrated into a space flight experiment (MISSES), scheduled to be launched to the International Space Station in March of 2005. I-V performance data from the GaAs/Si will be collected on-orbit and telemetered to ground stations daily. Microcracks in the GaAs epitaxial material, generated because of differences in the thermal expansion coefficient between GaAs and Si, are of concern in the widely varying thermal environment encountered in low Earth orbit. Ground based thermal life cycling (-80 C to + 80 C) equivalent to 1 year in LEO has been conducted on GaAs/Si devices with no discernable degradation in device performance, suggesting that microcracks may not limit the ability to field GaAs/Si in harsh thermal environments. Recent advances in the development and testing of III-V photovoltaic devices on Si will be presented.

Wilt, David M.↗
NASA NTRS1986

Producing Silicon Carbide for Semiconductor Devices

Processes proposed for production of SiC crystals for use in semiconductors operating at temperatures as high as 900 degrees C. Combination of new processes produce silicon carbide chips containing epitaxial layers. Chips of SiC first grown on porous carbon matrices, then placed in fluidized bed, where additional layer of SiC grows. Processes combined to yield complete process. Liquid crystallization process used to make SiC particles or chips for fluidized-bed process.

Hsu, G. C.↗
NASA NTRS2007

SiC Multi-Chip Power Modules as Power-System Building Blocks

The term "SiC MCPMs" (wherein "MCPM" signifies "multi-chip power module") denotes electronic power-supply modules containing multiple silicon carbide power devices and silicon-on-insulator (SOI) control integrated-circuit chips. SiC MCPMs are being developed as building blocks of advanced expandable, reconfigurable, fault-tolerant power-supply systems. Exploiting the ability of SiC semiconductor devices to operate at temperatures, breakdown voltages, and current densities significantly greater than those of conventional Si devices, the designs of SiC MCPMs and of systems comprising multiple SiC MCPMs are expected to afford a greater degree of miniaturization through stacking of modules with reduced requirements for heat sinking. Moreover, the higher-temperature capabilities of SiC MCPMs could enable operation in environments hotter than Si-based power systems can withstand. The stacked SiC MCPMs in a given system can be electrically connected in series, parallel, or a series/parallel combination to increase the overall power-handling capability of the system. In addition to power connections, the modules have communication connections. The SOI controllers in the modules communicate with each other as nodes of a decentralized control network, in which no single controller exerts overall command of the system. Control functions effected via the network include synchronization of switching of power devices and rapid reconfiguration of power connections to enable the power system to continue to supply power to a load in the event of failure of one of the modules. In addition to serving as building blocks of reliable power-supply systems, SiC MCPMs could be augmented with external control circuitry to make them perform additional power-handling functions as needed for specific applications: typical functions could include regulating voltages, storing energy, and driving motors. Because identical SiC MCPM building blocks could be utilized in a variety of ways, the cost and difficulty of designing new, highly reliable power systems would be reduced considerably. Several prototype DC-to-DC power-converter modules containing SiC power-switching devices were designed and built to demonstrate the feasibility of the SiC MCPM concept. In anticipation of a future need for operation at high temperature, the circuitry in the modules includes high-temperature inductors and capacitors. These modules were designed to be stacked to construct a system of four modules electrically connected in series and/or parallel. The packaging of the modules is designed to satisfy requirements for series and parallel interconnection among modules, high power density, high thermal efficiency, small size, and light weight. Each module includes four output power connectors two for serial and two for parallel output power connections among the modules. Each module also includes two signal connectors, electrically isolated from the power connectors, that afford four zones for signal interconnections among the SOI controllers. Finally, each module includes two input power connectors, through which it receives power from an in-line power bus. This design feature is included in anticipation of a custom-designed power bus incorporating sockets compatible with snap-on type connectors to enable rapid replacement of failed modules.

Lostetter, Alexander↗
NASA NTRS1995

Power MOSFETs Formed In Silicon Carbide

High-performance power metal/oxide/semiconductor field-effect transistors (MOSFETs) fabricated in silicon carbide. Devices offer potential advantages over silicon-based MOSFETs, including lower "on" - state resistances at same rated voltages, ability to operate at higher temperatures, and higher thermal conductivity. Also more resistant to damage by ionizing radiation, an advantage for switching appications in nuclear facilities.

Palmour, John W.↗
NASA NTRS2011

Automated Cryocooler Monitor and Control System

A system was designed to automate cryogenically cooled low-noise amplifier systems used in the NASA Deep Space Network. It automates the entire operation of the system including cool-down, warm-up, and performance monitoring. The system is based on a single-board computer with custom software and hardware to monitor and control the cryogenic operation of the system. The system provides local display and control, and can be operated remotely via a Web interface. The system controller is based on a commercial single-board computer with onboard data acquisition capability. The commercial hardware includes a microprocessor, an LCD (liquid crystal display), seven LED (light emitting diode) displays, a seven-key keypad, an Ethernet interface, 40 digital I/O (input/output) ports, 11 A/D (analog to digital) inputs, four D/A (digital to analog) outputs, and an external relay board to control the high-current devices. The temperature sensors used are commercial silicon diode devices that provide a non-linear voltage output proportional to temperature. The devices are excited with a 10-microamp bias current. The system is capable of monitoring and displaying three temperatures. The vacuum sensors are commercial thermistor devices. The output of the sensors is a non-linear voltage proportional to vacuum pressure in the 1-Torr to 1-millitorr range. Two sensors are used. One measures the vacuum pressure in the cryocooler and the other the pressure at the input to the vacuum pump. The helium pressure sensor is a commercial device that provides a linear voltage output from 1 to 5 volts, corresponding to a gas pressure from 0 to 3.5 MPa (approx. = 500 psig). Control of the vacuum process is accomplished with a commercial electrically operated solenoid valve. A commercial motor starter is used to control the input power of the compressor. The warm-up heaters are commercial power resistors sized to provide the appropriate power for the thermal mass of the particular system, and typically provide 50 watts of heat. There are four basic operating modes. "Cool " mode commands the system to cool to normal operating temperature. "Heat " mode is used to warm the device to a set temperature near room temperature. "Pump " mode is a maintenance function that allows the vacuum system to be operated alone to remove accumulated contaminants from the vacuum area. In "Off " mode, no power is applied to the system.

Britcliffe, Michael J.↗
NASA NTRS2007

Design and Fabrication of High-Efficiency CMOS/CCD Imagers

An architecture for back-illuminated complementary metal oxide/semiconductor (CMOS) and charge-coupled-device (CCD) ultraviolet/visible/near infrared- light image sensors, and a method of fabrication to implement the architecture, are undergoing development. The architecture and method are expected to enable realization of the full potential of back-illuminated CMOS/CCD imagers to perform with high efficiency, high sensitivity, excellent angular response, and in-pixel signal processing. The architecture and method are compatible with next-generation CMOS dielectric-forming and metallization techniques, and the process flow of the method is compatible with process flows typical of the manufacture of very-large-scale integrated (VLSI) circuits. The architecture and method overcome all obstacles that have hitherto prevented high-yield, low-cost fabrication of back-illuminated CMOS/CCD imagers by use of standard VLSI fabrication tools and techniques. It is not possible to discuss the obstacles in detail within the space available for this article. Briefly, the obstacles are posed by the problems of generating light-absorbing layers having desired uniform and accurate thicknesses, passivation of surfaces, forming structures for efficient collection of charge carriers, and wafer-scale thinning (in contradistinction to diescale thinning). A basic element of the present architecture and method - the element that, more than any other, makes it possible to overcome the obstacles - is the use of an alternative starting material: Instead of starting with a conventional bulk-CMOS wafer that consists of a p-doped epitaxial silicon layer grown on a heavily-p-doped silicon substrate, one starts with a special silicon-on-insulator (SOI) wafer that consists of a thermal oxide buried between a lightly p- or n-doped, thick silicon layer and a device silicon layer of appropriate thickness and doping. The thick silicon layer is used as a handle: that is, as a mechanical support for the device silicon layer during micro-fabrication.

Pain, Bedabrata↗
NASA NTRS1987

Neutron radiation tolerance of Au-activated silicon

Double injection devices prepared by the introduction of deep traps, using the Au activation method have been found to tolerate gamma irradiation into the Gigarad (Si) region without significant degradation of operating characteristics. Silicon double injection devices, using deep levels creacted by Au diffusion, can tolerate fast neutron irradiation up to 10 to the 15th n/sq cm. Significant parameter degradation occurs at 10 to the 16th n/sq cm. However, since the actual doping of the basic material begins to change as a result of the transmutation of silicon into phosphorus for neutron fluences greater than 10 to the 17th/sq cm, the radiation tolerance of these devices is approaching the limit possible for any device based on initially doped silicon.

Joyner, W. T.↗
NASA NTRS1989

Microwave and millimeter-wave power generation in silicon carbide (SiC) IMPATT devices

There are two points that should be noted. First, in the thermal resistance calculations it is assumed that the device is operating at 773 K while the results of the room temperature simulations are used. This was done because there is not enough information to correctly predict the material parameters at 773 K. Since, in general, device performance degrades with increasing temperature, the cw results are perhaps a bit optimistic. Second, the electric field in these structures gets extremely high and there might be some possibility of tunneling. This was not incorporated into the simulation. Again, this could result in different device operating conditions.

Mehdi, I.↗
NASA NTRS2013

Impact of Total Ionizing Dose Radiation Testing and Long-Term Thermal Cycling on the Operation of CMF20120D Silicon Carbide Power MOSFET

Power systems designed for use in NASA space missions are required to work reliably under harsh conditions including radiation, thermal cycling, and extreme temperature exposures. Silicon carbide devices show great promise for use in future power electronics systems, but information pertaining to performance of the devices in the space environment is very scarce. A silicon carbide N-channel enhancement-mode power MOSFET called the CMF20120 is of interest for use in space environments. Samples of the device were exposed to radiation followed by long-term thermal cycling to address their reliability for use in space applications. The results of the experimental work are presentd and discussed.

thermal cycling tests↗
NASA NTRS1984

Recent developments in semiconductor research

Recent findings drawn from various laboratories focused toward a new understanding of the nature of crystal growth and how impurities are incorporated or excluded from the lattice were considered. From these findings a heuristic approach is given for improving the uniformity and charge carrier concentration of thin semiconductor films. Such improvement is considered essential to achieve respectable yield on large scale integrated circuits. A tentative conclusion is drawn which indicates that if the host compound crystal reactants are provided to the growing crystal surface in a reasonably stoichiometric manner, it is virtually impossible to include impurities into a growing crystal surface held at a sufficiently low temperature; impurities are incorporated into the crystal by gettering action of crystal defects located one and two monlayers beneath the growing surface. Devices in 3-5 semiconductors based on heterojunctions and two dimensional electron gases are noted and reliability concerns are voiced. Alternatives and novel device structures such as truly single crystal high quality silicon on insulator and beta silicon carbide devices are presented.

Yoder, M. N.↗
NASA NTRS1996

High-Field Fast-Risetime Pulse Failures in 4H- and 6H-SiC pn Junction Diodes

We report the observation of anomalous reverse breakdown behavior in moderately doped (2-3 x 10(exp 17 cm(exp -3)) small-area micropipe-free 4H- and 6H-SiC pn junction diodes. When measured with a curve tracer, the diodes consistently exhibited very low reverse leakage currents and sharp repeatable breakdown knees in the range of 140-150 V. However, when subjected to single-shot reverse bias pulses (200 ns pulsewidth, 1 ns risetime), the diodes failed catastrophically at pulse voltages of less than 100 V. We propose a possible mechanism for this anomalous reduction in pulsed breakdown voltage relative to dc breakdown voltage. This instability must be removed so that SiC high-field devices can operate with the same high reliability as silicon power devices.

Neudeck, Philip G.↗
NASA NTRS2016

Silicon-Carbide Power MOSFET Performance in High Efficiency Boost Power Processing Unit for Extreme Environments

Silicon-Carbide device technology has generated much interest in recent years. With superior thermal performance, power ratings and potential switching frequencies over its Silicon counterpart, Silicon-Carbide offers a greater possibility for high powered switching applications in extreme environment. In particular, Silicon-Carbide Metal-Oxide- Semiconductor Field-Effect Transistors' (MOSFETs) maturing process technology has produced a plethora of commercially available power dense, low on-state resistance devices capable of switching at high frequencies. A novel hard-switched power processing unit (PPU) is implemented utilizing Silicon-Carbide power devices. Accelerated life data is captured and assessed in conjunction with a damage accumulation model of gate oxide and drain-source junction lifetime to evaluate potential system performance at high temperature environments.

Ikpe, Stanley A.↗
NASA NTRS1993

Development of Si(1-x)Ge(x) technology for microwave sensing applications

The progress for the first year of the work done under the Director's Discretionary Fund (DDF) research project entitled, 'Development of Si(1-x)Ge(x) Technology for Microwave Sensing Applications.' This project includes basic material characterization studies of silicon-germanium (SiGe), device processing on both silicon (Si) and SiGe substrates, and microwave characterization of transmission lines on silicon substrates. The material characterization studies consisted of ellipsometric and magneto-transport measurements and theoretical calculations of the SiGe band-structure. The device fabrication efforts consisted of establishing SiGe device processing capabilities in the Lewis cleanroom. The characterization of microwave transmission lines included studying the losses of various coplanar transmission lines and the development of transitions on silicon. Each part of the project is discussed individually and the findings for each part are presented. Future directions are also discussed.

Mena, Rafael A.↗
NASA NTRS1972

Hardening electronic devices against very high total dose radiation environments

The possibilities and limitations of hardening silicon semiconductor devices to the high neutron and gamma radiation levels and greater than 10 to the eighth power rads required for the NERVA nuclear engine development are discussed. A comparison is made of the high dose neutron and gamma hardening potential of bipolar, metal insulator semiconductors and junction field effect transistors. Experimental data is presented on device degradation for the high neutron and gamma doses. Previous data and comparisons indicate that the JFET is much more immune to the combined neutron displacement and gamma ionizing effects than other transistor types. Experimental evidence is also presented which indicates that p channel MOS devices may be able to meet the requirements.

Buchanan, B.↗
NASA NTRSDate not supplied

Space Radiation Effects on SiC Power Device Reliability

Heavy-ion radiation can result in silicon carbide power device degradation and/or catastrophic failure. Test procedures and data interpretation must consider the impact that heavy-ion induced off-state leakage current increases will have on subsequent single-event effect susceptibility and testability. On orbit, reliable performance in the presence of increased off-state leakage currents due to cumulative ion-induced non-catastrophic single-event effects must be assured over the mission lifetime. This work presents a large body of heavy-ion test data for different diode, power MOSFET, and JFET devices. Susceptibility to single-event effects is compared between SiC and Si power devices. Initial recommendations on heavy-ion radiation test methods for silicon carbide power devices are made and radiation hardness assurance is discussed with the goal of moving one step closer to reliably getting this technology off the ground into a broad array of spacecraft and instruments that will benefit from its unique capabilities.

diode↗