Search NASA⌕ Search

SEARCH · Search NASA

Results for “transistor scaling”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 127 records · Page 7

Redox transistors based on TiO 2 for analogue neuromorphic computing

The ability to train deep neural networks on large data sets have made significant impacts onto artificial intelligence, but consume significant amounts of energy due to the need to move information from memory to logic units. In-memory "neuromorphic" computing presents an alternative framework that processes information directly on memory elements. In-memory computing has been limited by the poor performance of the analogue information storage element, often phase-change memory or memristors. To solve this problem, we developed two types of "redox transistors" using TiO 2 (anatase) which stores analogue information states through the electrochemical concentration of dopants in the crystal. The first type of redox transistor uses lithium as the electrochemical dopant ion, and its key advantage is low operating voltage. The second uses oxygen vacancies as the dopant, which is CMOS compatible and can retain state even when scaled to nanosized dimensions. Both devices offer significant advantages in terms of predictable analogue switching over conventional filamentary-based devices, and provide a significant advance in developing materials and devices for neuromorphic computing.

36 MATERIALS SCIENCE↗

First Demonstration of Vertical 2T-nC FeRAM Hybrid Cell and its Scalability for High-Density 3D Ferroelectric Capacitor Memory

In this article, we perform a comprehensive experimental and modeling study into the scaling of vertical 2T-nC ferroelectric random-access memory (FeRAM) hybrid cell to demonstrate a high performance and high-density 3D capacitor memory. We demonstrate: i) first time successful integration of the vertical 2T-3C FeRAM cell by stacking the vertical metal-ferroelectricmetal (MFM) stack on top of Si CMOS transistors; ii) successful experimental operation of the memory cell, including the quasi-nondestructive read out (QNRO) of the polarization without write back after 106 read cycles; iii) the write bit line (WBL) heavily screens the coupling between neighboring strings, making it a minor concern; V ) aggressive stacking of the WBLs, i.e., number of MFMs in a string, could facilitate the self-boosting during write operation due to ferroelectric linear capacitance (CFE), which allows self-boosted inhibition for Vw/2 scheme and worsens the Vw/3 scheme as disturb increases to intolerable 2Vw/3; v) aggressive horizontal scaling significantly increases the read disturb to cells on neighboring planes due to capacitance between two WBLs (Cz).

42 ENGINEERING↗

Tunable Solid‐State Properties and Anisotropic Charge Mobility in Hydrogen‐Bonded Diketopyrrolopyrrole Polymers via Automated Device Fabrication and Characterization

The optoelectronic properties of semiconducting polymers and device performance rely on a delicate interplay of design and processing conditions. However, screening and optimizing the relationships between these parameters for reliably fabricating organic electronics can be an arduous task requiring significant time and resources. To overcome this challenge, Polybot is developed—a robotic platform within a self‐driving lab that can efficiently produce organic field‐effect transistors (OFETs) from various semiconducting polymers via high‐throughput blade coating deposition. Polybot not only handles the fabrication process but also can conduct characterization tests on the devices and autonomously analyze the data gathered, thus facilitating the rapid acquisition of data on a large scale. This work leverages the capabilities of this platform to investigate the fabrication of OFETs using hydrogen bonding‐containing semiconducting polymers. Through high‐throughput fabrication and characterization, various data trends are analyzed, and large extents of anisotropic charge mobility are observed in devices. The materials are thoroughly characterized to understand the role of processing conditions in solid state and electronic properties of these organic semiconductors. The findings demonstrate the effectiveness of automated fabrication and characterization platforms in uncovering novel structure–property relationships, facilitating refinement of rational chemical design, and processing conditions, ultimately leading to new semiconducting materials.

automated fabrication and characterization↗

Scalable Substitutional Re‐Doping and its Impact on the Optical and Electronic Properties of Tungsten Diselenide

Abstract Reliable, controlled doping of 2D transition metal dichalcogenides will enable the realization of next‐generation electronic, logic‐memory, and magnetic devices based on these materials. However, to date, accurate control over dopant concentration and scalability of the process remains a challenge. Here, a systematic study of scalable in situ doping of fully coalesced 2D WSe 2 films with Re atoms via metal–organic chemical vapor deposition is reported. Dopant concentrations are uniformly distributed over the substrate surface, with precisely controlled concentrations down to <0.001% Re achieved by tuning the precursor partial pressure. Moreover, the impact of doping on morphological, chemical, optical, and electronic properties of WSe 2 is elucidated with detailed experimental and theoretical examinations, confirming that the substitutional doping of Re at the W site leads to n‐type behavior of WSe 2 . Transport characteristics of fabricated back‐gated field‐effect‐transistors are directly correlated to the dopant concentration, with degrading device performances for doping concentrations exceeding 1% of Re. The study demonstrates a viable approach to introducing true dopant‐level impurities with high precision, which can be scaled up to batch production for applications beyond digital electronics.

Kozhakhmetov, Azimkhan↗

Development of design, qualification, screening, and application requirements for plastic encapsulated solid-state devices for space applications

Test data were collected on 1035 plastic encapsulated devices and 75 hermetically scaled control group devices that were purchased from each of five different manufacturers in the categories of (1) low power Schottsky TTL (bipolar) digital circuits; (2) CMOS digital circuits; (3) operational amplifier linear circuits; and (4) NPN transistors. These parts were subjected to three different initial screening conditions, then to extended life testing, to determine any possible advantages or trends for any particular screen. Several tests were carried out in the areas of flammability testing, humidity testing, high pressure steam (auroclave) testing, and high temperature storage testing. Test results are presented. Procurement and application considerations for use of plastic encapsulated semiconductors are presented and a statistical analysis program written to study the log normal distributions resulting from life testing is concluded.

Source record↗

Gate-Tunable Semiconductor Heterojunctions from 2D/3D van der Waals Interfaces

Van der Waals (vdW) semiconductors are attractive for highly scaled devices and heterogeneous integration since they can be isolated into self-passivated, two-dimensional (2D) layers that enable superior electrostatic control. These attributes have led to numerous demonstrations of field-effect devices ranging from transistors to triodes. By exploiting the controlled, substitutional doping schemes in covalently-bonded, three-dimensional (3D) semiconductors and the passivated surfaces of 2D semiconductors, one can construct devices that can exceed performance metrics of “all-2D” vdW heterojunctions. Here, we demonstrate, 2D/3D semiconductor heterojunctions using MoS2 as the prototypical 2D semiconductor laid upon Si and GaN as the 3D semiconductor layers. By tuning the Fermi levels in MoS2, we demonstrate devices that concurrently exhibit over seven orders of magnitude modulation in rectification ratios and conductance. Our results further suggest that the interface quality does not necessarily affect Fermi-level tuning at the junction opening up possibilities for novel 2D/3D heterojunction device architectures

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Minimizing the area required for time constants in integrated circuits

When a medium- or large-scale integrated circuit is designed, efforts are usually made to avoid the use of resistor-capacitor time constant generators. The capacitor needed for this circuit usually takes up more surface area on the chip than several resistors and transistors. When the use of this network is unavoidable, the designer usually makes an effort to see that the choice of resistor and capacitor combinations is such that a minimum amount of surface area is consumed. The optimum ratio of resistance to capacitance that will result in this minimum area is equal to the ratio of resistance to capacitance which may be obtained from a unit of surface area for the particular process being used. The minimum area required is a function of the square root of the reciprocal of the products of the resistance and capacitance per unit area. This minimum occurs when the area required by the resistor is equal to the area required by the capacitor.

Lyons, J. C.↗

Fabrication of Single, Vertically Aligned Carbon Nanotubes in 3D Nanoscale Architectures

Plasma-enhanced chemical vapor deposition (PECVD) and high-throughput manufacturing techniques for integrating single, aligned carbon nanotubes (CNTs) into novel 3D nanoscale architectures have been developed. First, the PECVD growth technique ensures excellent alignment of the tubes, since the tubes align in the direction of the electric field in the plasma as they are growing. Second, the tubes generated with this technique are all metallic, so their chirality is predetermined, which is important for electronic applications. Third, a wafer-scale manufacturing process was developed that is high-throughput and low-cost, and yet enables the integration of just single, aligned tubes with nanoscale 3D architectures with unprecedented placement accuracy and does not rely on e-beam lithography. Such techniques should lend themselves to the integration of PECVD grown tubes for applications ranging from interconnects, nanoelectromechanical systems (NEMS), sensors, bioprobes, or other 3D electronic devices. Chemically amplified polyhydroxystyrene-resin-based deep UV resists were used in conjunction with excimer laser-based (lambda = 248 nm) step-and-repeat lithography to form Ni catalyst dots = 300 nm in diameter that nucleated single, vertically aligned tubes with high yield using dc PECVD growth. This is the first time such chemically amplified resists have been used, resulting in the nucleation of single, vertically aligned tubes. In addition, novel 3D nanoscale architectures have been created using topdown techniques that integrate single, vertically aligned tubes. These were enabled by implementing techniques that use deep-UV chemically amplified resists for small-feature-size resolution; optical lithography units that allow unprecedented control over layer-to-layer registration; and ICP (inductively coupled plasma) etching techniques that result in near-vertical, high-aspect-ratio, 3D nanoscale architectures, in conjunction with the use of materials that are structurally and chemically compatible with the high-temperature synthesis of the PECVD-grown tubes. The techniques offer a wafer-scale process solution for integrating single PECVD-grown nanotubes into novel architectures that should accelerate their integration in 3D electronics in general. NASA can directly benefit from this technology for its extreme-environment planetary missions. Current Si transistors are inherently more susceptible to high radiation, and do not tolerate extremes in temperature. These novel 3D nanoscale architectures can form the basis for NEMS switches that are inherently less susceptible to radiation or to thermal extremes.

Kaul, Anupama B.↗

Insulator-to-metal phase transition in a few-layered MoSe 2 field effect transistor

The metal-to-insulator phase transition (MIT) in low-dimensional materials and particularly two-dimensional layered semiconductors is exciting to explore due to the fact that it challenges the prediction that a two-dimensional system must be insulating at low temperatures. Thus, the exploration of MITs in 2D layered semiconductors expands the understanding of the underlying physics. Here we report the MIT of a few-layered MoSe 2 field effect transistor under a gate bias (electric field) applied perpendicular to the MoSe 2 layers. With low applied gate voltage, the conductivity as a function of temperature from 150 K to 4 K shows typical semiconducting to insulating character. Above a critical applied gate voltage, V c , the conductivity becomes metallic (i.e., the conductivity increases continuously as a function of decreasing temperature). Evidence of a metallic state was observed using an applied gate voltage or, equivalently, increasing the density of charge carriers within the 2D channel. We analyzed the nature of the phase transition using percolation theory, where conductivity scales with the density of charge carriers as σ ∝ (n - n c ) δ . The critical exponent for a percolative phase transition, δ(T), has values ranging from 1.34 (at T = 150 K) to 2 (T = 20 K), which is close to the theoretical value of 1.33 for percolation to occur. Thus we conclude that the MIT in few-layered MoSe 2 is driven by charge carrier percolation. Finally, the conductivity does not scale with temperature, which is a hallmark of a quantum critical phase transition.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Active CPW-fed slot antennas for power combining applications

We have combined integrated circuit antenna technology with microwave oscillator design to build an active slot-oscillator. The design is planar, does not require via holes and is compatible with monolithic transistor technology. The CPW-fed antenna impedance is calculated using a full-wave analysis technique. Slot-oscillators were built at 7, 13, and 22 GHz, and the predicted oscillation frequencies agree well with experiments. The design is easily scaled to millimeter-wave frequencies and can be extended to power combining arrays.

Kormanyos, Brian K.↗

The QUIET Instrument

The Q/U Imaging ExperimenT (QUIET) is designed to measure polarization in the Cosmic Microwave Background, targeting the imprint of inflationary gravitational waves at large angular scales ( approx 1 deg.) . Between 2008 October and 2010 December, two independent receiver arrays were deployed sequentially on a 1.4 m side-fed Dragonian telescope. The polarimeters which form the focal planes use a highly compact design based on High Electron Mobility Transistors (HEMTs) that provides simultaneous measurements of the Stokes parameters Q, U, and I in a single module. The 17-element Q-band polarimeter array, with a central frequency of 43.1 GHz, has the best sensitivity (69 micro Ks(exp 1/2)) and the lowest instrumental systematic errors ever achieved in this band, contributing to the tensor-to-scalar ratio at r < 0.1. The 84-element W-band polarimeter array has a sensitivity of 87 micro Ks(exp 1/2) at a central frequency of 94.5 GHz. It has the lowest systematic errors to date, contributing at r < 0.01 (QUIET Collaboration 2012) The two arrays together cover multipoles in the range l approximately equals 25-975 . These are the largest HEMT-ba.sed arrays deployed to date. This article describes the design, calibration, performance of, and sources of systematic error for the instrument,

Gaier, T.↗

Improved transistorized AC motor controller for battery powered urban electric passenger vehicles

An ac motor controller for an induction motor electric vehicle drive system was designed, fabricated, tested, evaluated, and cost analyzed. A vehicle performance analysis was done to establish the vehicle tractive effort-speed requirements. These requirements were then converted into a set of ac motor and ac controller requirements. The power inverter is a three-phase bridge using power Darlington transistors. The induction motor was optimized for use with an inverter power source. The drive system has a constant torque output to base motor speed and a constant horsepower output to maximum speed. A gear shifting transmission is not required. The ac controller was scaled from the base 20 hp (41 hp peak) at 108 volts dec to an expanded horsepower and battery voltage range. Motor reversal was accomplished by electronic reversal of the inverter phase sequence. The ac controller can also be used as a boost chopper battery charger. The drive system was tested on a dynamometer and results are presented. The current-controlled pulse width modulation control scheme yielded improved motor current waveforms. The ac controller favors a higher system voltage.

Peak, S. C.↗

Synergistic Use of Pyridine and Selenophene in a Diketopyrrolopyrrole‐Based Conjugated Polymer Enhances the Electron Mobility in Organic Transistors

Abstract To achieve semiconducting materials with high electron mobility in organic field‐effect transistors (OFETs), low‐lying energy levels (the highest occupied molecular orbital (HOMO) and the lowest unoccupied molecular orbital (LUMO)) and favorable molecular packing and ordering are two crucial factors. Here, it is reported that the incorporation of pyridine and selenophene into the backbone of a diketopyrrolopyrrole (DPP)‐based copolymer produces a high‐electron‐mobility semiconductor, PDPPy‐Se. Compared with analogous polymers based on other DPP derivatives and selenophene, PDPPy‐Se features a lower LUMO that can decrease the electron transfer barrier for more effective electron injection, and simultaneously a lower HOMO that, however, can increase the hole transfer barrier to suppress the hole injection. Combined with thermal annealing at 240 °C for thin film morphology optimization to achieve large‐scale crystallite domains with tight molecular packing for effective charge transport along the conducting channel, OFET devices fabricated with PDPPy‐Se exhibit an n‐type‐dominant performance with an electron mobility (μ e ) as high as 2.22 cm 2 V −1 s −1 and a hole/electron mobility ratio (μ h /μ e ) of 0.26. Overall, this study demonstrates a simple yet effective approach to boost the electron mobility in organic transistors by synergistic use of pyridine and selenophene in the backbone of a DPP‐based copolymer.

Liu, Qian↗

Molecular Engineering of 2D Nanomaterial Field-Effect Transistor Sensors: Fundamentals and Translation across Innovation Spectrum

We report over the last decade, 2D layered nanomaterials have attracted significant attention across the scientific community due to their rich and exotic properties. Various nanoelectronic devices based on these 2D nanomaterials have been explored and demonstrated, including those for environmental applications. Here, the fundamental attributes of 2D layered nanomaterials for field-effect transistor (FET) sensors and tunneling FET (TFET) sensors, which provide versatile detection of water contaminants such as heavy-metal ions, bacteria, nutrients, and organic pollutants, are discussed. The major challenges and opportunities are also outlined for designing and fabricating 2D nanomaterial FET/TFET sensors with superior performance. Translation of these FET/TFET sensors from fundamental research to applied technology is illustrated through a case study on graphene-based real-time FET water sensors. A second case study centers on large-scale sensor networks for water-quality monitoring to enable intelligent drinking water and river-water systems. Overall, 2D nanomaterial FET sensors have significant potential for enabling a human-centered intelligent water system that can likely be applied to other precarious water supplies around the globe.

2D nanomaterials↗

A 24-channel ultra-low-noise preamplifier for dN/dx measurements with drift tube detectors

Cluster counting $(dN/dx)$ is a promising method to enhance particle identification for gaseous detectors, especially in next-generation collider experiments like the FCC-ee, where good $π/K$ separation over a broad momentum range is essential. However, its implementation in large-scale systems has been limited by the challenging requirements for high-resolution signal amplification and readout. This paper presents a 24-channel ultra-low-noise preamplifier board designed for drift tube detectors to enable $dN/dx$ measurements. The three-stage amplification topology employs SiGe transistors and integrates dedicated noise-minimization techniques, achieving a charge gain of 21.11 mV/fC from 0.3 fC to 50 fC, a bandwidth of 542 MHz, and a voltage gain of 47.8 dB. The measured voltage noise density is 0.35 nV/$\sqrt{\textrm{Hz}}$ , surpassing most of the state-of-the-art preamplifiers for gaseous and silicon detectors. Validation tests conducted on the sMDT chambers at the CERN Proton Synchrotron test beam facility demonstrate that the proposed design meets the stringent preamplifier requirements for implementing the $dN/dx$ method in drift-tube detector systems, achieving an equivalent noise charge of 0.14 fC and a signal-to-noise ratio of 73 when operated with a He:iC 4 H 10 (90:10) gas mixture. The design also shows promise for broader application in other gaseous or semiconductor detectors.

Drift tube detector↗

Insights into negative differential resistance in MoS 2 Esaki diodes: A first-principles perspective

MoS 2 is a two-dimensional material with a band gap depending on the number of layers and tunable by an external electric field. The experimentally observed intralayer band-to-band tunneling and interlayer band-to-band tunneling in this material present an opportunity for new electronic applications in tunnel field-effect transistors. However, such a widely accepted concept has yet to be been supported by theoretical investigations based on first principles. In this paper, using density functional theory, in conjunction with nonequilibrium Green's function techniques and our electric field gating method, enabled by a large-scale computational approach, we study the relation between band alignment and transmission in planar and side-stack MoS 2 p–i–n junction configurations. Here, we demonstrate the presence of negative differential resistance for both in-plane and interlayer current, a staple characteristic of tunnel diode junctions, and analyze the physical origin of such an effect. Electrostatic potentials, the van der Waals barrier, and a complex band analysis are also examined for a thorough understanding of Esaki diodes.

74 ATOMIC AND MOLECULAR PHYSICS↗

Planar dielectric resonator stabilized HEMT oscillator integrated with CPW/aperture coupled patch antenna

A new design of an active antenna with a dielectric resonator stabilized high electron mobility transistor (HEMT) oscillator (DRO) and an aperture-coupled patch antenna is reported. The circuit is fabricated using coplanar waveguide (CPW) with the oscillator and the antenna on opposite sides of the substrate. The active antenna was demonstrated at 7.6 GHz; however, the design can be scaled to higher frequencies. Excellent oscillator characteristics and radiation patterns were obtained.

Simons, Rainee N.↗

Planar dielectric resonator stabilized HEMT oscillator integrated with CPW/aperture coupled patch antenna

A design of an active antenna with a dielectric resonator stabilized high-electron-mobility transistor (HEMT) oscillator (DRO) and an aperture-coupled patch antenna is reported. The circuit is fabricated using coplanar waveguide (CPW) with the oscillator and the antenna on opposite sides of the substrate. The active antenna was demonstrated at 7.6 GHz; however, the design can be scaled to higher frequencies. Excellent oscillator characteristics and radiation patterns were obtained.

Simons, Rainee N.↗