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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
NASA NTRS1983

An improved logarithmic amplifier circuit for PDS microdensitometers

A high-speed logarithmic-amplifier circuit for a PDS microdensitometer is discussed. The circuit is designed around a 757P log-amp module which replaces the FMI 531 'Negative Log/Anti-log' device of the original. The new amplifier is capable of producing undistorted profiles of rapidly changing, dense images over the available range of scanning speeds. The circuit board has been designed to directly replace the manufacturer supplied unit; neither electrical nor mechanical modifications of the basic PDS are required. The performance of the circuit is illustrated through its effects on the overall Modulation Transfer Function of the instrument and by scans of a well-exposed stellar image. Circuit diagrams and parts lists are presented.

Anderson, C. M.↗
NASA NTRS1985

Split-cross-bridge resistor for testing for proper fabrication of integrated circuits

An electrical testing structure and method is described whereby a test structure is fabricated on a large scale integrated circuit wafer along with the circuit components and has a van der Pauw cross resistor in conjunction with a bridge resistor and a split bridge resistor, the latter having two channels each a line width wide, corresponding to the line width of the wafer circuit components, and with the two channels separated by a space equal to the line spacing of the wafer circuit components. The testing structure has associated voltage and current contact pads arranged in a two by four array for conveniently passing currents through the test structure and measuring voltages at appropriate points to calculate the sheet resistance, line width, line spacing, and line pitch of the circuit components on the wafer electrically.

Buehler, M. G.↗
NASA NTRS1986

Coating Circuit Boards With Silicone

Techniques appropriate to boards containing CMOS circuits detailed. Document presents procedure for applying thin conformal coating to such electronic assemblies as printed-circuit boards and wire-wrapped boards. Coating is from 1 to 7 mils (25 to 178 micrometers) thick and composed of room-temperature-vulcanizing (RTV) silicone. Specifies materials, equipment, spraying method, and quality requirements. Takes into account special needs of circuits made with complementary metal-oxide/semiconductor (CMOS) devices on circuit boards. Special attention given to preventing damage by electrostatic discharge, to which CMOS circuits especially sensitive.

Gaudiano, S.↗
NASA NTRS1986

Solenoid-Simulation Circuit

Electrical properties of solenoids imitated for tests of control circuits. Simulation circuit imitates voltage and current responses of two engine-controlling solenoids. Used in tests of programs of digital engine-control circuits, also provides electronic interface with circuits imitating electrical properties of pressure sensors and linear variable-differential transformers. Produces voltages, currents, delays, and discrete turnon and turnoff signals representing operation of solenoid in engine-control relay. Many such circuits used simulating overall engine circuitry.

Simon, R. A.↗
NASA NTRS1986

Four-micron period ion-implanted bubble test circuits

Packaged magnetic bubble test circuits made with 4-micron period ion-implanted circuits were operated over -55 to +110 C. The circuits used bidirectional transfer and nondestructive detection and were made on bismuth-containing magnetic garnet films. Passivated circuits that incorporated an improved transfer conductor design were operated on films with higher Gilbert damping parameters. Potential advantages to using films with lower bubble aspect ratios for ion-implanted circuits are discussed. However nondestructive read-out detection was not realized with these 'flat' bubbles.

Nelson, T. J.↗
NASA NTRS1986

Double layers and circuits in astrophysics

As the rate of energy release in a double layer with voltage delta V is P approx I delta V, a double layer must be treated as a part of a circuit which delivers the current I. As neither double layer nor circuit can be derived from magnetofluid models of a plasma, such models are useless for treating energy transfer by means of double layers. They must be replaced by particle models and circuit theory. A simple circuit is suggested which is applied to the energizing of auroral particles, to solar flares, and to intergalactic double radio sources. Application to the heliospheric current systems leads to the prediction of two double layers on the Sun's axis which may give radiations detectable from Earth. Double layers in space should be classified as a new type of celestial object (one example is the double radio sources). It is tentatively suggested in X-ray and Gamma-ray bursts may be due to exploding double layers (although annihilation is an alternative energy source). A study of how a number of the most used textbooks in astrophysics treat important concepts like double layers, critical velocity, pinch effects and circuits is made.

Alfven, Hannes↗
NASA NTRS1987

Processing circuit with asymmetry corrector and convolutional encoder for digital data

A processing circuit is provided for correcting for input parameter variations, such as data and clock signal symmetry, phase offset and jitter, noise and signal amplitude, in incoming data signals. An asymmetry corrector circuit performs the correcting function and furnishes the corrected data signals to a convolutional encoder circuit. The corrector circuit further forms a regenerated clock signal from clock pulses in the incoming data signals and another clock signal at a multiple of the incoming clock signal. These clock signals are furnished to the encoder circuit so that encoded data may be furnished to a modulator at a high data rate for transmission.

Pfiffner, Harold J.↗
NASA NTRS1991

Interface Circuit For Printer Port

Electronic circuit, called printer-port interface circuit (PPI) developed to overcome certain disadvantages of previous methods for connecting IBM PC or PC-compatible computer to other equipment. Has both reading and writing modes of operation. Very simple, requiring only six integrated circuits. Provides for moderately fast rates of transfer of data and uses existing unmodified circuit card in IBM PC. When used with appropriate software, circuit converts printer port on IBM PC, XT, AT, or compatible personal computer to general purpose, 8-bit-data, 16-bit address bus that connects to multitude of devices.

Tucker, Jerry H.↗
NASA NTRS1991

Thermocouple-Signal-Conditioning Circuit

Thermocouple-signal-conditioning circuit acting in conjunction with thermocouple, exhibits electrical behavior of voltage in series with resistance. Combination part of input bridge circuit of controller. Circuit configured for either of two specific applications by selection of alternative resistances and supply voltages. Includes alarm circuit detecting open circuit in thermocouple and provides off-scale output to signal malfunctions.

Simon, Richard A.↗
NASA NTRS1991

Multiphase complete exchange on a circuit switched hypercube

On a distributed memory parallel computer, the complete exchange (all-to-all personalized) communication pattern requires each of n processors to send a different block of data to each of the remaining n - 1 processors. This pattern is at the heart of many important algorithms, most notably the matrix transpose. For a circuit switched hypercube of dimension d(n = 2(sup d)), two algorithms for achieving complete exchange are known. These are (1) the Standard Exchange approach that employs d transmissions of size 2(sup d-1) blocks each and is useful for small block sizes, and (2) the Optimal Circuit Switched algorithm that employs 2(sup d) - 1 transmissions of 1 block each and is best for large block sizes. A unified multiphase algorithm is described that includes these two algorithms as special cases. The complete exchange on a hypercube of dimension d and block size m is achieved by carrying out k partial exchange on subcubes of dimension d(sub i) Sigma(sup k)(sub i=1) d(sub i) = d and effective block size m(sub i) = m2(sup d-di). When k = d and all d(sub i) = 1, this corresponds to algorithm (1) above. For the case of k = 1 and d(sub i) = d, this becomes the circuit switched algorithm (2). Changing the subcube dimensions d, varies the effective block size and permits a compromise between the data permutation and block transmission overhead of (1) and the startup overhead of (2). For a hypercube of dimension d, the number of possible combinations of subcubes is p(d), the number of partitions of the integer d. This is an exponential but very slowly growing function and it is feasible over these partitions to discover the best combination for a given message size. The approach was analyzed for, and implemented on, the Intel iPSC-860 circuit switched hypercube. Measurements show good agreement with predictions and demonstrate that the multiphase approach can substantially improve performance for block sizes in the 0 to 160 byte range. This range, which corresponds to 0 to 40 floating point numbers per processor, is commonly encountered in practical numeric applications. The multiphase technique is applicable to all circuit-switched hypercubes that use the common e-cube routing strategy.

Bokhari, Shahid H.↗
NASA NTRS1991

Applications of a high power four-way power divider and combiner and a cross-over circuit

Circuits of rectangular waveguides coupled to a cylindrical cavity have been studied. Two types of circuits were developed: a high-power four-way power divider/combiner with less than 0.5 dB insertion loss over a 20 percent bandwidth and a high-power four-port cross-over circuit with less than 0.7 dB insertion loss and 20 dB isolation at X-band. To demonstrate the feasibility of the first circuit, a power combiner was built by connecting four Gunn oscillators to the four rectangular waveguide ports of the radial waveguide. A power combining efficiency of over 70 percent was achieved at X-band. The second circuit was used to feed a dual-polarization cross-slot antenna backed by a cylindrical cavity.

Chang, Kai↗
NASA NTRS1993

Another Nulling Hall-Effect Current-Measuring Circuit

Lightweight, low-power circuit provides noncontact measurement of alternating or direct current of many ampheres in main conductor. Advantages of circuit over other nulling Hall-effect current-measuring circuits is stability and accuracy increased by putting both analog-to-digital and digital-to-analog converters in nulling feedback loop. Converters and rest of circuit designed for operation at sampling rate of 100 kHz, but rate changed to alter time or frequency response of circuit.

Thibodeau, Phillip E.↗
NASA NTRS1992

Circuit design tool. User's manual, revision 2

The CAM chip design was produced in a UNIX software environment using a design tool that supports definition of digital electronic modules, composition of these modules into higher level circuits, and event-driven simulation of these circuits. Our design tool provides an interface whose goals include straightforward but flexible primitive module definition and circuit composition, efficient simulation, and a debugging environment that facilitates design verification and alteration. The tool provides a set of primitive modules which can be composed into higher level circuits. Each module is a C-language subroutine that uses a set of interface protocols understood by the design tool. Primitives can be altered simply by recoding their C-code image; in addition new primitives can be added allowing higher level circuits to be described in C-code rather than as a composition of primitive modules--this feature can greatly enhance the speed of simulation.

Miyake, Keith M.↗
NASA NTRS1991

Monolithic microwave integrated circuits for sensors, radar, and communications systems; Proceedings of the Meeting, Orlando, FL, Apr. 2-4, 1991

Consideration is given to MMICs for airborne phased arrays, monolithic GaAs integrated circuit millimeter wave imaging sensors, accurate design of multiport low-noise MMICs up to 20 GHz, an ultralinear low-noise amplifier technology for space communications, variable-gain MMIC module for space applications, a high-efficiency dual-band power amplifier for radar applications, a high-density circuit approach for low-cost MMIC circuits, coplanar SIMMWIC circuits, recent advances in monolithic phased arrays, and system-level integrated circuit development for phased-array antenna applications. Consideration is also given to performance enhancement in future communications satellites with MMIC technology insertion, application of Ka-band MMIC technology for an Orbiter/ACTS communications experiment, a space-based millimeter wave debris tracking radar, low-noise high-yield octave-band feedback amplifiers to 20 GHz, quasi-optical MESFET VCOs, and a high-dynamic-range mixer using novel balun structure.

Leonard, Regis F.↗
NASA NTRS1990

Self arbitrated VLSI asynchronous sequential circuits

A new class of asynchronous sequential circuits is introduced in this paper. The new design procedures are oriented towards producing asynchronous sequential circuits that are implemented with CMOS VLSI and take advantage of pass transistor technology. The first design algorithm utilizes a standard Single Transition Time (STT) state assignment. The second method introduces a new class of self synchronizing asynchronous circuits which eliminates the need for critical race free state assignments. These circuits arbitrate the transition path action by forcing the circuit to sequence through proper unstable states. These methods result in near minimum hardware since only the transition paths associated with state variable changes need to be implemented with pass transistor networks.

Whitaker, S.↗
NASA NTRS1990

Assessing the SEU resistance of CMOS latches using alpha-particle sensitive test circuits

The importance of Cosmic Rays on the performance of integrated circuits (IC's) in a space environment is evident in the upset rate of the Tracking and Data Relay Satellite (TDRS) launched in Apr. 1983. This satellite experiences a single-event-upset (SEU) per day which must be corrected from the ground. Such experience caused a redesign of the Galileo spacecraft with SEU resistant IC's. The solution to the SEU problem continues to be important as the complexity of spacecraft grows, the feature size of IC's decreases, and as space systems are designed with circuits fabricated at non-radiation hardened foundries. This paper describes an approach for verifying the susceptibility of CMOS latches to heavy-ion induced state changes. The approach utilizes alpha particles to induce the upsets in test circuits. These test circuits are standard cells that have offset voltages which sensitize the circuits to upsets. These results are then used to calculate the upsetability at operating voltages. In this study results are presented for the alpha particle upset of a six-transistor static random access memory (SRAM) cell. Then a methodology is described for the analysis of a standard-cell inverter latch.

Buehler, M.↗
NASA NTRS1991

High accuracy switched-current circuits using an improved dynamic mirror

The switched-current technique, a recently developed circuit approach to analog signal processing, has emerged as an alternative/compliment to the well established switched-capacitor circuit technique. High speed switched-current circuits offer potential cost and power savings over slower switched-capacitor circuits. Accuracy improvements are a primary concern at this stage in the development of the switched-current technique. Use of the dynamic current mirror has produced circuits that are insensitive to transistor matching errors. The dynamic current mirror has been limited by other sources of error including clock-feedthrough and voltage transient errors. In this paper we present an improved switched-current building block using the dynamic current mirror. Utilizing current feedback the errors due to current imbalance in the dynamic current mirror are reduced. Simulations indicate that this feedback can reduce total harmonic distortion by as much as 9 dB. Additionally, we have developed a clock-feedthrough reduction scheme for which simulations reveal a potential 10 dB total harmonic distortion improvement. The clock-feedthrough reduction scheme also significantly reduces offset errors and allows for cancellation with a constant current source. Experimental results confirm the simulated improvements.

Zweigle, G.↗
NASA NTRS1991

Pulse mode VLSI asynchronous circuits

A new basic VLSI circuit element is presented that can be used to realize pulse mode asynchronous sequential circuits. A synthesis procedure is developed along with an unconventional state assignment procedure. Level input asynchronous sequential circuits can be realized by converting a regular flow table into a differential mode flow table, thereby allowing the new synthesis technique to be general. The new circuits tolerate 1-1 crossovers. This circuit also provides a means for state sequence detection and real time fault detection.

Chen, Q.↗