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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8

Design and evaluation of FDDI fiber optics networkfor Ethernets, VAX's and Ingraph work stations

The purpose of this project is to design and evaluate the FDDI Fiber Optics Network for Ethernets, VAX's, and Ingraph work stations. From the KSC Headquarters communication requirement, it would be necessary to develop the FDDI network based on IEEE Standards outlined in the ANSI X3T9.5, Standard 802.3 and 802.5 topology - direct link via intermediate concentrator and bridge/router access. This analysis should examine the major factors that influence the operating conditions of the Headquarters Fiber plant. These factors would include, but are not limited to the interconnecting devices such as repeaters, bridges, routers and many other relevant or significant FDDI characteristics. This analysis is needed to gain a better understanding of overall FDDI performance.

Wernicki, M. Chris↗

Method and apparatus for implementing a maximum-likelihood decoder in a hypercube network

A method and a structure to implement maximum-likelihood decoding of convolutional codes on a network of microprocessors interconnected as an n-dimensional cube (hypercube). By proper reordering of states in the decoder, only communication between adjacent processors is required. Faster and more efficient operation is enabled, and decoding of large constraint length codes is feasible using standard VLSI technology.

Pollara-Bozzola, Fabrizio↗

Modular hardware synthesis using an HDL

Although hardware description languages (HDL) are becoming more and more necessary to automated design systems, their application is complicated due to the difficulty in translating the HDL description into an implementable format, nonfamiliarity of hardware designers with high-level language programming, nonuniform design methodologies and the time and costs involved in transfering HDL design software. Digital design language (DDL) suffers from all of the above problems and in addition can only by synthesized on a complete system and not on its subparts, making it unsuitable for synthesis using standard modules or prefabricated chips such as those required in LSI or VLSI circuits. The present paper presents a method by which the DDL translator can be made to generate modular equations that will allow the system to be synthesized as an interconnection of lower-level modules. The method involves the introduction of a new language construct called a Module which provides for the separate translation of all equations bounded by it.

Covington, J. A.↗

Five-Segment Interconnection For Electromigration Tests

Proposed integrated-circuit conductive pattern intended for use in electromigration lifetime testing of interconnection lines of integrated circuits. Designed for collection of statistics on electromigration from smallest possible area. Includes 5 interconnection segments with Kelvin voltage taps, with total of 12 contact pads, and provides for simultaneous measurements on all of segments. Attempts to minimize thermal gradients within each segment and conforms to guidelines on electromigration test structures promulgated by National Institute of Standards and Technology (NIST).

Hannaman, David J.↗

Custom CMOS Reed Solomon coder for the Hubble Space Telescope

A VLSI coder is presented that can function either as an encoder or decoder for Reed-Solomon codes. VLSI is one approach to implementing high-performance Reed-Solomon decoders. There are three VLSI technologies that could be used: gate arrays, standard cells, and full custom. The first two approaches are relatively easy to implement, but are limited in both performance and density. Full-custom VLSI is used to achieve both circuit density and speed, and allows control of the amount of interconnect. Speed, which is a function of capacitance, which is a function of interconnect, is an important parameter in high-performance VLSI. A single 8.2 mm x 8.4 mm, 200,000 transistor CMOS chip implementation of the Reed-Solomon code required by the Hubble Space Telescope is reported. The chip features a 10-MHz sustained byte rate independent of error pattern. The 1.6-micron CMOS integrated circuit has complete decoder and encoder functions and uses a single data/system clock. Block lengths up to 255 bytes and shortened codes are supported with no external buffering. Erasure corrections and random error corrections are supported with programmable correction of up to 10 symbol errors. Correction time is independent of error pattern and the number of errors in the incoming message.

Whitaker, S.↗

End-of-fabrication CMOS process monitor

A set of test 'modules' for verifying the quality of a complementary metal oxide semiconductor (CMOS) process at the end of the wafer fabrication is documented. By electrical testing of specific structures, over thirty parameters are collected characterizing interconnects, dielectrics, contacts, transistors, and inverters. Each test module contains a specification of its purpose, the layout of the test structure, the test procedures, the data reduction algorithms, and exemplary results obtained from 3-, 2-, or 1.6-micrometer CMOS/bulk processes. The document is intended to establish standard process qualification procedures for Application Specific Integrated Circuits (ASIC's).

Buehler, M. G.↗

International organizations to enable world-wide mobile satellite services

Numbers of systems exist or have been proposed to provide world-wide mobile satellite services (MSS). Developers of these systems have formulated institutional structures they consider most appropriate for profitable delivery of these services. MSS systems provide niche services and complement traditional telecommunications networks; they are not integrated into world-wide networks. To be successful, MSS system operators must be able to provide an integrated suite of services to support the increasing globalization, interconnectivity, and mobility of business. The critical issue to enabling 'universal roaming' is securing authority to provide MSS in all of the nations of the world. Such authority must be secured in the context of evolving trends in international telecommunications, and must specifically address issues of standardization, regulation and organization. Today, only one existing organization has such world-wide authority. The question is how proponents of new MSS systems and services can gain similar authority. Securing the appropriate authorizations requires that these new organizations reflect the objectives of the nations in which services are to be delivered.

Anglin, Richard L., Jr.↗

The Attitude Control System for the Wilkinson Microwave Anisotropy Probe

The Wilkinson Microwave Anisotropy Probe mission produces a map of the cosmic microwave background radiation over the entire celestial sphere by executing a fast spin and a slow precession of its spin axis about the Sun line to obtain a highly interconnected set of measurements. The spacecraft attitude is sensed and controlled using an inertial reference unit, two star trackers, a digital sun sensor, twelve coarse sun sensors, three reaction wheel assemblies, and a propulsion system. Sufficient attitude knowledge is provided to yield instrument pointing to a standard deviation (l sigma) of 1.3 arc-minutes per axis. In addition, the spacecraft acquires and holds the sunline at initial acquisition and in the event of a failure, and slews to the proper orbit adjust orientations and to the proper off-sunline attitude to start the compound spin. This paper presents an overview of the design of the attitude control system to carry out this mission and presents some early flight experience.

Markley, F. Landis↗

Fabrication of a novel gigabit/second free-space optical interconnect - photodetector characterization and testing and system development

The time when computing power is limited by the copper wire inherent in the computer system and not the speed of the microprocessor is rapidly approaching. With constant advances in computer technology, many researchers believe that in only a few years, optical interconnects will begin to replace copper wires in your Central Processing Unit (CPU). On a more macroscopic scale, the telecommunications industry has already made the switch to optical data transmission as, to date, fiber optic technology is the only reasonable method of reliable, long range data transmission. Within the span of a decade, we will see optical technologies move from the macroscopic world of the telecommunications industry to the microscopic world of the computer chip. Already, the communications industry is marketing commercially available optical links to connect two personal computers, thereby eliminating the need for standard and comparatively slow wired and wireless Ethernet transfers and greatly increasing the distance the computers can be separated. As processing demands continue to increase, the realm of optical communications will continue to move closer to the microprocessor and quite possibly onto the microprocessor itself. A day may come when copper connections are used only to supply power, not transfer data. This summer s work marks some of the beginning stages of a 5 to 10 year, long-term research project to create and study a free-space, 1 Gigabit/sec optical interconnect. The research will result in a novel fabricated, chip-to-chip interconnect consisting of a Vertical Cavity Surface Emitting Laser (VCSEL) Diode linked through free space to a Metal- Semiconductor-Metal (MSM) Photodetector with the possible integration of microlenses for signal focusing and Micro-Electromechanical Systems (MEMS) devices for optical signal steering. The advantages, disadvantages, and practicality of incorporating flip-chip mounting technologies will also be addressed. My work began with the design and construction of a test setup for the experiment and then appropriate characterization of the test system. Specifically, I am involved in the characterization of a commercially available 1550nm wavelength, 5mW diode laser and a study of its modulation bandwidth. Commercially produced photodetectors as well as the incorporation of microwave technology, in the form of RF input and output, are used in the characterization procedure. The next stage involves the use of a probe station and network analyzer to characterize and test a series of photodetectors fabricated on a 2 inch, Indium Gallium Arsenide (InGaAs) wafer in the Branch s microlithography lab. Other project responsibilities include, but are not limited to the incorporation of a transimpedance amplifier to the photodetector circuit; a study of VCSEL technology; bit error rate analysis of an optical interconnect system; and analysis of free space divergence of the VCSEL, optical path length of the interconnect; and any other pertinent optical properties of the one gigabit per second interconnect for fabrication and testing.

Savich, Gregory R.↗

A survey and comparison of fault-tolerant multistage interconnection networks

Intrinsically fault-tolerant multistage interconnection networks (MINs) are surveyed, categorizing the MINs by the amount of hardware modifications they use to provide redundancy. The diversity of such MINs and the scope of fault-tolerance techniques are examined. A hypothetical MIN with ideal engineering characteristics is defined, and the surveyed MINs are compared to this standard.

Adams, George B., III↗

Design automation techniques for custom LSI arrays

The standard cell design automation technique is described as an approach for generating random logic PMOS, CMOS or CMOS/SOS custom large scale integration arrays with low initial nonrecurring costs and quick turnaround time or design cycle. The system is composed of predesigned circuit functions or cells and computer programs capable of automatic placement and interconnection of the cells in accordance with an input data net list. The program generates a set of instructions to drive an automatic precision artwork generator. A series of support design automation and simulation programs are described, including programs for verifying correctness of the logic on the arrays, performing dc and dynamic analysis of MOS devices, and generating test sequences.

Feller, A.↗

Report of the panel on international programs

The panel recommends that NASA participate and take an active role in the continuous monitoring of existing regional networks, the realization of high resolution geopotential and topographic missions, the establishment of interconnection of the reference frames as defined by different space techniques, the development and implementation of automation for all ground-to-space observing systems, calibration and validation experiments for measuring techniques and data, the establishment of international space-based networks for real-time transmission of high density space data in standardized formats, tracking and support for non-NASA missions, and the extension of state-of-the art observing and analysis techniques to developing nations.

Anderson, Allen Joel↗

MIR Solar Array Return Experiment: Power Performance Measurements and Molecular Contamination Analysis Results

A solar array segment was recently removed from the Mir core module and returned for ground-based analysis. The segment, which is similar to the ones the Russians have provided for the FGB and Service Modules, was microscopically examined and disassembled by US and Russian science teams. Laboratory analyses have shown the segment to he heavily contaminated by an organic silicone coating, which was converted to an organic silicate film by reactions with atomic oxygen within the. orbital flight environment. The source of the contaminant was a silicone polymer used by the Russians as an adhesive and bonding agent during segment construction. During its life cycle, the array experienced a reduction in power performance from approx. 12%, when it was new and first deployed, to approx. 5%, when it was taken out of service. However, current-voltage measurements of three contaminated cells and three pristine, Russian standard cells have shown that very little degradation in solar array performance was due to the silicate contaminants on the solar cell surfaces. The primary sources of performance degradation is attributed to "thermal hot-spotting" or electrical arcing; orbital debris and micrometeoroid impacts; and possibly to the degradation of the solar cells and interconnects caused by radiation damage from high energy protons and electrons.

Visentine, James↗

Efficient parallel architecture for highly coupled real-time linear system applications

A systematic procedure is developed for exploiting the parallel constructs of computation in a highly coupled, linear system application. An overall top-down design approach is adopted. Differential equations governing the application under consideration are partitioned into subtasks on the basis of a data flow analysis. The interconnected task units constitute a task graph which has to be computed in every update interval. Multiprocessing concepts utilizing parallel integration algorithms are then applied for efficient task graph execution. A simple scheduling routine is developed to handle task allocation while in the multiprocessor mode. Results of simulation and scheduling are compared on the basis of standard performance indices. Processor timing diagrams are developed on the basis of program output accruing to an optimal set of processors. Basic architectural attributes for implementing the system are discussed together with suggestions for processing element design. Emphasis is placed on flexible architectures capable of accommodating widely varying application specifics.

Carroll, Chester C.↗

Analysis of multigrid methods on massively parallel computers: Architectural implications

We study the potential performance of multigrid algorithms running on massively parallel computers with the intent of discovering whether presently envisioned machines will provide an efficient platform for such algorithms. We consider the domain parallel version of the standard V cycle algorithm on model problems, discretized using finite difference techniques in two and three dimensions on block structured grids of size 10(exp 6) and 10(exp 9), respectively. Our models of parallel computation were developed to reflect the computing characteristics of the current generation of massively parallel multicomputers. These models are based on an interconnection network of 256 to 16,384 message passing, 'workstation size' processors executing in an SPMD mode. The first model accomplishes interprocessor communications through a multistage permutation network. The communication cost is a logarithmic function which is similar to the costs in a variety of different topologies. The second model allows single stage communication costs only. Both models were designed with information provided by machine developers and utilize implementation derived parameters. With the medium grain parallelism of the current generation and the high fixed cost of an interprocessor communication, our analysis suggests an efficient implementation requires the machine to support the efficient transmission of long messages, (up to 1000 words) or the high initiation cost of a communication must be significantly reduced through an alternative optimization technique. Furthermore, with variable length message capability, our analysis suggests the low diameter multistage networks provide little or no advantage over a simple single stage communications network.

Matheson, Lesley R.↗

NASA’s Space Sustainability Strategy: An Overview and a Conceptual Framework for Implementation

Space sustainability is crucial for the continuation of humanity's exploration and utilization of space. NASA recognizes the imperative of maintaining a sustainable space operating environment to safeguard the future of space activities. On April 9, 2024, NASA released its first part of an integrated Space Sustainability Strategy focused on the domain of earth orbit, with future volumes to address impacts of space operations on earth itself; cislunar space, including the Lagrange points and the lunar surface; and deep space, including other celestial bodies. This commitment extends to ensuring the safety of astronauts conducting operations in Low Earth Orbit (LEO), as well as enabling missions to the Moon and Mars. Moreover, sustainable space practices are essential for the uninterrupted operation of NASA's robotic science missions, which monitor Earth's changes and probe the mysteries of the universe. The strategy sets out a set of goals, the first of which is to establish a framework for assessing space sustainability at NASA, addressing the absence of a universally accepted framework with key metrics that promotes understanding of how metrics are interconnected. This framework will provide a basis for evaluating the sustainability of orbital activities, with metrics informed by input from the domestic and international space community. Objectives under this goal include defining key parameters affecting space sustainability, determining tolerable levels of risk, and annually publishing NASA's effect on space sustainability, including compliance with orbital debris mitigation standards. The subsequent goals build upon this foundation, identifying effective actions for enhancing space sustainability, incentivizing adoption of these actions through technology development and policy changes, and ensuring coordination with the global space community. An organizational change within NASA is also proposed to facilitate day-to-day coordination and accountability for space sustainability efforts. By pursuing these goals, NASA aims to strengthen the technical foundations of and continue to set an example for sustainable space operations. Regular evaluation of NASA mission performance in context with meeting sustainability objectives will ensure alignment with evolving challenges in the space operating environment.

Matt Forsbacka↗

Modulation and coding technology for deep space and satellite applications

Modulation and coding research and development at the Jet Propulsion Laboratory (JPL) currently emphasize Deep Space Communications Systems and advanced near earth Commercial Satellite Communications Systems. The Deep Space Communication channel is extremely signal to noise ratio limited and has long transmission delay. The near earth satellite channel is bandwidth limited with fading and multipath. Recent code search efforts at JPL have found a long constraint, low rate convolutional code (15, 1/6) which, when concatenated with a ten bit Reed-Solomon (RS) code, provides a 2.1 dB gain over that of the Voyager spacecraft - the current standard. The new code is only 2 dB from the theoretical Shannon limit. A flight qualified version of the (15, 1/6) convolutional encoder was implemented on the Galileo Spacecraft to be launched later this year. An L-band mobile link, use of the Ka-band for personal communications, and the development of subsystem technology for the interconnection of satellite resources by using high rate optical inter-satellite links are noted.

Yuen, J. H.↗

Design and fabrication of a stringer stiffened discrete-tube actively cooled panel for a hypersonic aircraft

A 0.61 x 1.22 m (2 x 4 ft) test panel was fabricated and delivered to the Langley Research Center for assessment of the thermal and structural features of the optimized panel design. The panel concept incorporated an aluminum alloy surface panel actively cooled by a network of discrete, parallel, redundant, counterflow passage interconnected with appropriate manifolding, and assembled by adhesive bonding. The cooled skin was stiffened with a mechanically fastened conventional substructure of stringers and frames. A 40 water/60 glycol solution was the coolant. Low pressure leak testing, radiography, holography and infrared scanning were applied at various stages of fabrication to assess integrity and uniformity. By nondestructively inspecting selected specimens which were subsequently tested to destruction, it was possible to refine inspection standards as applied to this cooled panel design.

Anthony, F. M.↗