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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
NASA NTRS2017

Options for Radiation Tolerant High-Performance Memory

Memory technologies were reviewed for radiation effects performance in order to determine the most cost-efficient target for a possible memory investment targeted at creating a memory component of general applicability for space use. TID and SEL trends that had indicated improvement in intrinsic performance based on scaling cannot be trusted. SEE hardening of memory arrays is prohibitive in terms of cell-level power and area requirements. Radiation-hardened cells and custom controllers are recommended for future memory developments.

Some, Raphael↗
NASA NTRSDate not supplied

Auxetic Thermo-Responsive Shape-Memory Polyurethane Aerogels

Shape memory polymer aerogels are stimuli-responsive aerogel materials that incorporate polymer aerogel characteristics such as flexibility at low density, and high porosity with shape-changing capabilities upon exposure to external stimuli. By designing the structure of these materials at meso- to macroscale, their shape memory response can be efficiently engineered to show an auxetic response such as a negative Poisson’s ratio, leading to an active and tunable metamaterial. We present a material technology based on a shape memory polyurethane aerogel derived from aliphatic triisocyanate and triethylene glycol, which demonstrates and remembers an auxetic shape change through a thermomechanical cycle first below, and then back again above the glass transition temperature of the polyurethane. Our auxetic shape memory polyurethane aerogels exhibit a significant auxetic response with a negative Poisson’s ratio of approximately -0.8 at 15% compressive strain. This technology is expected to impact multiple areas of interest in relation to commercial, aeronautic, and aerospace industries. Potential applications include minimally invasive medical technologies, soft robotics, and self-deployable structures and habitats. Structure-property relationships of the auxetic shape memory polymer aerogels will be discussed.

Sadeq Malakooti↗
NASA NTRS1999

Plasma membrane ordering agent pluronic F-68 (PF-68) reduces neurotransmitter uptake and release and produces learning and memory deficits in rats

A substantial body of evidence indicates that aged-related changes in the fluidity and lipid composition of the plasma membrane contribute to cellular dysfunction in humans and other mammalian species. In the CNS, reductions in neuronal plasma membrane order (PMO) (i.e., increased plasma membrane fluidity) have been attributed to age as well as the presence of the beta-amyloid peptide-25-35, known to play an important role in the neuropathology of Alzheimer's disease (AD). These PMO increases may influence neurotransmitter synthesis, receptor binding, and second messenger systems as well as signal transduction pathways. The effects of neuronal PMO on learning and memory processes have not been adequately investigated, however. Based on the hypothesis that an increase in PMO may alter a number of aspects of synaptic transmission, we investigated several neurochemical and behavioral effects of the membrane ordering agent, PF-68. In cell culture, PF-68 (nmoles/mg SDS extractable protein) reduced [3H]norepinephrine (NE) uptake into differentiated PC-12 cells as well as reduced nicotine stimulated [3H]NE release. The compound (800-2400 microg/kg, i.p., resulting in nmoles/mg SDS extractable protein in the brain) decreased step-through latencies and increased the frequencies of crossing into the unsafe side of the chamber in inhibitory avoidance training. In the Morris water maze, PF-68 increased the latencies and swim distances required to locate a hidden platform and reduced the time spent and distance swam in the previous target quadrant during transfer (probe) trials. PF-68 did not impair performance of a well-learned working memory task, the rat delayed stimulus discrimination task (DSDT), however. Studies with 14C-labeled PF-68 indicated that significant (pmoles/mg wet tissue) levels of the compound entered the brain from peripheral (i.p.) injection. No PF-68 related changes were observed in swim speeds or in visual acuity tests in water maze experiments, rotorod performance, or in tests of general locomotor activity. Furthermore, latencies to select a lever in the DSDT were not affected. These results suggest that PF-68 induced deficits in learning and memory without confounding peripheral motor, sensory, or motivational effects at the tested doses. Furthermore, none of the doses induced a conditioned taste aversion to a novel 0.1% saccharin solution indicating a lack of nausea or gastrointestinal malaise induced by the compound. The data indicate that increases in neuronal plasma membrane order may have significant effects on neurotransmitter function as well as learning and memory processes. Furthermore, compounds such as PF-68 may also offer novel tools for studying the role of neuronal PMO in mnemonic processes and changes in PMO resulting from age-related disorders such as AD.

Poloxamer/pharmacology↗
NASA NTRS2012

Non Volatile Flash Memory Radiation Tests

Commercial flash memory industry has experienced a fast growth in the recent years, because of their wide spread usage in cell phones, mp3 players and digital cameras. On the other hand, there has been increased interest in the use of high density commercial nonvolatile flash memories in space because of ever increasing data requirements and strict power requirements. Because of flash memories complex structure; they cannot be treated as just simple memories in regards to testing and analysis. It becomes quite challenging to determine how they will respond in radiation environments.

single event upset results↗
NASA NTRS2022

Non-Volatile, Low Power, and High Density SiC Memory For Future Venus Missions

Long lived memory would transform Venus landers & missions. Venus durable memory demonstrated in earlier HOTTech with impractically high power and low bit capacity. This project seeks to develop and demonstrate the world’s first Venus-durable low power memory device (Non-Volatile Random Access Memory (NVRAM) to enhance extended Venus surface missions.

silicon carbide↗
NASA NTRS2023

Dynamically Rendering Rough Terrain with Minimal Memory Overhead

Rendering highly detailed terrain is a process with the potential to consume a great deal of a computer’s random access memory (RAM). In a browser-based application, this resource is limited even further, leading to the necessity to use alternative methods of rendering the large amount of data needed for high detail. This report describes one such method that places the onus of rendering on the speed of the graphics processing unit (GPU) rather than on the computer’s memory. By removing attribute buffers, which contribute greatly to memory costs, from the rendering pipeline and generating the requisite attributes on the fly using a heightmap texture instead, it is estimated that memory usage can be cut down to one-sixth that of the previous method.

Visualization↗
NASA NTRS1971

Architectural design and simulation of a virtual memory

Virtual memory is an imaginary main memory with a very large capacity which the programmer has at his disposal. It greatly contributes to the solution of the dynamic storage allocation problem. The architectural design of a virtual memory is presented which implements by hardware the idea of queuing and scheduling the page requests to a paging drum in such a way that the access of the paging drum is increased many times. With the design, an increase of up to 16 times in page transfer rate is achievable when the virtual memory is heavily loaded. This in turn makes feasible a great increase in the system throughput.

Kwok, G.↗
NASA NTRS1972

Optical read/write memory system components

The optical components of a breadboard holographic read/write memory system have been fabricated and the parameters specified of the major system components: (1) a laser system; (2) an x-y beam deflector; (3) a block data composer; (4) the read/write memory material; (5) an output detector array; and (6) the electronics to drive, synchronize, and control all system components. The objectives of the investigation were divided into three concurrent phases: (1) to supply and fabricate the major components according to the previously established specifications; (2) to prepare computer programs to simulate the entire holographic memory system so that a designer can balance the requirements on the various components; and (3) to conduct a development program to optimize the combined recording and reconstruction process of the high density holographic memory system.

Kozma, A.↗
NASA NTRS1973

Design, fabrication, testing and delivery of a feasibility model laminated ferrite memory

The effect of using multiword addressing with laminated ferrite arrays was made. Both a reduction in the number of components, and a reduction in power consumption was obtained for memory capacities between one million bits and one million words. An investigation into the effect of variations in the processing steps resulted in a number of process modifications that improved the quality of the arrays. A feasibility model laminated ferrite memory system was constructed by modifying a commercial plated wire memory system to operate with laminated ferrite arrays. To provide flexibility for the testing of the laminated ferrite memory, an exerciser has been constructed to automatically control the loading and recirculation of arbitrary size checkerboard patterns of one's and zero's and to display the patterns of stored information on a CRT screen.

Heckler, H. C.↗
NASA NTRS1974

A multiprocessor computer simulation model employing a feedback scheduler/allocator for memory space and bandwidth matching and TMR processing

A computer simulation model for a multiprocessor computer is developed that is useful for studying the problem of matching multiprocessor's memory space, memory bandwidth and numbers and speeds of processors with aggregate job set characteristics. The model assumes an input work load of a set of recurrent jobs. The model includes a feedback scheduler/allocator which attempts to improve system performance through higher memory bandwidth utilization by matching individual job requirements for space and bandwidth with space availability and estimates of bandwidth availability at the times of memory allocation. The simulation model includes provisions for specifying precedence relations among the jobs in a job set, and provisions for specifying precedence execution of TMR (Triple Modular Redundant and SIMPLEX (non redundant) jobs.

Bradley, D. B.↗
NASA NTRS1975

Short, unit-memory, Byte-oriented, binary convolutional codes having maximal free distance

It is shown that (n sub 0, k sub 0) convolutional codes with unit memory always achieve the largest free distance among all codes of the same rate k sub 0/n sub 0 and same number 2MK sub 0 of encoder states, where M is the encoder memory. A unit-memory code with maximal free distance is given at each place where this free distance exceeds that of the best code with k sub 0 and n sub 0 relatively prime, for all Mk sub 0 less than or equal to 6 and for R = 1/2, 1/3, 1/4, 2/3. It is shown that the unit-memory codes are byte-oriented in such a way as to be attractive for use in concatenated coding systems.

Lee, L. N.↗
NASA NTRS1975

Camera memory study for large space telescope

Specifications were developed for a memory system to be used as the storage media for camera detectors on the large space telescope (LST) satellite. Detectors with limited internal storage time such as intensities charge coupled devices and silicon intensified targets are implied. The general characteristics are reported of different approaches to the memory system with comparisons made within the guidelines set forth for the LST application. Priority ordering of comparisons is on the basis of cost, reliability, power, and physical characteristics. Specific rationales are provided for the rejection of unsuitable memory technologies. A recommended technology was selected and used to establish specifications for a breadboard memory. Procurement scheduling is provided for delivery of system breadboards in 1976, prototypes in 1978, and space qualified units in 1980.

Hoffman, C. P.↗
NASA NTRS1975

The potential of multi-port optical memories in digital computing

A high-capacity memory with a relatively high data transfer rate and multi-port simultaneous access capability may serve as the basis for new computer architectures. The implementation of a multi-port optical memory is discussed. Several computer structures are presented that might profitably use such a memory. These structures include (1) a simultaneous record access system, (2) a simultaneously shared memory computer system, and (3) a parallel digital processing structure.

Alford, C. O.↗
NASA NTRS1976

RAPID: A random access picture digitizer, display, and memory system

RAPID is a system capable of providing convenient digital analysis of video data in real-time. It has two modes of operation. The first allows for continuous digitization of an EIA RS-170 video signal. Each frame in the video signal is digitized and written in 1/30 of a second into RAPID's internal memory. The second mode leaves the content of the internal memory independent of the current input video. In both modes of operation the image contained in the memory is used to generate an EIA RS-170 composite video output signal representing the digitized image in the memory so that it can be displayed on a monitor.

Yakimovsky, Y.↗
NASA NTRS1976

Test program for 4-K memory card, JOLT microprocessor

A memory test program is described for use with the JOLT microcomputer 4,096-word memory board used in development of an Omega navigation receiver. The program allows a quick test of the memory board by cycling the memory through all possible bit combinations in all words.

Lilley, R. W.↗
NASA NTRS1978

Strobe-margin test for plated memory systems

Technique measures performance of plated-wire memories. Strobe-margin test (SMT) utilizes worst-case testing and automatically gives exact strobe margin. Test is automatic; thus, memory system-level test is superior to tests at component level that use artificial test conditions. Test is significant tool in design and test of plated-wire memory systems. It can rapidly quantify memory-system margin on each production unit and impact of any design changes.

Anspach, T. E.↗
NASA NTRS1978

Preliminary design for a standard 10 sup 7 bit Solid State Memory (SSM)

A modular concept with three separate modules roughly separating bubble domain technology, control logic technology, and power supply technology was employed. These modules were respectively the standard memory module (SMM), the data control unit (DCU), and power supply module (PSM). The storage medium was provided by bubble domain chips organized into memory cells. These cells and the circuitry for parallel data access to the cells make up the SMM. The DCU provides a flexible serial data interface to the SMM. The PSM provides adequate power to enable one DCU and one SMM to operate simultaneously at the maximum data rate. The SSM was designed to handle asynchronous data rates from dc to 1.024 Mbs with a bit error rate less than 1 error in 10 to the eight power bits. Two versions of the SSM, a serial data memory and a dual parallel data memory were specified using the standard modules. The SSM specification includes requirements for radiation hardness, temperature and mechanical environments, dc magnetic field emission and susceptibility, electromagnetic compatibility, and reliability.

Hayes, P. J.↗
NASA NTRS1978

The ILLIAC IV memory system: Current status and future possibilities

The future needs of researchers who will use the Illiac were examined and the requirements they will place on the memory system were evaluated. Various alternatives to replacing critical memory components were considered with regard to cost, risk, system impact, software requirements, and implementation schedules. The current system, its performance and status, and the limitations it places on possible enhancements are discussed as well as the planned enhancements to the Illiac processor. After a brief technology survey, different implementations are presented for each system memory component. Three different memory systems are proposed to meet the identified needs of the Illiac user community. These three alternatives differ considerably with respect to storage capacity and accessing capabilities, but they all offer significant improvements over the current system. The proposed systems and their relative merits are analyzed.

Stevenson, D. K.↗