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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
NASA NTRS2011

Single-Event Effect (SEE) Survey of Advanced Reconfigurable Field Programmable Gate Arrays: NASA Electronic Parts and Packaging (NEPP) Program Office of Safety and Mission Assurance

The NEPP Reconfigurable Field-Programmable Gate Array (FPGA) task has been charged to evaluate reconfigurable FPGA technologies for use in space. Under this task, the Xilinx single-event-immune, reconfigurable FPGA (SIRF) XQR5VFX130 device was evaluated for SEE. Additionally, the Altera Stratix-IV and SiliconBlue iCE65 were screened for single-event latchup (SEL).

Xilinx Single-Event Effects (SEE) Test Consortium↗
NASA NTRS2006

Single Event Effects Test Results for the Actel ProASIC Plus and Altera Stratix-II Field Programmable Gate Arrays

This work describes radiation testing of Actel's ProASIC Plus and Altera's Stratix-II FPGAs. The Actel Device Under Test (DUT) was a ProASIC Plus APA300-PQ208 nonvolatile, field reprogrammable device which is based on a 0.22micron flash-based LVCMOS technology. Limited investigation has taken place into flash based FPGA technologies, therefore this test served as a preliminary reference point for various SEE behaviors. The Altera DUT was a Stratix-II EP2S60F1020C4. Single Event Upset (SEU) and Single Event Latchup (SEL) were the focus of these studies. For the Actel, a latchup test was done at an effective LET of 75.0 MeV-sq cm/mg at room temperature, and no latchup was detected when irradiated to a total fluence of 1 x 10(exp 7) particles/sq cm. The Altera part was shown to latchup at room temperature.

heavy ions↗
NASA NTRS2021

Single-Event Effect Test Report Analog Devices LTC1604AIG#90117 ADC

This study is to characterize the destructive single-event latchup (SEL) susceptibility of the LTC1604AIG#90117 (LTC1604) analog/digital converter (ADC). The device was monitored for SEL current events on the power supplies during exposure to a heavy ion beam at Lawrence Berkeley National Laboratory (LBNL) 88-inch Cyclotron. Testing was performed on September 11, 2021.

single-event latchup (SEL)↗
NASA NTRS2023

Single-Event Effect Testing of the Analog Devices AD8041ARZ Operational Amplifier

This study was undertaken to determine the single event transient distribution of a transimpedance amplifier configuration of the AD8041 Operational Amplifier. The AD8041 is made in a bipolar technology and the application of interest has a bipolar supply of ±5 V. The device was monitored for transient events on the output voltage during exposure to a heavy ion beam at Lawrence Berkeley National Laboratory’s (LBNL) 88-inch Cyclotron.

Matthew B. Joplin↗
NASA NTRS1993

Single Event Effects on Space Radiation Hardened 64K SRAMS at Room temperature

The laser threshold linear Energy transfer for single event upsetscan be estimaed, even at room temperature, for space radiation hardened 64K SRAMs. The memories where independently developed to quality for the Qualified Manufacturer's List by IBM and Honeywell. The memory was so hard that high energy heavy ions generated by the Van de Graff could not determine the SEU threshold at room temperature. Use of pulsed Laser tests would meake it possible to forgo very expensive testing at ultra-high energy accelerators.

Space Radiation 64K SRAMS↗
NASA NTRS2015

Single-Event Effect Performance of a Conductive-Bridge Memory EEPROM

We investigated the heavy ion SEE characteristics of an EEPROM based on CBRAM technology. SEFI is the dominant type of SEE for each operating mode (standby, read-only, write/read). We also observed single bit upsets in the CBRAM cell, during write/read tests. the SEULET threshold is between 10 and 20 MeV * sq cm/mg, with an upper fluence limit of 3 × 10(exp 6) cm(exp -2) at 10 MeV * sq cm/mg. In the stand by mode, the CBRAM array appears immune to bit upsets.

single event effects↗
NASA NTRS2023

Single-Event Effects Test Report Linux Operating System Configurations on TUL PYNQ-Z2

This study was undertaken to determine the single-event functional interrupt (SEFI) susceptibility on different Linux operating system configurations. The device-under-test (DUT) was the Xilinx Zynq-7020 SoC on the TUL PYNQ-Z2 board. The device was monitored for kernel panics or hangs, classified as SEFIs, to observe any differences in the SEFI cross sections between operating system configurations. The primary purpose of this experiment was to observe if the number of drivers installed in a Linux system affects its overall execution reliability.

Seth S Roffe↗
NASA NTRS2007

Initial Single Event Effects Testing of the Xilinx Virtex-4 Field Programmable Gate Array

We present initial results for the thin epitaxial Xilinx Virtex-4 Fie ld Programmable Gate Array (FPGA), and compare to previous results ob tained for the Virtex-II and Virtex-II Pro. The data presented was a cquired through a consortium based effort with the common goal of pr oviding the space community with data and mitigation methods for the use of Xilinx FPGAs in space.

single event effects↗
NASA NTRS2020

Medical Proton Test Facilities (MPTFs) Lessons Learned on the Unique Aspects for Single Event Effects (SEE) Testing of Electronics in the 200 MeV Regime

Ever since the closure of the Indiana University Cyclotron Facility (IUCF) in 2014, there has been an increasing use of medical proton therapy facilities (MPTF) for SEE testing with protons in the 200 MeV or greater regime. This talk covers some of the unique features and considerations for utilizing MPTFs including both logistical and technical aspects. This presentation provides an overview of lessons learned for SEE testing at MPTFs.

Medical Proton Test Facilities (MPTFs)↗
NASA NTRS2014

Single Event Effects (SEE) Testing: Practical Approach to Test Plans

While standards and guidelines for performing SEE testing have existed for several decades, guidance for developing SEE test plans has not been as easy to find. In this presentation, the variety of areas that need to be considered ranging from resource issues (funds, personnel, schedule) to extremely technical challenges (particle interaction and circuit application), shall be discussed. Note: we consider the approach outlined here as a "living" document: Mission-specific constraints and new technology related issues always need to be taken into account.

Single Event Effects (SEE)↗
NASA NTRS2018

NASA Electronic Parts and Packaging Field Programmable Gate Array Single Event Effects Test Guideline Update

The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic versus mission specific device evaluation, single event latch-up (SEL) test and analysis, SEE response visibility enhancement during radiation testing, mitigation evaluation (embedded and user-implemented), unreliable design and its affects to SEE Data, testing flushable architectures versus non-flushable architectures, intellectual property core (IP Core) test and evaluation (addresses embedded and user-inserted), heavy-ion energy and linear energy transfer (LET) selection, proton versus heavy-ion testing, fault injection, mean fluence to failure analysis, and mission specific system-level single event upset (SEU) response prediction. Most sections within the guidelines manual provide information regarding best practices for test structure and test system development. The scope of this manual addresses academic versus mission specific device evaluation and visibility enhancement in IP Core testing.

Field Programmable Gate Array (FPGA)↗
NASA NTRS2018

NASA Electronic Parts and Packaging (NEPP) Field Programmable Gate Array (FPGA) Single Event Effects (SEE) Test Guideline Update

The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic versus mission specific device evaluation, single event latch-up (SEL) test and analysis, SEE response visibility enhancement during radiation testing, mitigation evaluation (embedded and user-implemented), unreliable design and its affects to SEE Data, testing flushable architectures versus non-flushable architectures, intellectual property core (IP Core) test and evaluation (addresses embedded and user-inserted), heavy-ion energy and linear energy transfer (LET) selection, proton versus heavy-ion testing, fault injection, mean fluence to failure analysis, and mission specific system-level single event upset (SEU) response prediction. Most sections within the guidelines manual provide information regarding best practices for test structure and test system development. The scope of this manual addresses academic versus mission specific device evaluation and visibility enhancement in IP Core testing.

Test guidelines↗
NASA NTRS2021

Linear Systems LSK389 and LSK489 Dual N-Channel JFET Amplifier Total Ionizing Dose and Single-Event Effects Test Report

The purpose of these tests was to characterize the susceptibility of the LSK389 and LSK489 Dual N-Channel JFET from Linear Systems to Single-Event Latchup due to heavy ions and to Total Ionizing Dose (TID) degradation at -65 °C and intermediate dose rate. The test was carried out to assess suitability of the amplifiers for the Ocean Color instrument (OCI) on the Plankton, Aerosol, Cloud, ocean Ecosystem (PACE) spacecraft.

Ray Ladbury↗
NASA NTRS2006

Single Event Effects Test Results for Advanced Field Programmable Gate Arrays

Reconfigurable Field Programmable Gate Arrays (FPGAs) from Altera and Actel and an FPGA-based quick-turnApplication Specific Integrated Circuit (ASIC) from Altera were subjected to single-event testing using heavy ions. Both Altera devices (Stratix II and HardCopy II) exhibited a low latchup threshold (below an LET of 3 MeV-cm2/mg) and thus are not recommended for applications in the space radiation environment. The flash-based Actel ProASIC Plus device did not exhibit latchup to an effective LET of 75 MeV-cm2/mg at room temperature. In addition, these tests did not show flash cell charge loss (upset) or retention damage. Upset characterization of the design-level flip-flops yielded an LET threshold below 10 MeV-cm2/mg and a high LET cross section of about lxlO-6 cm2/bit for storing ones and about lxl0-7 cm2/bit for storing zeros . Thus, the ProASIC device may be suitable for critical flight applications with appropriate triple modular redundancy mitigation techniques.

Field Programmable Gate Arrays↗