Search NASA⌕ Search

SEARCH · Search NASA

Results for “integrated circuit testing”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
NASA NTRS1991

HYMOSS signal processing for pushbroom spectral imaging

The objective of the Pushbroom Spectral Imaging Program was to develop on-focal plane electronics which compensate for detector array non-uniformities. The approach taken was to implement a simple two point calibration algorithm on focal plane which allows for offset and linear gain correction. The key on focal plane features which made this technique feasible was the use of a high quality transimpedance amplifier (TIA) and an analog-to-digital converter for each detector channel. Gain compensation is accomplished by varying the feedback capacitance of the integrate and dump TIA. Offset correction is performed by storing offsets in a special on focal plane offset register and digitally subtracting the offsets from the readout data during the multiplexing operation. A custom integrated circuit was designed, fabricated, and tested on this program which proved that nonuniformity compensated, analog-to-digital converting circuits may be used to read out infrared detectors. Irvine Sensors Corporation (ISC) successfully demonstrated the following innovative on-focal-plane functions that allow for correction of detector non-uniformities. Most of the circuit functions demonstrated on this program are finding their way onto future IC's because of their impact on reduced downstream processing, increased focal plane performance, simplified focal plane control, reduced number of dewar connections, as well as the noise immunity of a digital interface dewar. The potential commercial applications for this integrated circuit are primarily in imaging systems. These imaging systems may be used for: security monitoring systems, manufacturing process monitoring, robotics, and for spectral imaging when used in analytical instrumentation.

Ludwig, David E.↗
NASA NTRS1986

The 20 GHz spacecraft IMPATT solid state transmitter

The engineering development of a solid-state transmitter amplifier operating in the 20-GHz frequency range is described. This effort involved a multitude of disciplines including IMPATT device development, circulator design, multiple-diode circuit design, and amplifier integration and test. The objective was to develop a transmitter amplifier demonstrating the feasibility of providing an efficient, reliable, lightweight solid-state transmitter to be flown on a 30 to 20 GHz communication demonstration satellite. The work was done under contract from NASA/Lewis Research Center for a period of three years. The result was the development of a GaAs IMPACT diode amplifier capable of an 11-W CW output power and a 2-dB bandwidth of 300 MHz. GaAs IMPATT diodes incorporating diamond heatsink and double-Read doping profile capable of 5.3-W CW oscillator output power and 15.5% efficiency were developed. Up to 19% efficiency was also observed for an output power level of 4.4 W. High performance circulators with a 0.2 dB inserting loss and bandwidth of 5 GHz have also been developed. These represent a significant advance in both device and power combiner circuit technologies in K-band frequencies.

Best, T.↗
DOE OSTI2022

Response of a CMS HGCAL silicon-pad electromagnetic calorimeter prototype to 20–300 GeV positrons

The Compact Muon Solenoid collaboration is designing a new high-granularity endcap calorimeter, HGCAL, to be installed later this decade. As part of this development work, a prototype system was built, with an electromagnetic section consisting of 14 double-sided structures, providing 28 sampling layers. Each sampling layer has an hexagonal module, where a multipad large-area silicon sensor is glued between an electronics circuit board and a metal baseplate. The sensor pads of approximately 1.1 cm$^{2}$ are wire-bonded to the circuit board and are readout by custom integrated circuits. The prototype was extensively tested with beams at CERN's Super Proton Synchrotron in 2018. Based on the data collected with beams of positrons, with energies ranging from 20 to 300 GeV, measurements of the energy resolution and linearity, the position and angular resolutions, and the shower shapes are presented and compared to a detailed Geant4 simulation.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2026

First results from a high-frame-rate, multi-GHz ionizing particle detection system geared toward accelerator diagnostic applications

An integrated detection system, consists of a thin diamond sensor incorporated into a compact signal loop, coupled in turn to an application-specific integrated circuit readout chip, has been tested for the first time, using ps-duration electron pulses from the Next Linear Collider Test Accelerator at the SLAC National Accelerator Laboratory. For readout frame rates as high as 120 kHz, the detection system is shown to achieve a linear dynamic range of 10 3 and a bandwidth of 4–5 GHz, with no ringing seen on the tail of the output pulse. These results represent the best-performing multi-GHz ionizing particle detection system achieved to date.

Ferezghi, Mohammadreza Mohseni [University of Cali↗
DOE OSTI2025

ECE 4396 (Final Report)

In the summer of 2025, I was fortunate enough intern at Sandia National Laboratories in Albuquerque, New Mexico. I was hired into the Southwest Analysis Laboratories for Semiconductor Advancement (SALSA) intern program. In this internship, I applied my knowledge and skills in electrical engineering to conduct hardware failure analysis. I utilized various failure analyze techniques involving the use of Infrared Thermography (IRT) and Laser Scanning Microscopy (LSM) to test different Application-Specific Integrated Circuits (ASIC) chips that are available in the public market.

42 ENGINEERING↗
NASA NTRS1985

Zero-Net-Charge Air Ionizer

Instrument monitors air supplied by air ionizer and regulates ionizer to ensure net charge neutral. High-impedance electrometer and nulling control amplifier regulate output of air ionizer. Primarily intended to furnish ionized air having no net charge, instrument adaptable to generating air with positive or negative net charge is so desired. Useful where integrated circuit chips are manufactured, inspected, tested or assembled.

Woods, W. R., Jr.↗
NASA NTRS1983

A 20-GHz IMPATT transmitter

The engineering development of a solid state transmitter amplifier operating in the 20 GHz frequency band. The development effort involved a variety of disciplines including IMPATT device development, circulator design, simple and multiple diode circuits designs, and amplifier integration and test.

Chan, J. L.↗
NASA NTRS1995

Associative Pattern Recognition In Analog VLSI Circuits

Winner-take-all circuit selects best-match stored pattern. Prototype cascadable very-large-scale integrated (VLSI) circuit chips built and tested to demonstrate concept of electronic associative pattern recognition. Based on low-power, sub-threshold analog complementary oxide/semiconductor (CMOS) VLSI circuitry, each chip can store 128 sets (vectors) of 16 analog values (vector components), vectors representing known patterns as diverse as spectra, histograms, graphs, or brightnesses of pixels in images. Chips exploit parallel nature of vector quantization architecture to implement highly parallel processing in relatively simple computational cells. Through collective action, cells classify input pattern in fraction of microsecond while consuming power of few microwatts.

Tawel, Raoul↗
NASA NTRS1979

Electrical Characterization of Hughes HCMP 1853D and RCA CDP1853D N-bit, CMOS, 1-of-8 Decoder Microcircuits

Electrical characterization tests were performed on two different manufactured types of integrated circuits. The devices were subjected to functional and AC and DC parametric tests at ambient temperatures of -55 C, -20 C, 25 C, 85 C, and 125 C. The data were analyzed and tabulated to show the effect of operating conditions on performance and to indicate parameter deviations among devices in each group. Accuracy was given precedence over test time efficiency where practical, and tests were designed to measure worst case performance.

Stokes, R. L.↗
NASA NTRS2006

Product Reliability Trends, Derating Considerations and Failure Mechanisms with Scaled CMOS

As microelectronics is scaled into the deep sub-micron regime, space and aerospace users of advanced technology CMOS are reassessing how scaling effects impact long-term product reliability. The effects of electromigration (EM), time-dependent-dielectric-breakdown (TDDB) and hot carrier degradation (HCI and NBTI) wearout mechanisms on scaled technologies and product reliability are investigated, accelerated stress testing across several technology nodes is performed, and FA is conducted to confirm the failure mechanism(s).

CMOS integrated circuits↗
NASA NTRS1967

Test and inspection for process control of monolithic circuits

Report details the test and inspection procedures for the mass production of high reliability integrated circuits. It covers configuration control, basic fundamentals of quality control, control charts, wafer process evaluation, general process evaluation, evaluation score system, and diffusion evaluation.

Spangenberg, E.↗
NASA NTRS1990

Assessing the SEU resistance of CMOS latches using alpha-particle sensitive test circuits

The importance of Cosmic Rays on the performance of integrated circuits (IC's) in a space environment is evident in the upset rate of the Tracking and Data Relay Satellite (TDRS) launched in Apr. 1983. This satellite experiences a single-event-upset (SEU) per day which must be corrected from the ground. Such experience caused a redesign of the Galileo spacecraft with SEU resistant IC's. The solution to the SEU problem continues to be important as the complexity of spacecraft grows, the feature size of IC's decreases, and as space systems are designed with circuits fabricated at non-radiation hardened foundries. This paper describes an approach for verifying the susceptibility of CMOS latches to heavy-ion induced state changes. The approach utilizes alpha particles to induce the upsets in test circuits. These test circuits are standard cells that have offset voltages which sensitize the circuits to upsets. These results are then used to calculate the upsetability at operating voltages. In this study results are presented for the alpha particle upset of a six-transistor static random access memory (SRAM) cell. Then a methodology is described for the analysis of a standard-cell inverter latch.

Buehler, M.↗
NASA NTRS2017

Novel High Temperature Capacitive Pressure Sensor Utilizing SiC Integrated Circuit Twin Ring Oscillators

This paper describes initial development and testing of a novel high temperature capacitive pressure sensor system. The pressure sensor system consists of two 4H-SiC 11-stage ring oscillators and a SiCN capacitive pressure sensor. One oscillator has the capacitive pressure sensor fixed at one node in its feedback loop and varies as a function of pressure and temperature while the other provides a pressure-independent reference frequency which can be used to temperature compensate the output of the first oscillator. A two-day repeatability test was performed up to 500C on the oscillators and the oscillator fundamental frequency changed by only 1. The SiCN capacitive pressure sensor was characterized at room temperature from 0 to 300 psi. The sensor had an initial capacitance of 3.76 pF at 0 psi and 1.75 pF at 300 psi corresponding to a 54 change in capacitance. The integrated pressure sensor system was characterized from 0 to 300 psi in steps of 50 psi over a temperature range of 25 to 500C. The pressure sensor system sensitivity was 0.113 kHzpsi at 25C and 0.026 kHzpsi at 500C.

high temperature↗
NASA NTRS1995

Low-cost 20-22 GHz MIC active receiver/radiometer

A microwave integrated circuit active receiver is built and tested at 19-25 GHz. The receiver consists of a planar CPW-fed double folded-slot antenna coupled to a six-stage MESFET (metal semiconductor field effect transistors) amplifier and followed by a planar Schottky-diode detector. The folded-slot antenna on a GaAs half-space results in a wide frequency bandwidth suitable for MMIC amplifiers. The measured system performance show a video responsivity close to 1 GV/W at 20 GHz with a 3-dB bandwidth of 1500 MHz. A novel method which uses the planar video detector after the amplifier stages as an RF (radio frequency) mixer is used to measure the noise-figure of the direct detection radiometer. The system noise figure is 4.8 dB at 22 GHz. The radiometer sensitivity to a hot/cold load is 3.8 mu V/K. The measured antenna patterns show a 90% Gaussicity at 20-22 GHz. The active MIC receiver can be integrated monolithically for low-cost applications and is well suited for millimeter-wave linear imaging arrays.

PLANAR SCHOTTKY DIODE DETECTOR↗
NASA NTRS1991

Designing Accelerated Tests Of Electromigration

Method for design of accelerated tests of electromigration (as in microscopic conductors in integrated circuits) based partly on simplified mathematical model of electromigration and partly on error analysis. Objective to determine quickly operating life of tested components under normal operating conditions by extrapolation from lifetime measurements at operating stresses greater than normal. Involves compromise between reducing testing time by increasing stresses and reducing uncertainty in extrapolated lifetime by decreasing stresses.

Buehler, Martin G.↗
NASA NTRS1994

A programmable heater control circuit for spacecraft

Spacecraft thermal control is accomplished for many components through use of multilayer insulation systems, electrical heaters, and radiator systems. The heaters are commanded to maintain component temperatures within design specifications. The programmable heater control circuit (PHCC) was designed to obtain an effective and efficient means of spacecraft thermal control. The hybrid circuit provides use of control instrumentation as temperature data, available to the spacecraft central data system, reprogramming capability of the local microprocessor during the spacecraft's mission, and the elimination of significant spacecraft wiring. The hybrid integrated circuit has a temperature sensing and conditioning circuit, a microprocessor, and a heater power and control circuit. The device is miniature and housed in a volume which allows physical integration with the component to be controlled. Applications might include alternate battery-powered logic-circuit configurations. A prototype unit with appropriate physical and functional interfaces was procured for testing. The physical functionality and the feasibility of fabrication of the hybrid integrated circuit were successfully verified. The remaining work to develop a flight-qualified device includes fabrication and testing of a Mil-certified part. An option for completing the PHCC flight qualification testing is to enter into a joint venture with industry.

Nguyen, D. D.↗
NASA NTRS2013

Fast, High-Precision Readout Circuit for Detector Arrays

The GEO-CAPE mission described in NASA's Earth Science and Applications Decadal Survey requires high spatial, temporal, and spectral resolution measurements to monitor and characterize the rapidly changing chemistry of the troposphere over North and South Americas. High-frame-rate focal plane arrays (FPAs) with many pixels are needed to enable such measurements. A high-throughput digital detector readout integrated circuit (ROIC) that meets the GEO-CAPE FPA needs has been developed, fabricated, and tested. The ROIC is based on an innovative charge integrating, fast, high-precision analog-to-digital circuit that is built into each pixel. The 128×128-pixel ROIC digitizes all 16,384 pixels simultaneously at frame rates up to 16 kHz to provide a completely digital output on a single integrated circuit at an unprecedented rate of 262 million pixels per second. The approach eliminates the need for off focal plane electronics, greatly reducing volume, mass, and power compared to conventional FPA implementations. A focal plane based on this ROIC will require less than 2 W of power on a 1×1-cm integrated circuit. The ROIC is fabricated of silicon using CMOS technology. It is designed to be indium bump bonded to a variety of detector materials including silicon PIN diodes, indium antimonide (InSb), indium gallium arsenide (In- GaAs), and mercury cadmium telluride (HgCdTe) detector arrays to provide coverage over a broad spectral range in the infrared, visible, and ultraviolet spectral ranges.

Rider, David M.↗