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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8

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NASA NTRS2006

Extreme Temperature Electronics Using a Reconfigurable Analog Array

Temperature and radiation tolerant electronics, as well as long life survivability are key capabilities required for future NASA missions. Current approaches to electronics for extreme environments focus on component level robustness and hardening. Compensation techniques such as bias cancellation circuitry have also been employed. However, current technology can only ensure very limited lifetime in extreme environments. Previous work presented a novel approach, based on evolvable hardware technology, which allows adaptive in-situ circuit redesign/reconfiguration during operation in extreme environments. This technology would complement material/device advancements and increase the mission capability to survive harsh environments. This work describes a new reconfigurable analog chip developed by JPL and SPAWAR that is targeted for extreme temperature and evolutionary hardware experiments. Being based on Gm-C technology, this chip can have its functionality tuned and adapted to extreme temperatures through voltage bias adjustment. This tuning process will be controlled by Evolutionary Algorithms. This paper presents details of the reconfigurable analog chip as well as a system level overview. Some early experiments are also described.

evolvable hardware↗

NASA NTRS1983

Development and evaluation of a fault-tolerant multiprocessor (FTMP) computer. Volume 1: FTMP principles of operation

The basic organization of the fault tolerant multiprocessor, (FTMP) is that of a general purpose homogeneous multiprocessor. Three processors operate on a shared system (memory and I/O) bus. Replication and tight synchronization of all elements and hardware voting is employed to detect and correct any single fault. Reconfiguration is then employed to repair a fault. Multiple faults may be tolerated as a sequence of single faults with repair between fault occurrences.

Smith, T. B., Jr.↗

NASA NTRS2005

Software-Reconfigurable Processors for Spacecraft

A report presents an overview of an architecture for a software-reconfigurable network data processor for a spacecraft engaged in scientific exploration. When executed on suitable electronic hardware, the software performs the functions of a physical layer (in effect, acts as a software radio in that it performs modulation, demodulation, pulse-shaping, error correction, coding, and decoding), a data-link layer, a network layer, a transport layer, and application-layer processing of scientific data. The software-reconfigurable network processor is undergoing development to enable rapid prototyping and rapid implementation of communication, navigation, and scientific signal-processing functions; to provide a long-lived communication infrastructure; and to provide greatly improved scientific-instrumentation and scientific-data-processing functions by enabling science-driven in-flight reconfiguration of computing resources devoted to these functions. This development is an extension of terrestrial radio and network developments (e.g., in the cellular-telephone industry) implemented in software running on such hardware as field-programmable gate arrays, digital signal processors, traditional digital circuits, and mixed-signal application-specific integrated circuits (ASICs).

Farrington, Allen↗

NASA NTRS1990

Flight elements: Fault detection and fault management

Fault management for an intelligent computational system must be developed using a top down integrated engineering approach. An approach proposed includes integrating the overall environment involving sensors and their associated data; design knowledge capture; operations; fault detection, identification, and reconfiguration; testability; causal models including digraph matrix analysis; and overall performance impacts on the hardware and software architecture. Implementation of the concept to achieve a real time intelligent fault detection and management system will be accomplished via the implementation of several objectives, which are: Development of fault tolerant/FDIR requirement and specification from a systems level which will carry through from conceptual design through implementation and mission operations; Implementation of monitoring, diagnosis, and reconfiguration at all system levels providing fault isolation and system integration; Optimize system operations to manage degraded system performance through system integration; and Lower development and operations costs through the implementation of an intelligent real time fault detection and fault management system and an information management system.

Lum, H.↗

NASA NTRS2006

TRIGA: Telecommunications Protocol Processing Subsystem Using Reconfigurable Interoperable Gate Arrays

We present the Telecommunications protocol processing subsystem using Reconfigurable Interoperable Gate Arrays (TRIGA), a novel approach that unifies fault tolerance, error correction coding and interplanetary communication protocol off-loading to implement CCSDS File Delivery Protocol and Datalink layers. The new reconfigurable architecture offers more than one order of magnitude throughput increase while reducing footprint requirements in memory, command and data handling processor utilization, communication system interconnects and power consumption.

protocol processing hardware engine↗

NASA NTRS2011

Autonomous Dynamically Self-Organizing and Self-Healing Distributed Hardware Architecture - the eDNA Concept

This paper presents the current state of the autonomous dynamically self-organizing and self-healing electronic DNA (eDNA) hardware architecture (patent pending). In its current prototype state, the eDNA architecture is capable of responding to multiple injected faults by autonomously reconfiguring itself to accommodate the fault and keep the application running. This paper will also disclose advanced features currently available in the simulation model only. These features are future work and will soon be implemented in hardware. Finally we will describe step-by-step how an application is implemented on the eDNA architecture.

self-healing hardware↗

NASA NTRS2012

Optimization of the Multi-Spectral Euclidean Distance Calculation for FPGA-based Spaceborne Systems

Due to the high quantity of operations that spaceborne processing systems must carry out in space, new methodologies and techniques are being presented as good alternatives in order to free the main processor from work and improve the overall performance. These include the development of ancillary dedicated hardware circuits that carry out the more redundant and computationally expensive operations in a faster way, leaving the main processor free to carry out other tasks while waiting for the result. One of these devices is SpaceCube, a FPGA-based system designed by NASA. The opportunity to use FPGA reconfigurable architectures in space allows not only the optimization of the mission operations with hardware-level solutions, but also the ability to create new and improved versions of the circuits, including error corrections, once the satellite is already in orbit. In this work, we propose the optimization of a common operation in remote sensing: the Multi-Spectral Euclidean Distance calculation. For that, two different hardware architectures have been designed and implemented in a Xilinx Virtex-5 FPGA, the same model of FPGAs used by SpaceCube. Previous results have shown that the communications between the embedded processor and the circuit create a bottleneck that affects the overall performance in a negative way. In order to avoid this, advanced methods including memory sharing, Native Port Interface (NPI) connections and Data Burst Transfers have been used.

Cristo, Alejandro↗

NASA NTRS1987

Development of a 32-bit UNIX-based ELAS workstation

A mini/microcomputer UNIX-based image analysis workstation has been designed and is being implemented to use the Earth Resources Laboratory Applications Software (ELAS). The hardware system includes a MASSCOMP 5600 computer, which is a 32-bit UNIX-based system (compatible with AT&T System V and Berkeley 4.2 BSD operating system), a floating point accelerator, a 474-megabyte fixed disk, a tri-density magnetic tape drive, and an 1152 by 910 by 12-plane color graphics/image interface. The software conversion includes reconfiguring the ELAs driver Master Task, recompiling and then testing the converted application modules. This hardware and software configuration is a self-sufficient image analysis workstation which can be used as a stand-alone system, or networked with other compatible workstations.

Spiering, Bruce A.↗

NASA NTRS1991

Proximity operations considerations affecting spacecraft design

Proximity operations can be defined as the maneuvering of two or more spacecraft within 1 nautical mile range, with relative velocity less than 10 feet per second. The passive vehicle is nontranslating and should provide for maintenance of the desired approach attitude. It must accommodate the active (translating) vehicle induced structural loads and performance characteristics (mating hardware tolerances), and support sensor compatibility (transponder, visual targets, etc.). The active vehicle must provide adequate sensor systems (relative state information, field-of-view, redundancy), flight control hardware (thruster sizing, minimal cross-coupling, performance margins, redundancy) and software (reconfigurable, attitude/rate modes, translation and rotation fine control authority) characteristic, and adequate non-propulsive consumables such as power. Operational concerns must be considered. These include the following: (1) the desired approach trajectory and relative orientation; (2) the active vehicle thruster plume effects (forces, torques, contamination) on the passive vehicle; and (3) procedures for contingencies such as loss of communications, sensor or propulsion failures, and target vehicle loss of control.

Staas, Steven K.↗

NASA NTRSDate not supplied

Validation of the NASA Electrical Power System – Sizing and Analysis Tool (EPS-SAT)

The electrification of aircraft propulsion systems has opened the design space for engineers by allowing for unique and highly specialized propulsion system and vehicle designs. NASA developed the Electrical Power System – Sizing and Analysis Tool (EPS-SAT) to conduct high-level trade studies and sensitivity studies on the various propulsion system designs that can be implemented in electrified aircraft. The results of these studies would be used to better direct investment dollars and determine strengths and weaknesses of propulsion system designs. In this paper, the results of the EPS-SAT tool were validated with hardware data extracted from the NASA Revolutionary Vertical Lift Technology (RVLT) Advanced Reconfigurable Electric Aircraft Lab (AREAL). Updated performance maps were added to the EPS-SAT library so that high-fidelity results could be calculated.

Patrick A. Hanlon↗

NASA NTRS2002

An Embedded Reconfigurable Logic Module

A Miniature Embedded Reconfigurable Computer and Logic (MERCAL) module has been developed and verified. MERCAL was designed to be a general-purpose, universal module that that can provide significant hardware and software resources to meet the requirements of many of today's complex embedded applications. This is accomplished in the MERCAL module by combining a sub credit card size PC in a DIMM form factor with a XILINX Spartan I1 FPGA. The PC has the ability to download program files to the FPGA to configure it for different hardware functions and to transfer data to and from the FPGA via the PC's ISA bus during run time. The MERCAL module combines, in a compact package, the computational power of a 133 MHz PC with up to 150,000 gate equivalents of digital logic that can be reconfigured by software. The general architecture and functionality of the MERCAL hardware and system software are described.

Tucker, Jerry H.↗

NASA NTRS1974

A Functional Description of a Digital Flight Test System for Navigation and Guidance Research in the Terminal Area

A guidance, navigation, and control system, the Simulated Shuttle Flight Test System (SS-FTS), when interfaced with existing aircraft systems, provides a research facility for studying concepts for landing the space shuttle orbiter and conventional jet aircraft. The SS-FTS, which includes a general-purpose computer, performs all computations for precisely following a prescribed approach trajectory while properly managing the vehicle energy to allow safe arrival at the runway and landing within prescribed dispersions. The system contains hardware and software provisions for navigation with several combinations of possible navigation aids that have been suggested for the shuttle. The SS-FTS can be reconfigured to study different guidance and navigation concepts by changing only the computer software, and adapted to receive different radio navigation information through minimum hardware changes. All control laws, logic, and mode interlocks reside solely in the computer software.

Hegarty, D. M.↗

NASA NTRS1993

Analysis of a hardware and software fault tolerant processor for critical applications

Computer systems for critical applications must be designed to tolerate software faults as well as hardware faults. A unified approach to tolerating hardware and software faults is characterized by classifying faults in terms of duration (transient or permanent) rather than source (hardware or software). Errors arising from transient faults can be handled through masking or voting, but errors arising from permanent faults require system reconfiguration to bypass the failed component. Most errors which are caused by software faults can be considered transient, in that they are input-dependent. Software faults are triggered by a particular set of inputs. Quantitative dependability analysis of systems which exhibit a unified approach to fault tolerance can be performed by a hierarchical combination of fault tree and Markov models. A methodology for analyzing hardware and software fault tolerant systems is applied to the analysis of a hypothetical system, loosely based on the Fault Tolerant Parallel Processor. The models consider both transient and permanent faults, hardware and software faults, independent and related software faults, automatic recovery, and reconfiguration.

Dugan, Joanne B.↗

NASA NTRSDate not supplied

Initial Development of A Digital Twin Model for an Electrified Aircraft Propulsion Emulation Rig

In support of aviation fuel burn and emission reduction goals, NASA is pursing high-payoff research investments that promise to transform aviation. This includes investments in Electrified Aircraft Propulsion (EAP), which relies on the generation, storage, transmission, and use of electrical power for producing thrust and optimizing propulsion system efficiency. Multiple technology challenges must be addressed to unlock the full potential of EAP. This includes advances in propulsion controls, which will be vital for ensuring coordinated efficient operation of the complex integrated subsystems that comprise EAP architectures. To support EAP controls research, the NASA Glenn Research Center has developed the Hybrid Propulsion Emulation Rig (HyPER). The HyPER laboratory hardware includes shaft-mounted electric machines, power converters, power supplies, power distribution cables, and an energy storage device that can be reconfigured to represent a variety of EAP architectures. It also includes an integrated real-time computer system that hosts developed EAP control software and turbomachinery simulations. This enables the electrical system and rotating shafts of EAP designs to be implemented in actual hardware and integrated with turbomachinery simulations and system-level EAP control logic implemented in software. In this form, the HyPER laboratory provides a partially simulated, partially hardware-in-the-loop test environment enabling the initial development and evaluation of EAP control technology. A prerequisite for the development of EAP control designs is the availability of a system model that accurately reflects the operation of the electrical system hardware. To support this need, a digital twin model of the HyPER electrical system hardware is under development. This model is being coded in the MATLAB Simulink environment and uses the NASA-developed Electrical Modeling and Thermal Analysis Toolbox (EMTAT) to construct a digital twin framework. EMTAT contains generic electrical component building blocks that are simulated at turbomachinery timescales. Associated inputs and outputs allow the blocks to be combined to model complete electrical systems. The EMTAT blocks also contain adjustable internal maps and parameters that can be set to reflect the operation of a specific electrical component. For the HyPER digital twin, the settings of these EMTAT block internal maps and parameters is determined through machine learning approaches applied to characterization run data collected from the laboratory. During characterization runs the laboratory electrical system hardware is subjected to a full range of torque, speed, and power settings. Acquired data is then used to estimate EMTAT block parameters using a variety of machine learning techniques. The resulting digital twin model is found to match the operation of actual HyPER hardware with an accuracy suitable for control development purposes. It also holds promise for other applications including modeling the performance of HyPER laboratory reconfigurations and model-based anomaly detection. Planned follow-on work to automate post-processing of acquired laboratory data to update the HyPER digital twin model will also be presented and discussed.

Electrified Aircraft Propulsion↗

NASA NTRS1983

Some methods of estimating a coverage parameter

To demonstrate the high reliability of fault-tolerant computing systems, experimental testing can be performed by injecting faults into their hardware and observing the times needed to detect and isolate failed components and reconfigure the good components. Coverage, a parameter measuring continued system success, is the probability that recovery occurs before other, perhaps catastrophic, component failures occur. Methods of estimating coverage are given for the case of randomly selecting a subset of the pins or chips for testing. Pin-level samples of times to recovery are treated by the Type I censoring model often used in life testing.

Lee, L. D.↗

NASA NTRS1992

ACTS T1-VSAT - The intelligent earth station

The functional design of the software for NASA's Advanced Communication Technology Satellite (ACTS) T1-VSAT (Very Small Aperture Terminal) is described. The design provides a flexible interface to allow customized control of a satellite network and to provide external processes with access to network capabilities without requiring modification to the network hardware or software. Some of the envisioned features are: automatic number location; dynamic reconfiguration of the number plan tables; security features of call priority, call preemption, and remote verification; automatic reconfiguration of least cost routing tables; circuit availability verification prior to call setup; audio and video conferencing; on demand broadband dial-up service; on demand dial-up broadband broadcast service; and ISDN. A brief review is also given of the ACTS satellite and network, the network management, and the ACTS T1-VSAT earth station.

Manning, John R.↗

NASA NTRS1997

[Advanced Development for Space Robotics With Emphasis on Fault Tolerance Technology]

This report describes work developing fault tolerant redundant robotic architectures and adaptive control strategies for robotic manipulator systems which can dynamically accommodate drastic robot manipulator mechanism, sensor or control failures and maintain stable end-point trajectory control with minimum disturbance. Kinematic designs of redundant, modular, reconfigurable arms for fault tolerance were pursued at a fundamental level. The approach developed robotic testbeds to evaluate disturbance responses of fault tolerant concepts in robotic mechanisms and controllers. The development was implemented in various fault tolerant mechanism testbeds including duality in the joint servo motor modules, parallel and serial structural architectures, and dual arms. All have real-time adaptive controller technologies to react to mechanism or controller disturbances (failures) to perform real-time reconfiguration to continue the task operations. The developments fall into three main areas: hardware, software, and theoretical.

Tesar, Delbert↗

NASA NTRS2004

Data Relay Board with Protocol for High-Speed, Free-Space Optical Communications

In a free-space optical communication system, the mitigation of transient outages through the incorporation of error-control methods is of particular concern, the outages being caused by scintillation fades and obscurants. The focus of this innovative technology is the development of a data relay system for a reliable high-data-rate free-spacebased optical-transport network. The data relay boards will establish the link, maintain synchronous connection, group the data into frames, and provide for automatic retransmission (ARQ) of lost or erred frames. A certain Quality of Service (QoS) can then be ensured, compatible with the required data rate. The protocol to be used by the data relay system is based on the draft CCSDS standard data-link protocol Proximity-1, selected by orbiters to multiple lander assets in the Mars network, for example. In addition to providing data-link protocol capabilities for the free-space optical link and buffering the data, the data relay system will interface directly with user applications over Gigabit Ethernet and/or with highspeed storage resources via Fibre Channel. The hardware implementation is built on a network-processor-based architecture. This technology combines the power of a hardware switch capable of data switching and packet routing at Gbps rates, with the flexibility of a software- driven processor that can host highly adaptive and reconfigurable protocols used, for example, in wireless local-area networks (LANs). The system will be implemented in a modular multi-board fashion. The main hardware elements of the data relay system are the new data relay board developed by Rockwell Scientific, a COTS Gigabit Ethernet board for user interface, and a COTS Fibre Channel board that connects to local storage. The boards reside in a cPCI back plane, and can be housed in a VME-type enclosure.

Wright, Malcolm↗