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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Application of aluminum nitrides as electrical insulator for electric capacitors is discussed. Electrical properties of aluminum nitrides are analyzed and specific use with field effect transistors is defined. Operational limits of field effect transistors are developed.
Circuit allows minimization of thermal-drift errors, low power consumption, operation over wide dynamic range, improved sensitivity and stability with metaloxide-semiconductor field-effect transistor sensors.
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A process for directly integrating photoconductive lead sulfide (PbS) infrared detector material with silicon MOS integrated circuits has been developed primarily for application in long (greater than 10,000 detector elements) linear arrays for pushbroom scanning applications. The processing technology is based on the conventional PMOS and CMOS technologies with a variation in the metallization. Results and measurements on a fully integrated eight-element multiplexer are shown.
In an investigation of metal oxide semiconductor field effect transistor (MOFSET) devices, a one-dimensional mathematical model of device dynamics was prepared, from which an accurate and computationally efficient drain current expression could be derived for subsequent parameter extraction. While a critical review revealed weaknesses in existing 1-D models (Pao-Sah, Pierret-Shields, Brews, and Van de Wiele), this new model in contrast was found to allow all the charge distributions to be continuous, to retain the inversion layer structure, and to include the contribution of current from the pinched-off part of the device. The model allows the source and drain to operate in different regimes. Numerical algorithms used for the evaluation of surface potentials in the various models are presented.
The use of fluorinated gate oxides may provide an improvement in nMOSFET reliability by enhancing hot carrier resistance. In order to clarify the mechanisms by which polysilicon processing and fluorination influence the oxide behavior, a matrix of nMOSFET structures was prepared using various processing, doping, and implantation strategies. These structures were evaluated for crystalline morphology and chemical element distribution. Mechanical stress measurements were taken on the polysilicon films from room temperature to cryogenic temperature. These examinations showed that fluorination of a structure with randomly oriented polysilicon can reduce residual mechanical stress and improve hot carrier resistance at room temperature.
Circuit reliably switches power at supply potential of minus 1,500 V, with controlled frequency and duty cycle. Used in argon-plasma ion-bombardment equipment for texturing copper electrodes, as described in "Texturing Copper To Reduce Secondary Emission of Electrons" (LEW-15898), also adapted to use in powering gaseous flash lamps and stroboscopes.
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Electronic systems designed for use in deep space and planetary exploration missions are expected to encounter extreme temperatures and wide thermal swings. Silicon-based devices are limited in their wide-temperature capability and usually require extra measures, such as cooling or heating mechanisms, to provide adequate ambient temperature for proper operation. Silicon-On-Insulator (SOI) technology, on the other hand, lately has been gaining wide spread use in applications where high temperatures are encountered. Due to their inherent design, SOI-based integrated circuit chips are able to operate at temperatures higher than those of the silicon devices by virtue of reducing leakage currents, eliminating parasitic junctions, and limiting internal heating. In addition, SOI devices provide faster switching, consume less power, and offer improved radiation-tolerance. Very little data, however, exist on the performance of such devices and circuits under cryogenic temperatures. In this work, the performance of an SOI bootstrapped, full-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.
The relative importance of heavy-ion interaction with the oxide, charge ionized in the epilayer, and charge ionized in the drain substrate, on the bias for SEGR failure is experimentally investigated.
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Silicon-On-Insulator (SOI) technology utilizes the addition of an insulation layer in its structure to reduce leakage currents and to minimize parasitic junctions. As a result, SOIbased devices exhibit reduced internal heating as compared to the conventional silicon devices, consume less power, and can withstand higher operating temperatures. In addition, SOI electronic integrated circuits display good tolerance to radiation by virtue of introducing barriers or lengthening the path for penetrating particles and/or providing a region for trapping incident ionization. The benefits of these parts make them suitable for use in deep space and planetary exploration missions where extreme temperatures and radiation are encountered. Although designed for high temperatures, very little data exist on the operation of SOI devices and circuits at cryogenic temperatures. In this work, the performance of a commercial-off-the-shelf (COTS) SOI half-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.
Electrical power and control systems designed for use in planetary exploration missions and deep space probes require electronics that are capable of efficient and reliable operation under extreme temperature conditions. In addition, space-based infrared satellites, all-electric ships, jet engines, electromagnetic launchers, magnetic levitation transport systems, and power facilities are also typical examples where system electronics are expected to be exposed to harsh temperatures and to operate under severe thermal swings. Most commercial-off-the-shelf (COTS) devices are not designed to function under such extreme conditions and very little data exist on their performance outside their specified range of operation. In this work, the performance of an ultrafast gate driver for controlling power-level transistors was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to assess performance for potential use of this device in space exploration missions under extreme temperature conditions.
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On-chip p-FETs were developed to monitor the radiation dose of n-well CMOS ICs by monitoring the threshold voltage shifts due to radiation induced oxide and interface charge.