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NASA NTRS2015

History and Flight Devleopment of the Electrodynamic Dust Shield

The surfaces of the moon, Mars, and that of some asteroids are covered with a layer of dust that may hinder robotic and human exploration missions. During the Apollo missions, for example, lunar dust caused a number of issues including vision obscuration, false instrument readings, contamination, and elevated temperatures. In fact, some equipment neared failure after only 75 hours on the lunar surface due to effects of lunar dust. NASA's Kennedy Space Center has developed an active technology to remove dust from surfaces during exploration missions. The Electrodynamic Dust Shield (EDS), which consists of a series of embedded electrodes in a high dielectric strength substrate, uses a low power, low frequency signal that produces an electric field wave that travels across the surface. This non-uniform electric field generates dielectrophoretic and electrostatic forces capable of moving dust out of these surfaces. Implementations of the EDS have been developed for solar radiators, optical systems, camera lenses, visors, windows, thermal radiators, and fabrics The EDS implementation for transparent applications (solar panels, optical systems, windows, etc.) uses transparent indium tin oxide electrodes on glass or transparent lm. Extensive testing was performed in a roughly simulated lunar environment (one-sixth gravity at 1 mPa atmospheric pressure) with lunar simulant dust. EDS panels over solar radiators showed dust removal that restored solar panel output reaching values very close to their initial output. EDS implementations for thermal radiator protection (metallic spacecraft surfaces with white thermal paint and reflective films) were also extensively tested at similar high vacuum conditions. Reflectance spectra for these types of implementations showed dust removal efficiencies in the 96% to 99% range. These tests indicate that the EDS technology is now at a Technology Readiness Level of 4 to 5. As part of EDS development, a flight version is being prepared for several flight opportunities. The flight version of the EDS will incorporate significantly smaller electronics, with an expected mass and volume of 500 g and 350 cm(exp. 3) respectively. One of the opportunities is an International Space Station (ISS) experiment: Materials for International Space Station Experiment 10 (MISSE-10). This experiment aims to verify the EDS can withstand the harsh environment of space and will look to closely replicate the solar environment experienced on the moon. A second flight opportunity exists to provide an EDS to several companies as part of NASA's Lunar CATALYST program. The current mission concept would fly the EDS on the footpad of one of the Lunar CATALYST vehicles. Dust will likely deposit on the footpad through normal surface rover activities, but also upon landing where lunar dust is expected to be uplifted. To analyze the e effectiveness of the EDS system, photographs of the footpad with one of the spacecrafts onboard cameras are anticipated. If successful in these test flights, the EDS technology will be ready to be used in the protection of actual mission equipment for future NASA and commercial missions to the moon, asteroids, and Mars.

Lunar↗
NASA NTRS2001

Packaging Technology Developed for High-Temperature Silicon Carbide Microsystems

High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as sensors and electronics for space missions to the inner solar system, sensors for in situ combustion and emission monitoring, and electronics for combustion control for aeronautical and automotive engines. However, these devices cannot be used until they can be packaged in appropriate forms for specific applications. Suitable packaging technology for operation temperatures up to 500 C and beyond is not commercially available. Thus, the development of a systematic high-temperature packaging technology for SiC-based microsystems is essential for both in situ testing and commercializing high-temperature SiC sensors and electronics. In response to these needs, researchers at Glenn innovatively designed, fabricated, and assembled a new prototype electronic package for high-temperature electronic microsystems using ceramic substrates (aluminum nitride and aluminum oxide) and gold (Au) thick-film metallization. Packaging components include a ceramic packaging frame, thick-film metallization-based interconnection system, and a low electrical resistance SiC die-attachment scheme. Both the materials and fabrication process of the basic packaging components have been tested with an in-house-fabricated SiC semiconductor test chip in an oxidizing environment at temperatures from room temperature to 500 C for more than 1000 hr. These test results set lifetime records for both high-temperature electronic packaging and high-temperature electronic device testing. As required, the thick-film-based interconnection system demonstrated low (2.5 times of the room-temperature resistance of the Au conductor) and stable (decreased 3 percent in 1500 hr of continuous testing) electrical resistance at 500 C in an oxidizing environment. Also as required, the electrical isolation impedance between printed wires that were not electrically joined by a wire bond remained high (greater than 0.4 GW) at 500 C in air. The attached SiC diode demonstrated low (less than 3.8 W/mm2) and relatively consistent dynamic resistance from room temperature to 500 C. These results indicate that the prototype package and the compatible die-attach scheme meet the initial design standards for high-temperature, low-power, and long-term operation. This technology will be further developed and evaluated, especially with more mechanical tests of each packaging element for operation at higher temperatures and longer lifetimes.

Chen, Liang-Yu↗
NASA NTRS1997

Solar Cells for Lunar Application

In this work a preliminary study of the vacuum evaporation of silicon extracted from the lunar regolith has been undertaken. An electron gun vacuum evaporation system has been adapted for this purpose. Following the calibration of the system using ultra high purity silicon deposited on Al coated glass substrates, thin films of lunar Si were evaporated on a variety of crystalline substrates as well as on glass and lightweight 1 mil (25 microns) Al foil. Extremely smooth and featureless films with essentially semiconducting properties were obtained. Optical absorption analysis sets the bandgap (about 1.1 eV) and the refractive index (n=3.5) of the deposited thin films close to that of crystalline silicon. Secondary ion mass spectroscopy and energy dispersive spectroscopy analysis indicated that these films are essentially comparable to high purity silicon and that the evaporation process resulted in a substantial reduction of impurity levels. All layers exhibited a p-type conductivity suggesting the presence of a p-type dopant in the fabricated layers. While the purity of the 'lunar waste material' is below that of the 'microelectronic-grade silicon', the vacuum evaporated material properties seems to be adequate for the fabrication of average performance Si-based devices such as thin film solar cells. Taking into account solar cell thickness requirements (greater than 10 microns) and the small quantities of lunar material available for this study, solar cell fabrication was not possible. However, the high quality of the optical and electronic properties of evaporated thin films was found to be similar to those obtained using ultra-high purity silicon suggest that thin film solar cell production on the lunar surface with in situ resource utilization may be a viable approach for electric power generation on the moon.

Freundlich, Alex↗
NASA NTRS2000

Crystal Growth of ZnSe and Related Ternary Compound Semiconductors by Vapor Transport

Interest in optical devices which can operate in the visible spectrum has motivated research interest in the II-VI wide band gap semiconductor materials. The recent challenge for semiconductor opto-electronics is the development of a laser which can operate at short visible wavelengths. In the past several years, major advances in thin film technology such as molecular beam epitaxy and metal organic chemical vapor deposition have demonstrated the applicability of II-VI materials to important devices such as light-emitting diodes, lasers, and ultraviolet detectors. With an energy gap of 2.7 eV at room temperature, and an efficient band- to-band transition, ZnSe has been studied extensively as the primary candidate for a blue light emitting diode for optical displays, high density recording, and military communications. By employing a ternary or quaternary system, the energy band gap of II-VI materials can be tuned to a specific range. While issues related to the compositional inhomogeneity and defect incorporation are still to be fully resolved, ZnSe bulk crystals and ZnSe-based heterostructures such as ZnSe/ZnSeS, ZnSe/ZnCdSe and ZnCdSe/ZnSeS have showed photopumped lasing capability in the blue-green region at a low threshold power and high temperatures. The demonstration of its optical bistable properties in bulk and thin film forms also make ZnSe a possible candidate material for the building blocks of a digital optical computer. Despite this, developments in the crystal growth of bulk H-VI semiconductor materials has not advanced far enough to provide the low price, high quality substrates needed for the thin film growth technology.

Su, Ching-Hua↗
NASA NTRS2013

Passivation of Flexible YBCO Superconducting Current Lead With Amorphous SiO2 Layer

Adiabatic demagnetization refrigerators (ADR) are operated in space to cool detectors of cosmic radiation to a few 10s of mK. A key element of the ADR is a superconducting magnet operating at about 0.3 K that is continually energized and de-energized in synchronism with a thermal switch, such that a piece of paramagnetic salt is alternately warm in a high magnetic field and cold in zero magnetic field. This causes the salt pill or refrigerant to cool, and it is able to suck heat from an object, e.g., the sensor, to be cooled. Current has to be fed into and out of the magnets from a dissipative power supply at the ambient temperature of the spacecraft. The current leads that link the magnets to the power supply inevitably conduct a significant amount of heat into the colder regions of the supporting cryostat, resulting in the need for larger, heavier, and more powerful supporting refrigerators. The aim of this project was to design and construct high-temperature superconductor (HTS) leads from YBCO (yttrium barium copper oxide) composite conductors to reduce the heat load significantly in the temperature regime below the critical temperature of YBCO. The magnet lead does not have to support current in the event that the YBCO ceases to be superconducting. Cus - tomarily, a normal metal conductor in parallel with the YBCO is a necessary part of the lead structure to allow for this upset condition; however, for this application, the normal metal can be dispensed with. Amorphous silicon dioxide is deposited directly onto the surface of YBCO, which resides on a flexible substrate. The silicon dioxide protects the YBCO from chemically reacting with atmospheric water and carbon dioxide, thus preserving the superconducting properties of the YBCO. The customary protective coating for flexible YBCO conductors is silver or a silver/gold alloy, which conducts heat many orders of magnitude better than SiO2 and so limits the use of such a composite conductor for passing current across a thermal gradient with as little flow of heat as possible to make an efficient current lead. By protecting YBCO on a flexible substrate of low thermal conductivity with SiO2, a thermally efficient and flexible current lead can be fabricated. The technology is also applicable to current leads for 4 K superconducting electronics current biasing. A commercially available thin-film YBCO composite tape conductor is first stripped of its protective silver coating. It is then mounted on a jig that holds the sample flat and acts as a heat sink. Silicon dioxide is then deposited onto the YBCO to a thickness of about 1 micron using PECVD (plasma-enhanced chemical vapor deposition), without heating the YBCO to the point where degradation occurs. Since SiO2 can have good high-frequency electrical properties, it can be used to coat YBCO cable structures used to feed RF signals across temperature gradients. The prime embodiment concerns the conduction of DC current across the cryogenic temperature gradient. The coating is hard and electrically insulating, but flexible.

Johannes, Daniel↗
NASA NTRS2004

Quantification Of 4H- To 3C-Polymorphism In Silicon Carbide (SiC) Epilayers And An Investigation Of Recombination-Enhanced Dislocation Motion In SiC By Optical Emission Microscopy (Oem) Techniques

Environments that impose operational constraints on conventional silicon-(Si) based semiconductor devices frequently appear in military- and space-grade applications. These constraints include high temperature, high power, and high radiation environments. Silicon carbide (SiC), an alternative type of semiconductor material, has received abundant research attention in the past few years, owing to its radiation-hardened properties as well as its capability to withstand high temperatures and power levels. However, the growth and manufacture of SiC devices is still comparatively immature, and there are severe limitations in present crystal growth and device fabrication processes. Among these limitations is a variety of crystal imperfections known as defects. These imperfections can be point defects (e.g., vacancies and interstitials), line defects (e.g., edge and screw dislocations), or planar defects (e.g., stacking faults and double-positioning boundaries). All of these defects have been experimentally shown to be detrimental to the performance of electron devices made from SiC. As such, it is imperative that these defects are significantly reduced in order for SiC devices to become a viable entity in the electronics world. The NASA Glenn High Temperature Integrated Electronics & Sensors Team (HTIES) is working to identify and eliminate these defects in SiC by implementing improved epitaxial crystal growth procedures. HTIES takes two-inch SiC wafers and etches patterns, producing thousands of mesas into each wafer. Crystal growth is then carried out on top of these mesas in an effort to produce films of improved quality-resulting in electron devices that demonstrate superior performance-as well as fabrication processes that are cost-effective, reliable, and reproducible. In this work, further steps are taken to automate HTIES' SiC wafer inspection system. National Instruments LabVIEW image processing and pattern recognition routines are developed that are capable of quantifying and mapping defects on both the substrate and mesa surfaces, and of quantifying polymorphic changes in the grown materials. In addition, an optical emission microscopy (OEM) system is developed that will facilitate comprehensive study of recombination-enhanced dislocation motion (REDM).

Speer, Kevin M.↗
NASA NTRSDate not supplied

Bio-inspired Surface Structures to Mitigate Interfacial Particle Adhesion and Erosion - A Review

Lunar dust known as regolith is a huge challenge for lunar exploration missions. Formed over millennia by a complex process involving impacts of meteoroids and micrometeoroids on the lunar surface, lunar dust is porous, highly abrasive with sharp jagged edges, chemically reactive, electrostatically charged and sometimes magnetic. The chemical composition and thickness of the dust layer also varies in different regions of the lunar surface. From samples obtained by previous lunar missions, the average particle size is below 100 microns. This dust has the tendency to strongly adhere to any exposed surfaces, and often degrades the material functionality to eventually cause failure. Any material on the lunar surface is also subject to harsh temperature cycles ranging from -178 ̊C to + 123 ̊C and extreme ultraviolet radiation. While on the lunar surface, different classes of materials would be required for different applications. Advanced materials have been and will be used throughout the lunar lander, habitat, and mission equipment. Examples include: polymeric materials for astronaut protective clothing; metals and ceramics for the lunar lander legs and habitats, and excavating equipment; and semiconductors for solar panels and on-board electronics. In all these applications, the surfaces of the materials are expected or understood to be exposed to the extreme lunar environment condition that includes the regolith dust. During the Apollo missions, the dust clung to and abraded the astronaut’s suits, degraded seals, optics, clogged sensors and reduced performance of thermal radiators. The lunar dust adheres to the surface by various mechanisms, which include electrostatic and Coulombic interactions, Van-der-Waals forces, magnetic forces, mechanical interlocking, chemical bonding and donor-acceptor interactions. There are three primary strategies for developing technologies to minimize the lunar dust adhesion: active, passive and a combination of active and passive. In the active approach, an external energy is needed to prevent or remove particles from collecting on the surface. Mechanically powered brushes and electrodynamic dust screens are two examples. In the passive approach, no external power is needed, and the material surface properties are able to mitigate dust adhesion. A well-known example of this strategy is the low work function coatings for non-stick surfaces. In most cases a combination of active and passive methods might be needed to optimally manage the lunar regolith. The passive method is significantly more attractive as it does not require any external power or an additional control subsystem. These approaches optimize the mission payload and reduce risk. Surface modification to minimize the dust adhesion is thus very important to lunar missions. Here, naturally evolved surface structures might provide guidance for solutions. There are several factors that have to be considered for minimizing particle adhesion to a surface. These include the substrate material properties, surface topography, chemistry, and the characteristics of the adhering particles. When engineering a surface, the substrate material chosen would be dependent on the needs of the application. Tailoring the surface microstructure or chemistry opens up more possibilities for its optimal utilization

Lunar Dust↗
NASA NTRS2006

Carbon-Nanotube-Carpet Heat-Transfer Pads

Microscopic thermal-contact pads that include carpet-like arrays of carbon nanotubes have been invented for dissipating heat generated in integrated circuits and similarly sized single electronic components. The need for these or other innovative thermal-contact pads arises because the requisite high thermal conductances cannot be realized by scaling conventional macroscopic thermal-contact pads down to microscopic sizes. Overcoming limitations of conventional thermal-contact materials and components, the carbon-nanotube thermal-contact pads offer the high thermal conductivities needed to accommodate the high local thermal power densities of modern electronic circuits, without need for large clamping pressures, extreme smoothness of surfaces in contact, or gap-filling materials (e.g., thermally conductive greases) to ensure adequate thermal contact. Moreover, unlike some conventional thermal-contact components, these pads are reusable. The figure depicts a typical pad according to the invention, in contact with a rough surface on an electronic component that is to be cooled. Through reversible bending and buckling of carbon nanotubes at asperities on the rough surface, the pad yields sufficiently, under relatively low contact pressure, that thermal contact is distributed to many locations on the surface to be cooled, including valleys where contact would not ordinarily occur in conventional clamping of rigid surfaces. Hence, the effective thermal-contact area is greater than that achievable through scaling down of a macroscopic thermal-contact pad. The extremely high longitudinal thermal conductivities of the carbon nanotubes are utilized to conduct heat away from potential hot spots on the surface to be cooled. The fibers protrude from a layer of a filler material (Cu, Ag, Au, or metal-particle- filled gels), which provides both mechanical support to maintain the carbon nanotubes in alignment and thermal conductivity to enhance the diffusion of concentrated heat from the nanotubes into the larger adjacent volume of a heat sink. The array of carbon nanotubes, the filler material, and the heat sink are parts of a unitary composite structure that is fabricated as follows: 1. Using techniques that have been reported previously, the array of substantially perpendicularly oriented carbon nanotubes is grown on a metal, silicon, or other suitable thermally conductive substrate that is intended to become the heat sink. 2. By means of chemical vapor deposition, physical vapor deposition, plasma deposition, ion sputtering, electrochemical deposition, or casting from a liquid phase, some or all of the interstitial volume between carbon nanotubes is filled with the aforementioned layer of mechanically supporting, thermally conductive material. 3. To cause the carbon nanotubes to protrude the desired length from the filler material, an outer layer of filler is removed by mechanical polishing, chemical mechanical polishing, wet chemical etching, electrochemical etching, or dry plasma etching.

Li, Jun↗
NASA NTRS2013

Silicon Micromachined Microlens Array for THz Antennas

5 5 silicon microlens array was developed using a silicon micromachining technique for a silicon-based THz antenna array. The feature of the silicon micromachining technique enables one to microfabricate an unlimited number of microlens arrays at one time with good uniformity on a silicon wafer. This technique will resolve one of the key issues in building a THz camera, which is to integrate antennas in a detector array. The conventional approach of building single-pixel receivers and stacking them to form a multi-pixel receiver is not suited at THz because a single-pixel receiver already has difficulty fitting into mass, volume, and power budgets, especially in space applications. In this proposed technique, one has controllability on both diameter and curvature of a silicon microlens. First of all, the diameter of microlens depends on how thick photoresist one could coat and pattern. So far, the diameter of a 6- mm photoresist microlens with 400 m in height has been successfully microfabricated. Based on current researchers experiences, a diameter larger than 1-cm photoresist microlens array would be feasible. In order to control the curvature of the microlens, the following process variables could be used: 1. Amount of photoresist: It determines the curvature of the photoresist microlens. Since the photoresist lens is transferred onto the silicon substrate, it will directly control the curvature of the silicon microlens. 2. Etching selectivity between photoresist and silicon: The photoresist microlens is formed by thermal reflow. In order to transfer the exact photoresist curvature onto silicon, there needs to be etching selectivity of 1:1 between silicon and photoresist. However, by varying the etching selectivity, one could control the curvature of the silicon microlens. The figure shows the microfabricated silicon microlens 5 x5 array. The diameter of the microlens located in the center is about 2.5 mm. The measured 3-D profile of the microlens surface has a smooth curvature. The measured height of the silicon microlens is about 280 microns. In this case, the original height of the photoresist was 210 microns. The change was due to the etching selectivity of 1.33 between photoresist and silicon. The measured surface roughness of the silicon microlens shows the peak-to-peak surface roughness of less than 0.5 microns, which is adequate in THz frequency. For example, the surface roughness should be less than 7 microns at 600 GHz range. The SEM (scanning electron microscope) image of the microlens confirms the smooth surface. The beam pattern at 550 GHz shows good directivity.

Lee, Choonsup↗
NASA NTRS2009

Complementary Barrier Infrared Detector

The complementary barrier infrared detector (CBIRD) is designed to eliminate the major dark current sources in the superlattice infrared detector. The concept can also be applied to bulk semiconductor- based infrared detectors. CBIRD uses two different types of specially designed barriers: an electron barrier that blocks electrons but not holes, and a hole barrier that blocks holes but not electrons. The CBIRD structure consists of an n-contact, a hole barrier, an absorber, an electron barrier, and a p-contact. The barriers are placed at the contact-absorber junctions where, in a conventional p-i-n detector structure, there normally are depletion regions that produce generation-recombination (GR) dark currents due to Shockley-Read- Hall (SRH) processes. The wider-bandgap complementary barriers suppress G-R dark current. The barriers also block diffusion dark currents generated in the diffusion wings in the neutral regions. In addition, the wider gap barriers serve to reduce tunneling dark currents. In the case of a superlattice-based absorber, the superlattice itself can be designed to suppress dark currents due to Auger processes. At the same time, the barriers actually help to enhance the collection of photo-generated carriers by deflecting the photo-carriers that are diffusing in the wrong direction (i.e., away from collectors) and redirecting them toward the collecting contacts. The contact layers are made from materials with narrower bandgaps than the barriers. This allows good ohmic contacts to be made, resulting in lower contact resistances. Previously, THALES Research and Technology (France) demonstrated detectors with bulk InAsSb (specifically InAs0.91Sb0.09) absorber lattice-matched to GaSb substrates. The absorber is surrounded by two wider bandgap layers designed to minimize impedance to photocurrent flow. The wide bandgap materials also serve as contacts. The cutoff wavelength of the InAsSb absorber is fixed. CBIRD may be considered as a modified version of the THALES double heterostructure (DH) p-i-n device, but with even wider bandgap barriers inserted at the contact layer/absorber layer interfaces. It is designed to work with either bulk semiconductors or superlattices as the absorber material. The superlattice bandgap can be adjusted to match the desired absorption cutoff wavelength. This infrared detector has the potential of high-sensitivity operation at higher operating temperatures. This would reduce cooling requirements, thereby reducing the power, mass, and volume of the equipment and allowing an increased mission science return.

Ting, David Z.↗
NASA NTRS1998

Effects of Ambient High Temperature Exposure on Alumina-Titania High Emittance Surfaces for Solar Dynamic Systems

Solar dynamic (SD) space power systems require durable, high emittance surfaces on a number of critical components, such as heat receiver interior surfaces and parasitic load radiator (PLR) elements. To enhance surface characteristics, an alumina-titania coating has been applied to 500 heat receiver thermal energy containment canisters and the PLR of NASA Lewis Research Center's (LeRC) 2 kW SD ground test demonstrator (GTD). The alumina-titania coating was chosen because it had been found to maintain its high emittance under vacuum (less than or equal to 10(exp -6) torr) at high temperatures (1457 F (827 C)) for an extended period (approximately 2,700 hours). However, preflight verification of SD systems components, such as the PLR require operation at ambient pressure and high temperatures. Therefore, the purpose of this research was to evaluate the durability of the alumina-titania coating at high temperature in air. Fifteen of sixteen alumina-titania coated Incoloy samples were exposed to high temperatures (600 F (316 C) to l500 F (816 C)) for various durations (2 to 32 hours). Samples, were characterized prior to and after heat treatment for reflectance, solar absorptance, room temperature emittance and emittance at 1,200 F (649 C). Samples were also examined to detect physical defects and to determine surface chemistry using optical microscopy, scanning electron microscopy operated with an energy dispersive spectroscopy (EDS) system, and x ray photoelectron spectroscopy (XPS). Visual examination of the heat-treated samples showed a whitening of samples exposed to temperatures of 1,000 F (538 C) and above. Correspondingly, the optical properties of these samples had degraded. A sample exposed to 1,500 F (816 C) for 24 hours had whitened and the thermal emittance at 1,200 F (649 C) had decreased from the non-heat treated value of 0.94 to 0.62. The coating on this sample had become embrittled with spalling off the substrate noticeable at several locations. Based on this research it is recommended that preflight testing of SD components with alumina-titania coatings be restricted to temperatures no greater than 600 F (316 C) in air to avoid optical degradation. Moreover, components with the alumina-titania coating are likely to experience optical property degradation with direct atomic oxygen exposure in space.

deGroh, Kim K.↗
NASA NTRS2004

New Effective Material Couple--Oxide Ceramic and Carbon Nanotube-- Developed for Aerospace Microsystem and Micromachine Technologies

The prime driving force for using microsystem and micromachine technologies in transport vehicles, such as spacecraft, aircraft, and automobiles, is to reduce the weight, power consumption, and volume of components and systems to lower costs and increase affordability and reliability. However, a number of specific issues need to be addressed with respect to using microsystems and micromachines in aerospace applications--such as the lack of understanding of material characteristics; methods for producing and testing the materials in small batches; the limited proven durability and lifetime of current microcomponents, packaging, and interconnections; a cultural change with respect to system designs; and the use of embedded software, which will require new product assurance guidelines. In regards to material characteristics, there are significant adhesion, friction, and wear issues in using microdevices. Because these issues are directly related to surface phenomena, they cannot be scaled down linearly and they become increasingly important as the devices become smaller. When microsystems have contacting surfaces in relative motion, the adhesion and friction affect performance, energy consumption, wear damage, maintenance, lifetime and catastrophic failure, and reliability. Ceramics, for the most part, do not have inherently good friction and wear properties. For example, coefficients of friction in excess of 0.7 have been reported for ceramics and ceramic composite materials. Under Alternate Fuels Foundation Technologies funding, two-phase oxide ceramics developed for superior high-temperature wear resistance in NASA's High Operating Temperature Propulsion Components (HOTPC) project and new two-layered carbon nanotube (CNT) coatings (CNT topcoat/iron bondcoat/quartz substrate) developed in NASA's Revolutionary Aeropropulsion Concepts (RAC) project have been chosen as a materials couple for aerospace applications, including micromachines, in the nanotechnology lubrication task because of their potential for superior friction and wearf properties in air and in an ultrahigh vacuum, spacelike environment. At the NASA Glenn Research Center, two-phase oxide ceramic eutectics, Al2O3/ZrO2(Y2O3), were directionally solidified using the laser-float-zone process, and carbon nanotubes were synthesized within a high-temperature tube furnace at 800 C. Physical vapor deposition was used to coat all quartz substrates with 5-nm-thick iron as catalyst and bondcoat, which formed iron islands resembling droplets and serving as catalyst particles on the quartz. A series of scanning electron micrographs showing multiwalled carbon nanotubes directionally grown as aligned "nanograss" on quartz is presented. Unidirectional sliding friction eperiments were conducted at Glenn with the two-layered CNT coatings in contact with the two-phase Al2O3/ZrO2(Y2O3) eutectics in air and in ultrachigh vacuum. The main criteria for judging the performance of the materials couple for solid lubrication and antistick applications in a space environment were the coefficient of friction and the wear resistance (reciprocal of wear rate), which had to be less than 0.2 and greater than 10(exp 5) N(raised dot)/cubic millimetes, respectively, in ultrahigh vacuum. In air, the coefficient of friction for the CNT coatings in contact with Al2O3/ZrO2 (Y2O3) eutectics was 0.04, one-fourth of that for quartz. In an ultrahigh vacuum, the coefficient of friction for CNT coatings in contact with Al2O3/ZrO2 (Y2O3) was one-third of that for quartz. The two-phase Al2O3/ZrO2 (Y2O3) eutectic coupled with the two-layered CNT coating met the coefficient of friction and wear resistance criteria both in air and in an ultrahigh vacuum, spacelike environment. This material's couple can dramatically improve the stiction (or adhesion), friction, and wear resistance of the contacting surfaces, which are major issues for microdevices and micromachines.

Miyoshi, Kazuhisa↗
NASA NTRS2001

Atomically Flat Surfaces Developed for Improved Semiconductor Devices

New wide bandgap semiconductor materials are being developed to meet the diverse high temperature, -power, and -frequency demands of the aerospace industry. Two of the most promising emerging materials are silicon carbide (SiC) for high-temperature and high power applications and gallium nitride (GaN) for high-frequency and optical (blue-light-emitting diodes and lasers) applications. This past year Glenn scientists implemented a NASA-patented crystal growth process for producing arrays of device-size mesas whose tops are atomically flat (i.e., step-free). It is expected that these mesas can be used for fabricating SiC and GaN devices with major improvements in performance and lifetime. The promising new SiC and GaN devices are fabricated in thin-crystal films (known as epi films) that are grown on commercial single-crystal SiC wafers. At this time, no commercial GaN wafers exist. Crystal defects, known as screw defects and micropipes, that are present in the commercial SiC wafers propagate into the epi films and degrade the performance and lifetime of subsequently fabricated devices. The new technology isolates the screw defects in a small percentage of small device-size mesas on the surface of commercial SiC wafers. This enables atomically flat surfaces to be grown on the remaining defect-free mesas. We believe that the atomically flat mesas can also be used to grow GaN epi films with a much lower defect density than in the GaN epi films currently being grown. Much improved devices are expected from these improved low-defect epi films. Surface-sensitive SiC devices such as Schottky diodes and field effect transistors should benefit from atomically flat substrates. Also, we believe that the atomically flat SiC surface will be an ideal surface on which to fabricate nanoscale sensors and devices. The process for achieving atomically flat surfaces is illustrated. The surface steps present on the "as-received" commercial SiC wafer is also illustrated. because of the small tilt angle between the crystal "basal" plane and the polished wafer surface. These steps are used in normal SiC epi film growth in a process known as stepflow growth to produce material for device fabrication. In the new process, the first step is to etch an array of mesas on the SiC wafer top surface. Then, epi film growth is carried out in the step flow fashion until all steps have grown themselves out of existence on each defect-free mesa. If the size of the mesas is sufficiently small (about 0.1 by 0.1 mm), then only a small percentage of the mesas will contain an undesired screw defect. Mesas with screw defects supply steps during the growth process, allowing a rough surface with unwanted hillocks to form on the mesa. The improvement in SiC epi surface morphology achievable with the new technology is shown. An atomic force microscope image of a typical SiC commercial epilayer surface is also shown. A similar image of an SiC atomically flat epi surface grown in a Glenn laboratory is given. With the current screw defect density of commercial wafers (about 5000 defects/cm2), the yield of atomically free 0.1 by 0.l mm mesas is expected to be about 90 percent. This is large enough for many types of electronic and optical devices. The implementation of this new technology was recently published in Applied Physics Letters. This work was initially carried out in-house under a Director's Discretionary Fund project and is currently being further developed under the Information Technology Base Program.

Powell, J. Anthony↗