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At least 163 records · Page 9

JTEC Panel report on microelectromechanical systems in Japan

This report summarizes recent activities in the development of microelectromechanical systems (MEMS) in Japan. For the purposes of this study, 'MEMS' means batch-fabricated miniature devices that convert physical parameters to or from electrical signals and that depend on mechanical structures or parameters in important ways for their operation. The report covers advanced materials and process technology; sensors and sensing microstructures; microactuators and actuation mechanisms; sensor-circuit integration and system partitioning; advanced packaging, microassembly, and testing technologies; and MEMS design techniques, applications, and infrastructure. The panel found that Japanese industry is emphasizing approaches to MEMS that are similar to those taken by U.S. industry (i.e., approaches based on silicon integrated-circuit technology); these efforts are comparable in their level of development to those in the United States. However, the ten-year, $250 million, MITI-sponsored program in micromachines emphasizes the miniaturization of more traditional (nonlithographic) machining processes, an area in which there is no comparable U.S. effort. Packaging technology and applications for batch-fabricated MEMS devices is considered a major challenge in both countries. The panel concluded that these and other issues will require global leadership and international cooperation to realize the benefits of MEMS in a timely way.

Wise, Kensall D.↗

The NASA Electronic Parts and Packaging (NEPP) Program: Overview and the New Tenets for Cost Conscious Mission Assurance on Electrical, Electronic, and Electromechanical (EEE) Parts

The NEPP Program focuses on the reliability aspects of electronic devices (integrated circuits such as a processor in a computer). There are three principal aspects of this reliability: 1) Lifetime, inherent failure and design issues related to the EEE parts technology and packaging; 2) Effects of space radiation and the space environment on these technologies, and; 3) Creation and maintenance of the assurance support infrastructure required for mission success. The NEPP mission is to provide guidance to NASA for the selection and application of microelectronics technologies, to improve understanding of the risks related to the use of these technologies in the space environment, and to ensure that appropriate EEE parts research is performed to meet NASA mission assurance needs. NEPPs FY15 goals are to represent the NASA voice to the greater aerospace EEE parts community including supporting anti-counterfeit and trust, provide relevant guidance to cost-effective missions, aid insertion of advanced (and commercial) technologies, resolve unexpected parts issues, ensure access to appropriate radiation test facilities, and collaborate as widely as possible with external entities. In accordance with the changing mission profiles throughout NASA, the NEPP Program has developed a balanced portfolio of efforts to provide agency-wide assurance for not only traditional spacecraft developments, but also those in-line with the new philosophies emerging worldwide. In this presentation, we shall present an overview of this program and considerations for EEE parts assurance as applied to cost conscious missions.

space radiation↗

Development and evaluation of a helicopter-borne water-quality monitoring system

A small, helicopter-borne water-quality monitoring package is being developed by the NASA/EPA using a combination of basic in situ water quality sensors and physical sample collector technology. The package is a lightweight system which can be carried and operated by one person as a passenger in a small helicopter typically available by rental at commercial airports. Real-time measurements are made by suspending the water quality monitoring package with a cable from the hovering helicopter. Designed primarily for use in rapidly assessing hazardous material spills in inland and coastal zone water bodies, the system can survey as many as 20 data stations up to 1.5 kilometers apart in 1 hour. The system provides several channels of sensor data and allows for the addition of future sensors. The system will also collect samples from selected sites with sample collection on command. An EPA Spill Response Team member can easily transport, deploy, and operate the water quality monitoring package to determine the distribution, movement, and concentration of the spilled material in the water body.

Wallace, J. W.↗

Reliability of CCGA 1152 and CCGA 1272 Interconnect Packages for Extreme Thermal Environments

Ceramic column grid array (CCGA) packages have been increasing in use based on their advantages of high interconnect density, very good thermal and electrical performance, and compatibility with standard surface-mount packaging assembly processes. CCGA packages are used in space applications such as in logics and microprocessor functions, telecommunications, flight avionics, and payload electronics. As these packages tend to have less solder joint strain relief than leaded packages, the reliability of CCGA packages is very important for short- and long-term space missions. Certain planetary satellites require operations of thermally uncontrolled hardware under extremely cold and hot temperatures with large diurnal temperature change from day to night. The planetary protection requires the hardware to be baked at +125 C for 72 hours to kill microbugs to avoid any biological contamination, especially for sample return missions. Therefore, the present CCGA package reliability research study has encompassed the temperature range of 185 to +125 C to cover various NASA deep space missions. Advanced 1152 and 1272 CCGA packaging interconnects technology test hardware objects have been subjected to ex treme temperature thermal cycles from 185 to +125 C. X-ray inspections of CCGA packages have been made before thermal cycling. No anomalous behavior and process problems were observed in the x-ray images. The change in resistance of the daisy-chained CCGA interconnects was measured as a function of increasing number of thermal cycles. Electrical continuity measurements of daisy chains have shown no anomalies, even until 596 thermal cycles. Optical inspections of hardware have shown a significant fatigue for CCGA 1152 packages over CCGA 1272 packages. No catastrophic failures have been observed yet in the results. Process qualification and assembly are required to optimize the CCGA assembly processes. Optical inspections of CCGA boards have been made after 258 and 596 thermal cycles. Corner columns have started showing significant fatigue per optical inspection results.

Ramesham, Rajeshuni↗

Construction of a Chemical Sensor/Instrumentation Package Using Fiber Optic and Miniaturization Technology

The objective of this research was to construct a chemical sensor/instrumentation package that was smaller in weight and volume than conventional instrumentation. This reduction in weight and volume is needed to assist in further reducing the cost of launching payloads into space. To accomplish this, fiber optic sensors, miniaturized spectrometers, and wireless modems were employed. The system was evaluated using iodine as a calibration analyte.

Newton, R. L.↗

The NASA Electronic Parts and Packaging (NEPP) Program: Insertion of New Electronics Technologies

This viewgraph presentation gives an overview of NASA Electronic Parts and Packaging (NEPP) Program's new electronics technology trends. The topics include: 1) The Changing World of Radiation Testing of Memories; 2) Even Application-Specific Tests are Costly!; 3) Hypothetical New Technology Part Qualification Cost; 4) Where we are; 5) Approaching FPGAs as a More Than a "Part" for Reliability; 6) FPGAs Beget Novel Radiation Test Setups; 7) Understanding the Complex Radiation Data; 8) Tracking Packaging Complexity and Reliability for FPGAs; 9) Devices Supporting the FPGA Need to be Considered; 10) Summary of the New Electronic Technologies and Insertion into Flight Programs Workshop; and 11) Highlights of Panel Notes and Comments

LaBel, Kenneth A.↗

Reliability Technology to Achieve Insertion of Advanced Packaging (RELTECH) program

A joint military-commercial effort to evaluate multichip module (MCM) structures is discussed. The program, Reliability Technology to Achieve Insertion of Advanced Packaging (RELTECH), has been designed to identify the failure mechanisms that are possible in MCM structures. The RELTECH test vehicles, technical assessment task, product evaluation plan, reliability modeling task, accelerated and environmental testing, and post-test physical analysis and failure analysis are described. The information obtained through RELTECH can be used to address standardization issues, through development of cost effective qualification and appropriate screening criteria, for inclusion into a commercial specification and the MIL-H-38534 general specification for hybrid microcircuits.

Fayette, Daniel F.↗

Introducing Current Technologies

The objective of the study was a continuation of the 'technology push' activities that the Technology Transfer Team conducts at this time. It was my responsibility to research current technologies at Langley Research Center and find a commercial market for these technologies in the private industry. After locating a market for the technologies, a mailing package was put together which informed the companies of the benefits of NASA Langley's technologies. The mailing package included articles written about the technology, patent material, abstracts from technical papers, and one-pagers which were used at the Technology Opportunities Showcase (TOPS) exhibitions. The companies were encouraged to consult key team members for further information on the technologies.

Mitchell, Tiffany↗

Chip Scale Package Integrity Assessment by Isothermal Aging

Many aspects of chip scale package (CSP) technology, with focus on assembly reliability characteristics, are being investigated by the JPL-led consortia. Three types of test vehicles were considered for evaluation and currently two configurations have been built to optimize attachment processes. These test vehicles use numerous package types. To understand potential failure mechanisms of the packages, particularly solder ball attachment, the grid CSPs were subjected to environmental exposure. Package I/Os ranged from 40 to nearly 300. This paper presents both as assembled, up to 1, 000 hours of isothermal aging shear test results and photo micrographs, and tensile test results before and after 1,500 cycles in the range of -30/100 C for CSPs. Results will be compared to BGAs with the same the same isothermal aging environmental exposures.

Ghaffarian, Reza↗

The ACTS Flight System - Cost-Effective Advanced Communications Technology

The multibeam communications package (MCP) for the Advanced Communications Technology Satellite (ACTS) to be STS-launched by NASA in 1988 for experimental demonstration of satellite-switched TDMA (at 220 Mbit/sec) and baseband-processor signal routing (at 110 or 27.5 Mbit/sec) is characterized. The developmental history of the ACTS, the program definition, and the spacecraft-bus and MCP parameters are reviewed and illustrated with drawings, block diagrams, and maps of the coverage plan. Advanced features of the MPC include 4.5-dB-noise-figure 30-GHz FET amplifiers and 20-GHz TWTA transmitters which provide either 40-W or 8-W RF output, depending on rain conditions. The technologies being tested in ACTS can give frequency-reuse factors as high as 20, thus greatly expanding the orbit/spectrum resources available for U.S. communications use.

Holmes, W. M., Jr.↗

Automated Lab-on-a-Chip Electrophoresis System

Capillary electrophoresis is an analytical technique that can be used to detect and quantify extremely small amounts of various biological molecules. In the search for biochemical traces of life on other planets, part of this search involves an examination of amino acids, which are the building blocks of life on Earth. The most sensitive method for detecting amino acids is the use of laser induced fluorescence. However, since amino acids do not, in general, fluoresce, they first must be reacted with a fluorescent dye label prior to analysis. After this process is completed, the liquid sample then must be transported into the electrophoresis system. If the system is to be reused multiple times, samples must be added and removed each time. In typical laboratories, this process is performed manually by skilled human operators using standard laboratory equipment. This level of human intervention is not possible if this technology is to be implemented on extraterrestrial targets. Microchip capillary electrophoresis (CE) combined with laser induced fluorescence detection (LIF) was selected as an extremely sensitive method to detect amino acids and other compounds that can be tagged with a fluorescent dye. It is highly desirable to package this technology into an integrated, autonomous, in situ instrument capable of performing CE-LIF on the surface of an extraterrestrial body. However, to be fully autonomous, the CE device must be able to perform a large number of sample preparation and analysis operations without the direct intervention of a human.

Willis, Peter A.↗

Thermal cycling testing to failure of a ceramic column grid array package for space applications

Ceramic column grid array (CCGA) packages have been used increasingly in logic and microprocessor functions, telecommunications, flight avionics boards, payload electronics boards, engineering navigational and science cameras, electronic assemblies, and other applications, because of their inherent advantages such as high electrical interconnect density, very good thermal and electrical performance, and compatibility with standard surface-mount technology (SMT) packaging assembly processes. Because these advanced electronic packages tend to have less solder-joint strain-relief than do leaded flat-pack electronic packages, the reliability of CCGA packages in challenging thermal environments is a very important consideration for their short- and long-term use in JPL-NASA space missions. In this study, we assembled daisy chains of polyimide printed wiring boards from CCGA-interconnect packages, inspected the boards nondestructively, and then subjected them to thermal cycling to assess their reliability in thermal environments from +125°C to -40°C±25°C. The test hardware consists of a CCGA 1752 package (CN version). The package was divided into four daisy-chained sections that were electrically monitored for their continuity during thermal cycling. The CCGA 1752 package is roughly 45 mm × 45 mm with a 42-mm × 42-mm array of 80%/20% Pb/Sn columns on a 1.00-mm pitch. The resistance of the daisy-chained CCGA interconnects was continuously monitored during thermal cycling in a gaseous nitrogen environment. Electrical continuity resistance measurements as a function of thermal cycling are reported here; tests to date have shown significant change to an open circuit in daisy-chain resistance as a function of thermal cycling. The change in interconnect resistance becomes increasingly noticeable with increasing number of thermal cycles. This paper describes the experimental thermal-cycling test results of CCGA 1752 package reliability testing under an extremely wide temperature range. The first failure was observed at 1479th thermal cycle. We report the thermal-cycle reliability test data for ~2500 thermal cycles.

Ramesham, Rajeshuni↗

Chip Scale Package Integrity Assessment by Isothermal Aging

Many aspects of chip scale package (CSP) technology, with focus on assembly reliability characteristics, are being investigated by the JPL-led consortia. Three types of test vehicles were considered for evaluation and currently two configurations have been built to optimize attachment processes.

chipscale↗

Off-Earth Servicing Component Advancement (OESCA) Flight-like Coriolis Mass Flowmeter Development

With the completion of this initial technology development effort, additional work will be required for infusion and advancement through TRL 7. The remainder of the flight-level environmental testing (electromagnetic interference and compatibility or electromagnetic interference/electromagnetic compatibility (EMI/EMC), thermal vacuum or TVAC, along with vibration and shock testing) and post-test functional checkouts will need to be completed and are currently planned as part of an awarded STMD Early Career Initiative (ECI) Project called Advancement of Exploration Components for In-Space Servicing or AXCIS. The results and reports from these additional tests during the ECI effort will complete the technology development package, advancing the TRL to 5 or 6 while providing a vendor capable of manufacturing flight units and a flight-ready design as well as lessons-learned from the environmental testing. The Coriolis flowmeter development unit would then be incorporated into a demonstration testbed system for microgravity testing to further understand how it functions and performs in a space-like environment, advancing the developed technology to TRL 6 or 7. Following this infusion path will enable NASA program(s)/proposal(s) to procure a flight-rated high accuracy Coriolis mass flowmeter for incorporation into in-space and Lunar/Martian surface spacecraft propellant resupply systems which, after successful mission use, will bring the TRL to 7+.

Amy Felt↗

Evolutionary lunar transportation family

The development of an evolutionary lunar transportation family (LTF) that can accommodate evolving human exploration goals is discussed. An evolutionary system is aimed at minimizing program costs while preserving programmatic versatility. Technical requirements that affect the design strategy for LTF include aerobraking technology and packaging constraints; mixed, unsymmetrical payload manifests; crew and payload exchange operations; crew and cargo off-loading on the lunar surface; and cryogenic lunar transfer and storage. It is concluded that the LTF is capable of meeting exploration goals, which include the provision for a significant early manned lunar surface science and exploration capability, the avoidance or reduction of some major operational and infrastructure requirements, and the incorporation of common vehicle designs and existing/near-term technology.

Capps, Stephen↗

Advanced Flip Chips in Extreme Temperature Environments

The use of underfill materials is necessary with flip-chip interconnect technology to redistribute stresses due to mismatching coefficients of thermal expansion (CTEs) between dissimilar materials in the overall assembly. Underfills are formulated using organic polymers and possibly inorganic filler materials. There are a few ways to apply the underfills with flip-chip technology. Traditional capillary-flow underfill materials now possess high flow speed and reduced time to cure, but they still require additional processing steps beyond the typical surface-mount technology (SMT) assembly process. Studies were conducted using underfills in a temperature range of -190 to 85 C, which resulted in an increase of reliability by one to two orders of magnitude. Thermal shock of the flip-chip test articles was designed to induce failures at the interconnect sites (-40 to 100 C). The study on the reliability of flip chips using underfills in the extreme temperature region is of significant value for space applications. This technology is considered as an enabling technology for future space missions. Flip-chip interconnect technology is an advanced electrical interconnection approach where the silicon die or chip is electrically connected, face down, to the substrate by reflowing solder bumps on area-array metallized terminals on the die to matching footprints of solder-wettable pads on the chosen substrate. This advanced flip-chip interconnect technology will significantly improve the performance of high-speed systems, productivity enhancement over manual wire bonding, self-alignment during die joining, low lead inductances, and reduced need for attachment of precious metals. The use of commercially developed no-flow fluxing underfills provides a means of reducing the processing steps employed in the traditional capillary flow methods to enhance SMT compatibility. Reliability of flip chips may be significantly increased by matching/tailoring the CTEs of the substrate material and the silicon die or chip, and also the underfill materials. Advanced packaging interconnects technology such as flip-chip interconnect test boards have been subjected to various extreme temperature ranges that cover military specifications and extreme Mars and asteroid environments. The eventual goal of each process step and the entire process is to produce components with 100 percent interconnect and satisfy the reliability requirements. Underfill materials, in general, may possibly meet demanding end use requirements such as low warpage, low stress, fine pitch, high reliability, and high adhesion.

Ramesham, Rajeshuni↗

Reliability Assessment of Advanced Flip-clip Interconnect Electronic Package Assemblies under Extreme Cold Temperatures (-190 and -120 C)

Flip-chip interconnect electronic package boards have been assembled, underfilled, non-destructively evaluated and subsequently subjected to extreme temperature thermal cycling to assess the reliability of this advanced packaging interconnect technology for future deep space, long-term, extreme temperature missions. In this very preliminary study, the employed temperature range covers military specifications (-55 C to 100 C), extreme cold Martian (-120 C to 115 C) and asteroid Nereus (-180 C to 25 C) environments. The resistance of daisy-chained, flip-chip interconnects were measured at room temperature and at various intervals as a function of extreme temperature thermal cycling. Electrical resistance measurements are reported and the tests to date have not shown significant change in resistance as a function of extreme temperature thermal cycling. However, the change in interconnect resistance becomes more noticeable with increasing number of thermal cycles. Further research work has been carried out to understand the reliability of flip-chip interconnect packages under extreme temperature applications (-190 C to 85 C) via continuously monitoring the daisy chain resistance. Adaptation of suitable diagnostic techniques to identify the failure mechanisms is in progress. This presentation will describe the experimental test results of flip-chip testing under extreme temperatures.

thermal cycling↗