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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records

Solenoid-Simulation Circuit

Electrical properties of solenoids imitated for tests of control circuits. Simulation circuit imitates voltage and current responses of two engine-controlling solenoids. Used in tests of programs of digital engine-control circuits, also provides electronic interface with circuits imitating electrical properties of pressure sensors and linear variable-differential transformers. Produces voltages, currents, delays, and discrete turnon and turnoff signals representing operation of solenoid in engine-control relay. Many such circuits used simulating overall engine circuitry.

Simon, R. A.↗

Incorporating ADAPT-VQE with a Sparse Wavefunction Circuit Simulator to Find Compact Quantum Circuits for Chemical Applications

We implemented the ADAPT-VQE algorithm into our recent classical sparse wavefunction circuit simulator to demonstrate that classical resources can (1) efficiently find a physically motivated compact wavefunction ansatz for further refinement on near-term quantum hardware and (2) benchmark expected results of VQE-based algorithms once the quantum hardware is available to study large-scale applications. In particular, we study the role of the ADAPT-VQE operator pool, molecular basis set selection, and variations such as TETRIS-ADAPT-VQE on the performance of our classical circuit simulator. This work demonstrates the promise of using classical resources to generate highly accurate wavefunctions that can be prepared on quantum hardware to initiate other quantum algorithms such as phase estimation. Our approach harnesses the power of high-performance computing resources with the more limited available quantum computers to map a path toward quantum advantage for electronic structure calculations in chemistry and materials science.

Quantum Computing↗

VLSI circuit simulation using a vector computer

Simulation of circuits having more than 2000 active devices requires the largest, fastest computers available. A vector computer, such as the CYBER 205, can yield great speed and cost advantages if efforts are made to adapt the simulation program to the strengths of the computer. ASPEC and SPICE (1), two widely used circuit simulation programs, are discussed. ASPECV and VAMOS (5) are respectively vector adaptations of these two simulators. They demonstrate the substantial performance enhancements possible for this class of algorithm on the CYBER 205.

Mcgrogan, S. K.↗

Deep quantum circuit simulations of low-energy nuclear states

Numerical simulation is an important method for verifying the quantum circuits used to simulate low-energy nuclear states. However, real-world applications of quantum computing for nuclear theory often generate deep quantum circuits that place demanding memory and processing requirements on conventional simulation methods. Here, we present advances in high-performance numerical simulations of deep quantum circuits to efficiently verify the accuracy of low-energy nuclear physics applications. Our approach employs novel methods for accelerating the numerical simulation including management of simulated mid-circuit measurements to verify projection based state preparation circuits. In this study, we test these methods across a variety of high-performance computing systems and our results show that circuits up to 21 qubits and more than 115,000,000 gates can be efficiently simulated.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

A study of ignition and simulation circuits for arcjet thrusters, part 1

A 1 kW electronic load was programmed to simulate the nonlinear i-v (volt-ampere) characteristics of an arcjet, both ignited and unignited. The simulator was tested and found to closely resemble an arcjet both for large transients and small perturbances up to about 40 kHz. No attempt was made to simulate the ignition process itself. The dynamic behavior of the arcjet (and the simulator) was shown to differ significantly from that of a resistor bank. Previous research led to the design and construction of a 1 kW arcjet power supply. A high voltage ignition circuit was added to this hardware, and tests on a 1 kW arcjet were performed at NASA-Lewis. All tests were successful and no ignition failures were observed. Circuit documentation and test results are included.

Stuart, Thomas A.↗

Method for Coupled Electromagnetic and Circuit Simulations to Evaluate Surge Arrester Performance in Protecting Equipment Against E1 HEMP

Surge arrester behavioral modeling for realistic systems embedded in an E1 high-altitude electromagnetic pulse environment inherently encompasses three interconnected complications: (1) the need to account for signal propagation across two domains, electromagnetics and electrical; (2) the need to include both linear and nonlinear circuit components in the analysis; and (3) the need to understand that the over-current and over-voltage mitigation performance is dependent not only on the properties of the surge arrester and protected load but also on the topology of the overall electrical network. This study presents a framework to address these challenges in a systematic manner to consider the effectiveness of protective measures for a common class of equipment in power generation facilities. Full-wave simulations were carried out to derive circuit-domain (i.e., lumped element–based) equivalent models for the excitation waveform and the physical components of the system. Then, these equivalent models were imported to a circuit solver and combined with a high-frequency surge arrester model to evaluate mitigation performance. The methodology outlined is general enough such that it can be applied for other electromagnetic interference problems that involve E2/E3 HEMP or microwave emissions.

42 ENGINEERING↗

Bipolar junction transistor models for circuit simulation of cosmic-ray-induced soft errors

This paper examines bipolar junction transistor models suitable for calculating the effects of large excursions of some of the variables determining the operation of a transistor. Both the Ebers-Moll and Gummel-Poon models are studied, and the junction and diffusion capacitances are evaluated on the basis of the latter model. The most interesting result of this analysis is that a bipolar junction transistor when struck by a cosmic particle may cause a single event upset in an electronic circuit if the transistor is operated at a low forward base-emitter bias.

Benumof, R.↗

Device model for FETSIM circuit simulation program

A description of the MOS transistor used in the FETSIM analysis program is presented. CMOS/SOS device parameters are included. Typical device mobilities are given as well as the empirically determined constants necessary to model second-order effect conductance variations due to gate voltage and saturated drain voltage.

Ramondetta, P.↗

Synthesizing efficient circuits for Hamiltonian simulation

Abstract We provide an approach for compiling quantum simulation circuits that appear in Trotter, qDRIFT and multi-product formulas to Clifford and non-Clifford operations that can reduce the number of non-Clifford operations. The total number of gates, especially CNOT, reduce in many cases. We show that it is possible to implement an exponentiated sum of commuting Paulis with at most m (controlled)-rotation gates, where m is the number of distinct non-zero eigenvalues (ignoring sign). Thus we can collect mutually commuting Hamiltonian terms into groups satisfying one of several symmetries identified in this work. This allows an inexpensive simulation of the entire group of terms. We further show that the cost can in some cases be reduced by partially allocating Hamiltonian terms to several groups and provide a polynomial time classical algorithm that can greedily allocate the terms to appropriate groupings.

Mukhopadhyay, Priyanka (ORCID:0000000164639100)↗

HQ-Sim: High-performance State Vector Simulation of Quantum Circuits on Heterogeneous HPC Systems

Quantum circuit simulations are applied in more and more circum- stances as the quantum computing community becomes broader. It helps researchers to evaluate quantum algorithms and relieve the burden of limited quantum computing resources. However, most of the state-of-the-art quantum simulators utilize either CPU or GPU to store and calculate the state vector, which results in resource starvation. Moreover, the maximum number of qubits supported by the simulator is bounded by the memory, since the memory utilization increases exponentially with the number of qubits. In this study, we leverage Heterogeneous computing to utilize both CPU and GPU to store and update state vectors. We also integrate lossy data compression to reduce memory requirements. Specifically, we develop a heterogeneous framework that has a dynamic scheduler to fully utilize the computing resources. We apply lossy compression to chunked state vector to make the maximum number of qubits higher than the regular simulators, the compression also benefits the data movement between CPU and GPU.

Zhang, Boyuan↗

Enabling Scalable VQE Simulation on Leading HPC Systems

Large-scale simulations of quantum circuits pose significant challenges, especially in the context of quantum chemistry, due to the number of qubits, circuit depth, and the number of circuits needed per problem. High-performance computing (HPC) systems offer massive computational capabilities that could help overcome these obstacles. We developed a high-performance quantum circuit simulator, called NWQ-Sim, and demonstrate its capability to simulate large quantum chemistry problems on NERSC's Perlmutter supercomputer. Integrating NWQ-Sim with XACC, we have executed QPE and VQE algorithms for downfolded quantum chemistry systems at unprecedented scales. Our work demonstrates the potential of leveraging HPC resources to advance quantum chemistry and other applications of near-term quantum devices.

Wang, Meng↗

Pressure-Transducer Simulator

Simulation circuit operates under remote, automatic, or manual control to produce electrical outputs similar to pressure transducer. Specific circuit designed for simulations of Space Shuttle main engine. General circuit concept adaptable to other simulation and control systems involving several operating modes. Switches and amplifiers respond to external control signals and panel control settings to vary differential excitation of resistive bridge. Output voltage or passive terminal resistance made to equal pressure transducer in any of four operating modes.

Simon, Richard A.↗

Integrated Circuit For Simulation Of Neural Network

Ballast resistors deposited on top of circuit structure. Cascadable, programmable binary connection matrix fabricated in VLSI form as basic building block for assembly of like units into content-addressable electronic memory matrices operating somewhat like networks of neurons. Connections formed during storage of data, and data recalled from memory by prompting matrix with approximate or partly erroneous signals. Redundancy in pattern of connections causes matrix to respond with correct stored data.

Thakoor, Anilkumar P.↗

The role of simulation in the design of a neural network chip

An iterative, simulation-based design procedure for a neural network chip is introduced. For this design procedure, the goal is to produce a chip layout for a neural network in which the weights are determined by transistor gate width-to-length ratios. In a given iteration, the current layout is simulated using the circuit simulator SPICE, and layout adjustments are made based on conventional gradient-decent methods. After the iteration converges, the chip is fabricated. Monte Carlo analysis is used to predict the effect of statistical fabrication process variations on the overall performance of the neural network chip.

Desai, Utpal↗

Xyce™ Parallel Electronic Simulator Users' Guide (V.7.9)

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: • Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. • A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. • Device models that are specifically tailored to meet Sandia’s needs, including some radiation-aware devices (for Sandia users only). • Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase — a message passing parallel implementation — which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

42 ENGINEERING↗

Xyce™ Parallel Electronic Simulator Users’ Guide, Version 7.10

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: • Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. • A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. • Device models that are specifically tailored to meet Sandia’s needs, including some radiation-aware devices (for Sandia users only). • Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase — a message passing parallel implementation — which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

97 MATHEMATICS AND COMPUTING↗

Xyce™ Parallel Electronic Simulator Users’ Guide, Version 7.8

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: (1) Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. (2) A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. (3) Device models that are specifically tailored to meet Sandia’s needs, including some radiation-aware devices (for Sandia users only). (4) Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase — a message passing parallel implementation — which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

42 ENGINEERING↗