Search NASA⌕ Search

SEARCH · Search NASA

Results for “Multilevel inverter”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Grid-tied Multilevel Inverter with Phase-locked Loop Algorithm

A multilevel inverter is an electronic device capable of changing direct current energy to alternant current energy with a voltage and frequency established by the user. They are ideal for connecting renewable energy sources to the AC grid, energy plants, and smart grids. The voltage must be balanced and synchronized with the electrical network for adequate performance. This paper shows the voltage synchronization between an inverter output voltage and the AC grid using a phase-locked loop based on an adaptive observer. The proposed algorithm can perform under grid uncertainties such as noise and generates a reference signal for the modulation used in the inverter. The algorithm is robust and computationally efficient and can be implemented through basic elements such as operational amplifiers, resistors, and capacitors, reducing its difficulty in executing it in a system.

42 ENGINEERING↗
DOE OSTI2024

Comprehensive AI-based System for Control, Sensor Estimation, and Fault Detection of Cascaded Multilevel Inverters

In this paper, an Artificial Intelligence-based (AI) system is proposed for an 11-level cascaded H-bridge multilevel inverter (MLI) with the aims of harmonic suppression and reliability enhancement. The system consists of three seamlessly integrated Neural Networks (NNs). First, a multilayer perceptron is used to generalize the optimal switching angles for selective harmonic elimination under non-equal DC voltages. Next, an autoencoder NN estimates the voltage sensor readings to address potential drifting. Finally, a perceptron NN detects inverter faults based solely on the output voltage of the MLI. Simulation scenarios were evaluated, and the results show that the proposed system provides a comprehensive solution for the robust operation of the MLI. The proposed solution is capable of minimizing the targeted harmonics orders with minimal impact on the fundamental voltage, even when the voltage sensor drifts. Furthermore, the inverter under fault conditions was successfully identified.

Rezende da Costa Reis Kimpara, Renata↗
DOE OSTI2022

Single DC Source Based Cascaded Multilevel Inverter

The objective of this project is to develop a high-efficiency solid-state transformer that converts a fixed DC voltage to a medium-voltage AC for utility distribution network connections without having the conventional low-frequency bulky transformers and switch gears. The initial target of 99% efficiency was achieved with the use of wide bandgap semiconductor devices using a proposal novel multilevel inverter. The medium-voltage was successfully tested at 7.2/12.47 kV phase/line voltage level for a 100-kW three-phase inverter.

14 SOLAR ENERGY↗
DOE OSTI2025

DC-Link Capacitor Design for a Neutral-Point-Less Three-Level Dual-Phase Inverter for Traction Application

Conventional multilevel inverters, such as neutral￾point-clamped and T-type inverters, have gained popularity in electric vehicle applications due to their advantages, including high voltage range, high power capability, low switching losses, low total harmonic distortion, and low electromagnetic interference. However, these traditional multilevel inverters require a neutral point connection to generate a zero-voltage vector. The neutral point current oscillates at three times the fundamental frequency, leading to voltage imbalance and overvoltage stress on the power modules. Additionally, the use of two stacked DC-link capacitors increases the volume required for the same overall capacitance and complicates packaging due to ripple current and heat dissipation from separate components. This is a significant concern for traction drive units, where space is limited. In this paper, a neutral-point-less multilevel dual three￾phase inverter topology is investigated for traction inverter applications. Simulation results demonstrate that the proposed topology effectively retains the benefits of multilevel operation while utilizing a single DC-link capacitor. The inverter model was simulated in conjunction with an industry-standard battery model to evaluate the potential for capacitor size reduction compared to a conventional three-level inverter.

33 ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2020

Enhanced Performance of Dual Inverter with a Floating Capacitor for Motor Drive Applications

This paper studies a dual inverter supplied by a DC-link and a floating capacitor (FC), emerged as a promising inverter topology for motor drive applications. For this type of inverter, the voltage ratio between the DC-link and the FC can be actively controlled. This ratio design is crucial as it essentially defines both the DC-link voltage utilization and the inverter output quality. Several voltage ratios have previously been discussed to enhance the dual inverter performance, but only one aspect, either the voltage utilization or the output quality, is investigated. As a result, although one performance aspect can be improved, the other aspect has been adversely affected. In this work, a comparative study considering both aspects is carried out for all the possible voltage ratios. Based on this analysis, the optimal ratios for different inverter modulation indices are identified. This is followed by proposing a ratio selection strategy to double the voltage utilization without degrading the output quality. Furthermore, this strategy enables an electric drive to work at a higher maximum speed without flux weakening for a given DC-link voltage. The claimed advantages have been proved by experimental tests on an open-end windings induction motor drive.

42 ENGINEERING↗
DOE OSTI2023

A Voltage Injection-Based Current Harmonics Suppression Strategy for Six-Phase PMSM With Nonsinusoidal Back EMF

This article presents a voltage injection-based current harmonic minimization method for wide bandgap device-based six-phase permanent magnet synchronous machine (PMSM) drives. The presence of low-order harmonics is common in the back EMF of PMSMs with low slot and high pole numbers. The back EMF harmonics generate low-order harmonic currents that increase torque ripples. Furthermore, zero-sequence current (ZSC) is also observed if all six phases are connected to a common neutral point. ZSC does not affect the torque ripple but reduces the system efficiency. A special technique is required to reduce ZSC for variable speed drives as direct ac component to synchronous reference frame (SRF) dc transformation is not possible for ZSC. In this article, a voltage injection-based current harmonics reduction method is proposed. The injected harmonic voltage coefficients are calculated from the harmonic estimations of back EMF and updated using closed-loop harmonic compensators to improve steady-state performance. For ZSC reduction, third harmonics power controller, and for 6n ± 1 (n = 1, 2,...) order harmonic current reduction, SRF current controllers are presented in this article. Furthermore, the current harmonics minimization method is experimentally verified using a GaN-based three-level active neutral point clamped inverter-driven six-phase PMSM.

42 ENGINEERING↗
DOE OSTI2023

A Six-Phase Space Vector PWM Technique for Wide Bandgap Device-Based Three-Level Inverters

This article presents a space vector pulsewidth modulation (SVPWM) technique for wide bandgap (WBG) device-based three-level (3L) six-phase inverters. Implementation of the SVPWM techniques for any six-phase inverter is complex for its high number of possible voltage vectors. Different six-phase load configurations are also possible depending on the angle between two consecutive phases and neutral point connections. The implementation techniques change depending on the load configuration. Moreover, a common neutral point for all six phases leads to circulating currents. Capacitor voltage balancing is also needed for 3L inverters. Capacitor voltage balancing and addressing the circulating current problem further increases the implementation complexity. In this article, a generalized SVPWM technique is proposed for the six-phase 3L inverters that is implementable using two three-phase 3L SVPWM blocks. The SVPWM technique also ensures dc bus capacitor voltage balancing and minimizes circulating current. Here, the SVPWM technique is experimentally verified using a GaN-based 3L six-phase active neutral point clamped (ANPC) inverter prototype, and the results are presented in this article.

42 ENGINEERING↗
DOE OSTI2024

Postfault Operation of Three-Level Inverter Driven Six-Phase PMSM With Enhanced Torque–Speed Region

This article presents an open-switch postfault operational technique with enhanced torque–speed region for three-level (3L) active neutral point clamped (ANPC) inverter-driven symmetrical six-phase (SSP) permanent magnet synchronous machines (PMSMs). Maximum torque (MT), minimum loss (ML), and single three-phase (STP) operations are commonly used for the postfault operations of six-phase drives. The maximum possible torque and speed in these operations are generally limited by voltage, current ratings, and the neutral point configuration of the motor. To enhance the postfault torque and speed operating region, the torque and speed limits in different postfault operational techniques are determined based on the voltage, current constraints, and neutral point configuration of the SSP-PMSM. In this work, a unified postfault operation is proposed that increases the postfault operational limits by combining MT, ML, and STP operations and modifying the neutral point configuration of the SSP-PMSM. In addition, a technique is also presented that modifies the pulsewidth modulation technique to enable full torque operation below 0.5 p.u. speed. The proposed postfault operational technique enables full-speed (1 p.u.) operation by operating in STP mode and full torque operation (1 p.u.) below 0.5 p.u. speed. Furthermore, the postfault operational technique is experimentally validated using a Gallium Nitride (GaN) device-based3L-ANPC inverter-driven SSP-PMSM.

42 ENGINEERING↗
DOE OSTI2022

Multilevel Switched-Capacitor AC–DC Step-Down Rectifier for Wireless Charging With Reduced Conduction Loss and Harmonic Content

In this paper, a wireless charging architecture employing a multilevel switched-capacitor (MSC) AC-DC rectifier is investigated. The proposed MSC rectifier features a multilevel design which is scalable to accommodate different power ratings and load ranges. The topology showcases advantages for wireless power transfer (WPT) systems in terms of compactness, efficiency, impedance tunability, and harmonic attenuation. The single-stage active topology is capable of varying its low-distortion staircase input voltage to tune the wireless power transfer system for high system-wide efficiency. A 7-level, 20 W prototype is used to verify the WPT loading and loss analysis. The prototype operates at 150 kHz with up to 3:1 step-down conversion ratio to an output voltage of 5.0 V. The experimental peak DC-to-DC efficiency is 93.8% and the rectifier peak efficiency is 98.3%. As a result. the rectifier demonstrates low waveform distortion and high efficiency across many WPT loading conditions, solidifying its place as a strong candidate for wireless power applications.

42 ENGINEERING↗
DOE OSTI2021

System and method for implementing a zero-sequence current filter for a three-phase power system

In a three-phase, four-wire electrical distribution system, a zig-zag transformer and at least one Cascade Multilevel Modular Inverter (CMMI) is coupled between the distribution system and the neutral. A controller modulates the states of the H-bridges in the CMMI to build an AC waveform. The voltage is chosen by the controller in order to control an equivalent impedance that draws an appropriate neutral current through the transformer. This neutral current is generally chosen to cancel the neutral current sensed in the line. The chosen neutral current may be based on a remotely sensed imbalance, rather than on a local value, determined by the power utility as a critical load point in the system. The desired injection current is then translated by the controller into a desired zero-sequence reactive impedance, based on measurement of the local terminal voltage, allowing the controller to regulate the current without generating or consuming real power.

Benavides, Nicholas↗
DOE OSTI2020

Soft-Switching Solid-State Transformer With Reduced Conduction Loss

Solid-state transformers (SSTs) are a promising solution photovoltaic (PV), wind, traction, data center, battery energy storage system (BESS), and fast charging electric vehicle (EV) applications. The traditional SSTs are typically three-stage, i.e., hard-switching cascaded multilevel rectifiers and inverters with dual active bridge (DAB) converters, which leads to bulky passives, low efficiency, and high electromagnetic interference (EMI). This article proposes a new soft-switching solid-state transformer (S4T). The S4T has full-range zero-voltage switching (ZVS), electrolytic capacitor-less dc link, and controlled dv/dt, which reduces EMI. The S4T comprises two reverse-blocking current-source inverter (CSI) bridges, auxiliary branches for ZVS, and transformer magnetizing inductor as a reduced dc link with 60% ripple. Compared with the prior S4T, an effective change on the leakage inductance diode is made to reduce the number of the devices on the main power path by 20% for significant conduction loss saving and retain the same functionality of damping the resonance between the leakage and resonant capacitors and recycling trapped leakage energy. The conduction loss saving is crucial, being the dominating loss mechanism in SSTs. Importantly, the proposed single-stage SST not only holds the potential for high power density and high efficiency but also has full functionality, e.g., multiport dc loads integration, voltage regulation, and reactive power compensation, unlike the traditional single-stage matrix SST. The S4T can achieve single-stage isolated bidirectional dc–dc, ac–dc, dc–ac, or ac–ac conversion. It can also be configured input-series output-parallel (ISOP) in a modular way for medium-voltage (MV) grids. Hence, the S4T is a promising candidate for the SST. The full functionality, e.g., voltage buck–boost, multiport, etc., and the universality of the S4T for the dc–dc, dc–ac, and ac–ac conversion are verified through the simulations and experiments of two-port and three-port MV prototypes based on 3.3 kV SiC MOSFETs in dc–dc, dc–ac, and ac–ac modes at 2 kV.

14 SOLAR ENERGY↗
DOE OSTI2022

Control and Grid Support Function Evaluation for a Three-Phase Back-to-Back Modular Multilevel Converter System

This paper focuses on the evaluation of advanced inverter controls for a 500kW back-to-back (B2B), silicon carbide, multilevel modular converter (MMC) used as a direct-connected medium-voltage grid intertie. A decentralized hierarchical controller architecture for the MMC system is presented, which uses the main controller to implement higher level grid interconnection functions per the IEEE 1547–2018 standards and the local controllers to execute lower level closed-loop functionality of the MMC stages. This paper presents and elaborates on the grid functionalities are elaborated and presented. The back-to-back converter system is equipped with local controllers and their corresponding functionalities are presented. Case study results for the corresponding functionalities presented show the effectiveness of the proposed architecture. To enhance the operation capabilities of the system, a parameter update scheme has been implemented and utilized in unison with the controller.

decentralized control↗
DOE OSTI2026

World’s First Vertical GaN based High Power (200 kW) Multi-level Traction Electric Drive Design

Vertical GaN (vGaN) technology leverages a fully conductive 3D semiconductor structure, enabling superior power density compared to GaN-on-Si and other wide bandgap devices. It offers a pathway to surpass cost and efficiency limitations of Si and SiC devices in traction applications. However, scaling for high-voltage, high-power systems remains challenging. This paper presents the design of an 800V, 200kW traction inverter utilizing vertical GaN devices. The inverter achieves ultra-high efficiency (> 99.5%) through advanced power module integration and employs multilevel neutral-point-less X-type (NPL.X) inverter topology to ensure optimal traction drive system performance. These innovations demonstrate the potential of vGaN for next￾generation electric propulsion systems.

Alam, Khorshed [General Motors LLC, Detroit, MI (U↗
DOE OSTI2024

Multilevel Cybersecurity for Photovoltaic Systems

The motivation behind this project is to protect critical infrastructure in electric power generation pertaining to solar photovoltaic (PV) systems. This growing renewable energy resource is becoming a more vital part of the nation’s energy portfolio, particularly since it has achieved grid-parity to existing generation methods in terms of cost. It is thus vital that steps be taken to ensure the cybersecurity of these assets. The project goal was to devise a multilevel cybersecurity solution to address PV security gaps at the inverter and system levels, and field test the solution under the supervision and review of a US-based solar inverter manufacturer and PV installer/operator. A two-level cyberattack defense approach was formulated whereby the first level, the solar inverter level, hardens individual devices and achieves a deeply cyber-secure inverter. The inverter level security involves a multi-layer defense-in-depth approach for securing the inverter while also providing data for the system level algorithms. The second level, the system level, addresses intrusion detection and restoration involving an ensemble of inverters and relevant systems.

14 SOLAR ENERGY↗