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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS1998

Non-Micropipe Dislocations in 4H-SiC Devices: Electrical Properties and Device Technology Implications

It is well-known that SiC wafer quality deficiencies are delaying the realization of outstandingly superior 4H-SiC power electronics. While efforts to date have centered on eradicating micropipes (i.e., hollow core super-screw dislocations with Burgers vectors greater than or equal to 2c), 4H-SiC wafers and epilayers also contain elementary screw dislocations (i.e., Burgers vector = 1c with no hollow core) in densities on the order of thousands per sq cm, nearly 100-fold micropipe densities. While not nearly as detrimental to SiC device performance as micropipes, it has recently been demonstrated that elementary screw dislocations somewhat degrade the reverse leakage and breakdown properties of 4H-SiC p(+)n diodes. Diodes containing elementary screw dislocations exhibited a 5% to 35% reduction in breakdown voltage, higher pre-breakdown reverse leakage current, softer reverse breakdown I-V knee, and microplasmic breakdown current filaments that were non-catastrophic as measured under high series resistance biasing. This paper details continuing experimental and theoretical investigations into the electrical properties of 4H-SiC elementary screw dislocations. The nonuniform breakdown behavior of 4H-SiC p'n junctions containing elementary screw dislocations exhibits interesting physical parallels with nonuniform breakdown phenomena previously observed in other semiconductor materials. Based upon experimentally observed dislocation-assisted breakdown, a re-assessment of well-known physical models relating power device reliability to junction breakdown has been undertaken for 4H-SiC. The potential impact of these elementary screw dislocation defects on the performance and reliability of various 4H-SiC device technologies being developed for high-power applications will be discussed.

Neudeck, Philip G.↗
NASA NTRS2005

Improved Method of Manufacturing SiC Devices

The phrase, "common-layered architecture for semiconductor silicon carbide" ("CLASSiC") denotes a method of batch fabrication of microelectromechanical and semiconductor devices from bulk silicon carbide. CLASSiC is the latest in a series of related methods developed in recent years in continuing efforts to standardize SiC-fabrication processes. CLASSiC encompasses both institutional and technological innovations that can be exploited separately or in combination to make the manufacture of SiC devices more economical. Examples of such devices are piezoresistive pressure sensors, strain gauges, vibration sensors, and turbulence-intensity sensors for use in harsh environments (e.g., high-temperature, high-pressure, corrosive atmospheres). The institutional innovation is to manufacture devices for different customers (individuals, companies, and/or other entities) simultaneously in the same batch. This innovation is based on utilization of the capability for fabrication, on the same substrate, of multiple SiC devices having different functionalities (see figure). Multiple customers can purchase shares of the area on the same substrate, each customer s share being apportioned according to the customer s production-volume requirement. This makes it possible for multiple customers to share costs in a common foundry, so that the capital equipment cost per customer in the inherently low-volume SiC-product market can be reduced significantly. One of the technological innovations is a five-mask process that is based on an established set of process design rules. The rules provide for standardization of the fabrication process, yet are flexible enough to enable multiple customers to lay out masks for their portions of the SiC substrate to provide for simultaneous batch fabrication of their various devices. In a related prior method, denoted multi-user fabrication in silicon carbide (MUSiC), the fabrication process is based largely on surface micromachining of poly SiC. However, in MUSiC one cannot exploit the superior sensing, thermomechanical, and electrical properties of single-crystal 6H-SiC or 4H-SiC. As a complement to MUSiC, the CLASSiC five-mask process can be utilized to fabricate multiple devices in bulk single-crystal SiC of any polytype. The five-mask process makes fabrication less complex because it eliminates the need for large-area deposition and removal of sacrificial material. Other innovations in CLASSiC pertain to selective etching of indium tin oxide and aluminum in connection with multilayer metallization. One major characteristic of bulk micromachined microelectromechanical devices is the presence of three-dimensional (3D) structures. Any 3D recesses that already exist at a given step in a fabrication process usually make it difficult to apply a planar coat of photoresist for metallization and other subsequent process steps. To overcome this difficulty, the CLASSiC process includes a reversal of part of the conventional flow: Metallization is performed before the recesses are etched.

Okojie, Robert S.↗
NASA NTRS1995

Photoconductive and photovoltaic response of high-dark-resistivity 6H-SiC devices

The optoelectronic properties of high-resistivity p-type hexagonal silicon carbide (6H-SiC) have been investigated using lateral photoconductive switches. Both photovoltaic and photoconductive effects are reported, measured at 337 nm, which is above the 6H-SiC absorption edge. These photoconductive switches have been fabricated with dark resistances of up to 1 M omega; photoconductive switching efficiencies of more than 80% have been achieved. In addition, these devices displayed a high-speed photovoltaic response to nanosecond laser excitations in the ultraviolet spectral region; in particular, the observed photovoltaic response pulse width can be shorter than the exciting laser pulse width. This subnanosecond photovoltaic response has been modeled and good qualitative agreement with experiment has been obtained.

Cho, Pak S.↗
NASA NTRS1992

SiC device development for high temperature sensor applications

Progress made in the processing and characterization of 3C-SiC for high temperature sensor applications is reviewed. Piezoresistance properties of silicon carbide and the temperature coefficient of resistivity of n-type beta-SiC are presented. In addition, photoelectrical etching and dopant selective etch-stops in SiC and high temperature Ohmic contacts for n-type beta-SiC sensors are discussed.

Shor, J. S.↗
NASA NTRS2017

Taking SiC Power Devices to the Final Frontier: Addressing Challenges of the Space Radiation Environment

Silicon carbide power device technology has the potential to enable a new generation of aerospace power systems that demand high efficiency, rapid switching, and reduced mass and volume in order to expand space-based capabilities. For this potential to be realized, SiC devices must be capable of withstanding the harsh space radiation environment. Commercial SiC components exhibit high tolerance to total ionizing dose but to date, have not performed well under exposure to heavy ion radiation representative of the on-orbit galactic cosmic rays. Insertion of SiC power device technology into space applications to achieve breakthrough performance gains will require intentional development of components hardened to the effects of these highly-energetic heavy ions. This work presents heavy-ion test data obtained by the authors over the past several years for discrete SiC power MOSFETs, JFETs, and diodes in order to increase the body of knowledge and understanding that will facilitate hardening of this technology to space radiation effects. Specifically, heavy-ion irradiation data taken under different bias, temperature, and ion beam conditions is presented for devices from different manufacturers, and the emerging patterns discussed.

Power semiconductor devices↗
NASA NTRS2004

Measurement of Thin Film Integrated Passive Devices on SiC through 500 C

Wireless communication in jet engines and high temperature industrial applications requires FD integrated circuits (RFICs) on wide bandgap semiconductors such as Silicon Carbide (SiC). In this paper, thin-film NiCr resistors, MIM capacitors, and spiral inductors are fabricated on a high purity semi-insulating 4H-SiC substrate. The devices are experimentally characterized through 50 GHz at temperatures of up to 500 C and the equivalent circuits are deembedded from the measured data. It is shown that the NiCr resistors are stable within 10% to 300 C while the capacitors have a value stable within 10% through 500 C.

Schwartz, Zachary D.↗
NASA NTRS2019

Gate Drive Technology Evaluation and Development to Maximize Switching Speed of SiC Discrete Devices and Power Modules in Hard Switching Applications

To understand the limitation of maximizing the switching speed of SiC low current discrete devices and high current power modules in hard switching applications, double pulse tests are conducted and the testing results are analyzed. For power modules, the switching speed is generally limited by the parasitics rather than the gate drive capability. For the discrete SiC device, the conventional voltage source gate drive (VSG) is not sufficient to maximize the switching speed even if the external gate resistance is minimized. The limitation of existing current source gate drives (CSG) are analyzed, and a CSG dedicated for SiC discrete devices is proposed, which can provide constant current during the switching transient regardless of the high Miller voltage and large internal gate resistance. Compared with the conventional VSG, the proposed CSG achieves 67% faster turnon time and 50% turn-off time, and 68% reduction in switching loss at full load condition.

Handong Gui↗
NASA NTRSDate not supplied

Space Radiation Effects on SiC Power Device Reliability

Heavy-ion radiation can result in silicon carbide power device degradation and/or catastrophic failure. Test procedures and data interpretation must consider the impact that heavy-ion induced off-state leakage current increases will have on subsequent single-event effect susceptibility and testability. On orbit, reliable performance in the presence of increased off-state leakage currents due to cumulative ion-induced non-catastrophic single-event effects must be assured over the mission lifetime. This work presents a large body of heavy-ion test data for different diode, power MOSFET, and JFET devices. Susceptibility to single-event effects is compared between SiC and Si power devices. Initial recommendations on heavy-ion radiation test methods for silicon carbide power devices are made and radiation hardness assurance is discussed with the goal of moving one step closer to reliably getting this technology off the ground into a broad array of spacecraft and instruments that will benefit from its unique capabilities.

diode↗
NASA NTRSDate not supplied

Scalar Atomic Defect-Based Solid-State Self-calibrating Magnetometer (3SM) for Space Plasma Analysis

The Earth’s magnetosphere is a system of multiple, co-located particle populations interacting via plasma waves. Things to understand are driving processes, radiation belt and ring current issues, auroral physics, internal plasma processes, and magnetosphere-ionosphere mapping issues. These plasma-physics processes enable the Earth’s magnetosphere to evolve in response to temporal changes in the solar wind and they underlie the phenomena of space weather, which impacts spacecraft systems, astronauts, radio communications, and ground based electric-power grids. The objective of 3SM is to measure magnetic field strength and to calibrate the Vector Magnetometer (VM) device to maintain absolute accuracy during a mission. The 3SM features make the instrument preferably suited not only for the traditional role of scalar magnetometers as absolute references for the calibration of the on-board vector instruments, but also for extended operational capacities, such as higher frequency scalar measurements (of potential interest for magnetosphere studies for the low frequency part of the spectrum) or autonomous scalar / vector operations. Diamond has been the solid-state platform of choice for quantum device technologies for some time, however, it suffers from difficulties such as scalability, integration, and cost. While the diamond platform is very useful for quantum technologies, further development is needed to make it viable. The material platform of choice for NASA Glenn’s Quantum Sensing And Spin Physics (Q-SASP) is silicon carbide (SiC). This is due to the much higher industry development of the SiC material platform for high-power and high-temperature electronics. It leverages both the decades-long SiC development expertise and infrastructure at NASA Glenn and its growing capabilities in quantum metrology. To make SiC devices usable for quantum technologies such as quantum sources, a much deeper understanding of defects is needed. Q-SASP is developing quantum metrology capabilities to evaluate the energy structure, defect formation energy, band structure augmentation, generation/recombination rates, and limits of dipole-dipole coupling in non-metal implanted SiC devices. This can be achieved by analysis of zero-field splitting, low-field resonance, and singlet-triplet mixing through various forms of Electrically Detectable Magnetic Resonance (EDMR) and Near-Zero Field Magnetic Resonance (NZFMR) spectroscopy. This work will discuss recent system developments, device developments, computational modeling, and spectroscopy results and analysis of defects created by non-metal implantations in SiC devices. The defect formation energies of V Si ,V C , V C V Si , N C V Si , N Si , N C in 4H-SiC are previously reported values in other research [2]-[3]. The defect formation energies of PSi and PC were calculated in GPAW [fig 1A]. The basic underlying mechanism of the zero-field phenomenon is the mixing of singlet and triplet states [4]-[5]. In most spin-dependent transport, two electron spins are involved, and thus one must consider each of their interactions with the field. We investigated the electronic and magnetic properties of 4H-SiC and 6H-SiC. The defect formation energy helps us determine what types of defects we are observing in the SiC EDMR experiment. They have very low formation energy (it is negative). The phosphorus substitution in 4H-SiC is a very stable defect. The band diagrams provide us with vital information about how the electronic properties of SiC (such as band gap) change as we add non-metal defects. The zero-field splitting parameters allow us to study the inflection point in the NZFMR [fig 1B]. We clearly observed zero-field splitting. We also noted that the zero-field splitting remained constant with changing bias. We aspect it zero-field splitting to remain constant while the hyperfine and exchange interaction perturbations shift under the influence of an external magnetic field. This is the essence of quantum magnetometry and self-calibration.

space plasma↗
NASA NTRS1994

Porous silicon carbide (SiC) semiconductor device

A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.

Shor, Joseph S.↗
NASA NTRS2004

LERCIP 2004 Summary

This summer I am continuing my project from the previous two summers. My work involves ohmic contacts to N-type silicon carbide (Sic) devices. My mentor, Dr. Robert Okojie, is developing the technology behind high performance sensors and actuators for harsh environments. Sic is useful because it is able to operate at temperatures up to 600 C and it is resistant to radiation damage. This allows sensors and electronics to be placed in new locations, such as inside a jet engine or in space application without using heavy shielding. Ultimately this results in more efficient, smarter engine technology, reduced launch weights for spacecraft, and high power and high temperature electronics. A fundamental part of Sic devices is the ohmic contact. The contact is the interface between the semiconductor (Sic) and external circuitry. The current flowing in and out the devices is through the contact. Ensuring that these contacts remain ohmic (linear I-V behavior) allows us to fabricate devices that do not waste power at the metallurgical junction. Another key part is maintaining a low contact resistance. It is desired to maintain minimum energy loss by avoiding a rectifying electrical characteristic. My project is to develop and implement a testing procedure for measuring the contact resistance while the device is operating at high temperature. It is important to measure the contacts while simulating the true operating environment as closely as possible. For this reason, measurements are taken while the device is heated at intervals up to 600 C in air. To test the long tern reliability of the devices, the high temperature measurements are repeated after heating the sample for long intervals in air. A new set of data is gathered after heating for a total of 100, 200 and then 400 hours. The current as a function of voltage and the contact resistance was measured using the four point probe technique. The four point probe method is chosen because it measures contact resistance while eliminating error due to wire resistance and calibration issues.

DeAngelis, David↗
NASA NTRS2001

Electro-Thermal Simulation Studies of SiC Junction Diodes Containing Screw Dislocations Under High Reverse-Bias Operation

The objective of this work was to conduct a modeling study of SiC P-N junction diodes operating under high reverse biased conditions. Analytical models and numerical simulation capabilities were to be developed for self-consistent electro-thermal analysis of the diode current-voltage (I-V) characteristics. Data from GRC indicate that screw dislocations are unavoidable in large area SiC devices, and lead to changes in the SiC diode electrical response characteristics under high field conditions. For example, device instability and failures linked to internal current filamentation have been observed. The physical origin of these processes is not well understood, and quantitative projections of the electrical behavior under high field and temperature conditions are lacking. Thermal calculations for SiC devices have not been reported in the literature either. So estimates or projections of peak device temperatures and power limitations do not exist. This numerical study and simulation analysis was aimed at resolving some of the above issues. The following tasks were successfully accomplished: (1) Development of physically based models using one- and two-dimensional drift-diffusion theory for the transport behavior and I-V characteristics; (2) One- and two-dimensional heat flow to account for internal device heating. This led to calculations of the internal temperature profiles, which in turn, were used to update the electrical transport parameters for a self-consistent analysis. The temperature profiles and the peak values were thus obtainable for a given device operating condition; (3) Inclusion of traps assumed to model the presence of internal screw dislocations running along the longitudinal direction; (4) Predictions of the operating characteristics with and without heating as a function of applied bias with and without traps. Both one and two-dimensional cases were implemented; (5) Assessment of device stability based on the operating characteristics. The presence of internal non-uniformities, particularly filamentary structures, was probed and demonstrated; (6) Cause and physical origins of filamentary behavior and unstable I-V characteristics were made transparent; (7) It was demonstrated that diodes containing defects would be more prone to thermal breakdown associated with the temperature dependent decrease in the thermal conductivity; and (8) Finally, negative differential resistance (S-shaped NDR) which can potential lead to device instability and filamentary behavior was shown to occur for diodes containing a line of defects such as could be associated with a screw dislocation line.

Joshi, R. P.↗
NASA NTRS1989

Microwave and millimeter-wave power generation in silicon carbide (SiC) IMPATT devices

There are two points that should be noted. First, in the thermal resistance calculations it is assumed that the device is operating at 773 K while the results of the room temperature simulations are used. This was done because there is not enough information to correctly predict the material parameters at 773 K. Since, in general, device performance degrades with increasing temperature, the cw results are perhaps a bit optimistic. Second, the electric field in these structures gets extremely high and there might be some possibility of tunneling. This was not incorporated into the simulation. Again, this could result in different device operating conditions.

Mehdi, I.↗
NASA NTRS1996

Porous silicon carbide (SIC) semiconductor device

Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

Shor, Joseph S.↗
NASA NTRS2003

Step Free Surface Heteroepitaxy of 3C-SiC Layers on Patterned 4H/6H-SiC Mesas and Cantilevers

Most SiC devices are implemented in homoepitaxial films grown on 4H/6H-SiC wafers with surfaces 3 degrees to 8 degrees off-axis from the (0001) basal plane. This approach has not prevented many substrate crystal defects from propagating into SiC epilayers, and does not permit the realization of SiC heteropolytype devices. This presentation describes recent advances in SiC epitaxial growth that begun to overcome the above shortcomings for arrays of mesas patterned into on-axis 4H/6H-SiC wafers. First, we demonstrated that atomic-scale surface steps can be completely eliminated from 4H/6H-SiC mesas via on-axis homoepitaxial step-flow growth, forming (0001) basal plane surfaces (up to 0.4 mm x 0.4 mm) for larger than previously thought possible. Step-free surface areas were then extended by growth fo thin lateral cantilevers from the mesa tops. These lateral cantilevers enabled substrate defects to be reduced and relocated in homoepitaxial films in a manner not possible with off-axis SiC growth. Finally, growth of vastly improved 3C-SiC heterofilms was achieved on 4H/6H-SiC mesas using the recently develop step-free surface heteroepitaxy process. These epitaxial growth developments should enable improved homojunction and heterojunction silicon carbide prototype devices.

Neudeck, Philip G.↗