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IrSn crystallizes in the hexagonal P6_3/mmc space group. The structure is three-dimensional. Ir is bonded to six equivalent Sn atoms to form a mixture of distorted edge, face, and corner-sharing IrSn6 octahedra. The corner-sharing octahedral tilt angles are 51°. All Ir–Sn bond lengths are 2.73 Å. Sn is bonded in a 6-coordinate geometry to six equivalent Ir atoms.
Ce(IrSn)2 crystallizes in the tetragonal P4/nmm space group. The structure is three-dimensional. Ce is bonded in a 12-coordinate geometry to eight Ir and eight Sn atoms. There are four shorter (3.40 Å) and four longer (3.50 Å) Ce–Ir bond lengths. There are four shorter (3.38 Å) and four longer (3.56 Å) Ce–Sn bond lengths. There are two inequivalent Ir sites. In the first Ir site, Ir is bonded in a 9-coordinate geometry to four equivalent Ce and five Sn atoms. There are one shorter (2.59 Å) and four longer (2.66 Å) Ir–Sn bond lengths. In the second Ir site, Ir is bonded to four equivalent Ce and four equivalent Sn atoms to form distorted IrCe4Sn4 tetrahedra that share corners with twelve equivalent SnCe4Ir4 tetrahedra, edges with two equivalent SnCe4Ir4 tetrahedra, edges with four equivalent IrCe4Sn4 tetrahedra, and faces with four equivalent IrCe4Sn4 tetrahedra. All Ir–Sn bond lengths are 2.64 Å. There are two inequivalent Sn sites. In the first Sn site, Sn is bonded in a 9-coordinate geometry to four equivalent Ce and five Ir atoms. In the second Sn site, Sn is bonded to four equivalent Ce and four equivalent Ir atoms to form distorted SnCe4Ir4 tetrahedra that share corners with twelve equivalent IrCe4Sn4 tetrahedra, edges with two equivalent IrCe4Sn4 tetrahedra, edges with four equivalent SnCe4Ir4 tetrahedra, and faces with four equivalent SnCe4Ir4 tetrahedra.
Sr3(IrSn)4 crystallizes in the cubic I-43m space group. The structure is three-dimensional. Sr is bonded in a 12-coordinate geometry to four equivalent Ir and four equivalent Sn atoms. All Sr–Ir bond lengths are 3.39 Å. All Sr–Sn bond lengths are 3.36 Å. Ir is bonded in a 4-coordinate geometry to three equivalent Sr, three equivalent Ir, and four equivalent Sn atoms. All Ir–Ir bond lengths are 2.88 Å. There are one shorter (2.58 Å) and three longer (2.72 Å) Ir–Sn bond lengths. Sn is bonded in a 7-coordinate geometry to three equivalent Sr and four equivalent Ir atoms.
Li-oxygen (Li-O 2 ) batteries can potentially provide much higher energy density than Li-ion batteries; however, the practical application of these batteries is hindered due to several drawbacks such as low current rates and high overpotential for the charging process. Here, in this paper, we report a novel Li-Air battery system that operates under high current rates (up to 1mAcm -2 ) with LiO 2 as the primary discharge product instead of the commonly reported Li 2 O 2 . This LiO 2 based battery at high rates is through a combination of an as-synthesized new one-dimensional (1D) transition metal trichalcogenide mid-entropy alloy of SnIrS 3.6 as a cathode catalyst and an electrolyte blend with a SnI 2 bi-functional additive. It is revealed that SnIrS 3.6 has a microporous structure composed of six- and five-coordinated metal atoms, forming octahedral and triangular bipyramids which has not been observed in other layered chalcogeide materials. DFT calculations reveal that the SnIrS 3.6 structure can result in LiO 2 formation through di-iridium sulfur bridge active sites that results in strong binding of O 2 and LiO 2 preventing disproportionation to Li 2 O 2 and enabling high rates. This finding will open a new perspective in designing advanced LiO 2 -based Li-O 2 batteries for real practices.
A new adaptive antenna array architecture for low-earth-orbiting satellite ground stations is being investigated. These ground stations are intended to have no moving parts and could potentially be operated in populated areas, where terrestrial interference is likely. The architecture includes multiple, moderately directive phased arrays. The phased arrays, each steered in the approximate direction of the satellite, are adaptively combined to enhance the Signal-to-Noise and Interference-Ratio (SNIR) of the desired satellite. The size of each phased array is to be traded-off with the number of phased arrays, to optimize cost, while meeting a bit-error-rate threshold. Also, two phased array architectures are being prototyped: a spacefed lens array and a reflect-array. If two co-channel satellites are in the field of view of the phased arrays, then multi-user detection techniques may enable simultaneous demodulation of the satellite signals, also known as Space Division Multiple Access (SDMA). We report on Phase I of the project, in which fixed directional elements are adaptively combined in a prototype to demodulate the S-band downlink of the EO-1 satellite, which is part of the New Millennium Program at NASA.
We investigate the effects of quenched randomness on topological quantum phase transitions in strongly interacting two-dimensional systems. We focus first on transitions driven by the condensation of a subset of fractionalized quasiparticles (“anyons”) identified with “electric charge” excitations of a phase with intrinsic topological order. All other anyons have nontrivial mutual statistics with the condensed subset and hence become confined at the anyon condensation transition. Furthermore, using a combination of microscopically exact duality transformations and asymptotically exact real-space renormalization group techniques applied to these two-dimensional disordered gauge theories, we argue that the resulting critical scaling behavior is “superuniversal” across a wide range of such condensation transitions and is controlled by the same infinite-randomness fixed point as that of the 2D random transverse-field Ising model. We validate this claim using large-scale quantum Monte Carlo simulations that allow us to extract zero-temperature critical exponents and correlation functions in (2+1)D disordered interacting systems. We discuss generalizations of these results to a large class of ground-state and excited-state topological transitions in systems with intrinsic topological order as well as those where topological order is either protected or enriched by global symmetries. When the underlying topological order and the symmetry group are Abelian, our results provide prototypes for topological phase transitions between distinct many-body localized phases.
Using quantum Monte Carlo simulations, we map out the phase diagram of Hamiltonians interpolating between trivial and nontrivial bosonic symmetry-protected topological phases, protected by Z 2 and Z 2 3 symmetries, in two dimensions. In all cases, we find that the trivial and the topological phases are separated by an intermediate phase in which the protecting symmetry is spontaneously broken. Depending on the model, we identify a variety of magnetic orders on the triangular lattice, including ferromagnetism, 3 × 3 order, and stripe orders (both commensurate and incommensurate). Critical properties are determined through a finite-size scaling analysis. Possible scenarios regarding the nature of the phase transitions are discussed.
Expanding and improving the repertoire of numerical methods for studying quantum lattice models is an ongoing focus in many-body physics. While the density matrix renormalization group (DMRG) has been established as a practically useful algorithm for finding the ground state in one-dimensional systems, a provably efficient and accurate algorithm remained elusive until the introduction of the rigorous renormalization group (RRG) by Landau [Nat. Phys. 11, 566 (2015)1745-247310.1038/nphys3345]. In this paper, we study the accuracy and performance of a numerical implementation of RRG at first-order phase transitions and in symmetry-protected topological phases. Our study is motivated by the question of when RRG might provide a useful complement to the more established DMRG technique. In particular, despite its general utility, DMRG can give unreliable results near first-order phase transitions and in topological phases, since its local update procedure can fail to adequately explore (near-)degenerate manifolds. Furthermore, the rigorous theoretical underpinnings of RRG, meanwhile, suggest that it should not suffer from the same difficulties. We show this optimism is justified, and that RRG indeed determines well-ordered, accurate energies even when DMRG does not. Moreover, our performance analysis indicates that in certain circumstances seeding DMRG with states determined by coarse runs of RRG may provide an advantage over simply performing DMRG.
Building on quantum Monte Carlo simulations, we study the phase diagram of a one-parameter Hamiltonian interpolating between trivial and topological Ising paramagnets in two dimensions, which are dual to the toric code and the double semion. We discover an intermediate phase with stripe order which spontaneously breaks the protecting Ising symmetry. Remarkably, we find evidence that this intervening phase is gapless due to the incommensurability of the stripe pattern and that it is dual to a $U(1)$ gauge theory exhibiting Cantor deconfinement.
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The semantics of HPC storage systems are defined by the consistency models to which they abide. Storage consistency models have been less studied than their counterparts in memory systems, with the exception of the POSIX standard and its strict consistency model. The use of POSIX consistency imposes a performance penalty that becomes more significant as the scale of parallel file systems increases and the access time to storage devices, such as node-local solid storage devices, decreases. While some efforts have been made to adopt relaxed storage consistency models, these models are often defined informally and ambiguously as by-products of a particular implementation. Here in this work, we establish a connection between memory consistency models and storage consistency models and revisit the key design choices of storage consistency models from a high-level perspective. Further, we propose a formal and unified framework for defining storage consistency models and a layered implementation that can be used to easily evaluate their relative performance for different I/O workloads. Finally, we conduct a comprehensive performance comparison of two relaxed consistency models on a range of commonly seen parallel I/O workloads, such as checkpoint/restart of scientific applications and random reads of deep learning applications. We demonstrate that for certain I/O scenarios, a weaker consistency model can significantly improve the I/O performance. For instance, in small random reads that are typically found in deep learning applications, session consistency achieved a 5x improvement in I/O bandwidth compared to commit consistency, even at small scales.
The advent of exascale supercomputers heralds a new era of scientific discovery, yet it introduces significant architectural challenges that must be overcome for MPI applications to fully exploit its potential. Among these challenges is the adoption of heterogeneous architectures, particularly the integration of GPUs to accelerate computation. Additionally, the complexity of multithreaded programming models has also become a critical factor in achieving performance at scale. The efficient utilization of hardware acceleration for communication, provided by modern NICs, is also essential for achieving low latency and high throughput communication in such complex systems. In response to these challenges, the MPICH library, a high-performance and widely used Message Passing Interface (MPI) implementation, has undergone significant enhancements. Here, this paper presents four major contributions that prepare MPICH for the exascale transition. First, we describe a lightweight communication stack that leverages the advanced features of modern NICs to maximize hardware acceleration. Second, our work showcases a highly scalable multithreaded communication model that addresses the complexities of concurrent environments. Third, we introduce GPU-aware communication capabilities that optimize data movement in GPU-integrated systems. Finally, we present a new datatype engine aimed at accelerating the use of MPI derived datatypes on GPUs. These improvements in the MPICH library not only address the immediate needs of exascale computing architectures but also set a foundation for exploiting future innovations in high-performance computing. By embracing these new designs and approaches, MPICH-derived libraries from HPE Cray and Intel were able to achieve real exascale performance on OLCF Frontier and ALCF Aurora respectively.
The dataset comprises trace files from high performance computing (HPC) simulations. The trace files contain records of every I/O operation executed by a simulation application run, including I/O operations from HDF5, MPI-IO, and POSIX and all of the parameters supplied to those operations, e.g. file name, offset, and flags. The traces are generated by executing a simulation application that is linked with the Recorder tracing tool (https://github.com/uiuc-hpc/Recorder). The Recorder trace tool intercepts the I/O calls made by the application, records the I/O trace record, and then calls the intended I/O call so that the operation executes.
Thanks to MPI [9], writing portable message passing parallel programs is almost a reality. One of the remaining problems is file I/0. Although parallel file systems support similar interfaces, the lack of a standard makes developing a truly portable program impossible. Further, the closest thing to a standard, the UNIX file interface, is ill-suited to parallel computing. Working together, IBM Research and NASA Ames have drafted MPI-I0, a proposal to address the portable parallel I/0 problem. In a nutshell, this proposal is based on the idea that I/0 can be modeled as message passing: writing to a file is like sending a message, and reading from a file is like receiving a message. MPI-IO intends to leverage the relatively wide acceptance of the MPI interface in order to create a similar I/0 interface. The above approach can be materialized in different ways. The current proposal represents the result of extensive discussions (and arguments), but is by no means finished. Many changes can be expected as additional participants join the effort to define an interface for portable I/0. This document is organized as follows. The remainder of this section includes a discussion of some issues that have shaped the style of the interface. Section 2 presents an overview of MPI-IO as it is currently defined. It specifies what the interface currently supports and states what would need to be added to the current proposal to make the interface more complete and robust. The next seven sections contain the interface definition itself. Section 3 presents definitions and conventions. Section 4 contains functions for file control, most notably open. Section 5 includes functions for independent I/O, both blocking and nonblocking. Section 6 includes functions for collective I/O, both blocking and nonblocking. Section 7 presents functions to support system-maintained file pointers, and shared file pointers. Section 8 presents constructors that can be used to define useful filetypes (the role of filetypes is explained in Section 2 below). Section 9 presents how the error handling mechanism of MPI is supported by the MPI-IO interface. All this is followed by a set of appendices, which contain information about issues that have not been totally resolved yet, and about design considerations. The reader can find there the motivation behind some of our design choices. More information on this would definitely be welcome and will be included in a further release of this document. The first appendix contains a description of MPI-I0's 'hints' structure which is used when opening a file. Appendix B is a discussion of various issues in the support for file pointers. Appendix C explains what we mean in talking about atomic access. Appendix D provides detailed examples of filetype constructors, and Appendix E contains a collection of arguments for and against various design decisions.
Abstract—High-performance computing (HPC) applications generate and consume substantial amounts of data, typically managed by parallel file systems. These applications access file systems either through the POSIX interface or by using highlevel I/O libraries. While the POSIX consistency model remains dominant in HPC, emerging file systems and popular I/O libraries increasingly adopt alternative consistency models that relax semantics in various ways, creating significant challenges for correctness and portability. This paper addresses these challenges by proposing a trace-driven I/O consistency verification workflow, implemented in our open-source tool, VerifyIO, which collects execution traces, detects data conflicts, and verifies proper synchronization against specified consistency models. Our extensive evaluation of 91 test case executions across three widely used I/O libraries with four I/O consistency models reveals critical consistency issues at both application and implementation levels.