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At least 19 records

All sources NASA NTRS DOE OSTI

DOE OSTI2022

New Total-Ionizing-Dose Resistant Data Storing Technique for NAND Flash Memory

This paper describes a new non-charge-based data storing technique in NAND flash memory called watermark that encodes read-only data in the form of physical properties of flash memory cells. Unlike traditional charge-based data storing method in flash memory, the proposed technique is resistant to total ionizing dose (TID) effects. To evaluate its resistance to irradiation effects, we analyze data stored in several commercial single-level-cell (SLC) flash memory chips from different vendors and technology nodes. These chips are irradiated using a Co-60 gamma-ray source array for up to 100 krad(Si) at Sandia National Laboratories. Experimental evaluation performed on a flash chip from Samsung shows that the intrinsic bit error rate (BER) of watermark increases from 0.8% for TID = 0 krad(Si) to 1% for TID = 100 krad(Si). Conversely, the BER of charge-based data stored on the same chip increases from 0% at TID = 0 krad(Si) to 1.5% at TID = 100 krad(Si). Overall, the results imply that the proposed technique may potentially offer significant improvements in data integrity relative to traditional charge-based data storage for very high radiation (TID > 100 krad(Si)) environments. These gains in data integrity relative to the charge-based data storage are useful in radiation-prone environments, but they come at the cost of increased write times and higher BERs before irradiation.

36 MATERIALS SCIENCE↗

DOE OSTI2024

NuQKD: A Modular Quantum Key Distribution Simulation Framework for Engineering Applications

Abstract An experimental Quantum Key Distribution (QKD) implementation requires advanced costly hardware, unavailable in most research environments, making protocol testing and performance evaluation complicated. This has been a major motivation for the development of QKD simulation frameworks, to allow researchers to obtain insight before proceeding into practical implementations. Several simulators have been introduced over the recent years. However, only four are publicly available, only one of which models equipment imperfections. Currently, no open‐source simulator includes all following capabilities: channel attenuation modelling, equipment imperfections and effects on key rates, estimation of elapsed time during classical and quantum‐ channel processes, use of truly random binary sequences for qubits and measurement bases, shared ‐bit fraction customization. In this paper, we present NuQKD, an open‐ source modular, intuitive simulator, featuring all the above capabilities. NuQKD establishes communication between two computer terminals, accepts custom user inputs (iterations, raw key size, attacker interception rate etc.) and evaluates the sifted key, Quantum Bit Error Rate (QBER), elapsed communication time, and more. NuQKD capabilities include optical fiber and free ‐space simulation, modeling of equipment/channel imperfections, bitstrings from True Random Number Generators, decoy‐state protocol support, and automated evaluation of performance metrics. We expect NuQKD to enable convenient and accurate representation of actual experimental conditions.

Gkouliaras, Konstantinos↗

DOE OSTI2026

A scalable superconducting nanowire memory array with row–column addressing

Scalable superconducting memory is required for the development of low-energy superconducting computers and fault-tolerant quantum computers. Conventional superconducting logic-based memory cells possess a large footprint that limits scaling; nanowire-based superconducting memory cells, although more compact, have high error rates, which hinders integration into large arrays. Here we report a 4 × 4 superconducting nanowire memory array that is designed for scalable row–column operations and has a functional density of 2.6 Mbit cm −2 . Each memory cell is based on a nanowire loop consisting of two temperature-dependent superconducting switches and a variable kinetic inductor. The arrays operate at 1.3 K, where we implement and characterize multiflux quanta state storage and destructive read-out. By optimizing the write- and read-pulse sequences, we minimize bit errors and maximize operating margins. We achieve a minimum bit error rate of 10 −5 . Here, we also use circuit-level simulations to understand the memory cell’s dynamics, performance limits and stability under varying pulse amplitudes.

Electrical and electronic engineering↗

DOE OSTI2024

Testing of a Line Driver With Configurable Pre-Emphasis on Lossy Transmission Lines

Rare-event physics experiments such as the Deep Underground Neutrino Experiment (DUNE) or the next Enriched Xenon Observatory (nEXO) experiment search for rare, low-energy events, detected by sensitive detectors immersed in a cryogenic noble liquid (e.g., liquid argon or xenon). Readout electronics used within such detectors must consume minimal power while operating reliably in cryogenic environments. Furthermore, in the case of nEXO, maximizing the radiopurity of the environment is vital to minimize background noise, thus placing strict limits on the volume of dielectric materials, leading to high-loss data cables spanning distances up to 12 m. Such cables cause high attenuation and intersymbol interference (ISI), resulting in a high bit-error rate (BER). These issues were addressed by developing an integrated line driver with configurable pre-emphasis in a 65-nm CMOS process. The pre-emphasis parameters can be programmed to minimize BER for specific cables and data rates under power constraints. Here, the driver was tested at both room and cryogenic temperatures. In both cases, the output BER was found to be strongly correlated with the pre-emphasis settings. Furthermore, analysis and simulation showed that adapting the pre-emphasis settings based on the incoming bit sequence can further improve performance with minimal changes to the current solution.

47 OTHER INSTRUMENTATION↗

DOE OSTI2023

A superconducting nanowire binary shift register

We present a design for a superconducting nanowire binary shift register, which stores digital states in the form of circulating supercurrents in high-kinetic-inductance loops. Adjacent superconducting loops are connected with nanocryotrons, three-terminal electrothermal switches, and fed with an alternating two-phase clock to synchronously transfer the digital state between the loops. A two-loop serial-input shift register was fabricated with thin-film NbN and a bit error rate of less than 10 –4 was achieved, when operated at a maximum clock frequency of 83 MHz and in an out-of-plane magnetic field of up to 6 mT. A shift register based on this technology offers an integrated solution for low-power readout of superconducting nanowire single photon detector arrays and is capable of interfacing directly with room-temperature electronics and operating unshielded in high magnetic field environments.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2023

A nanocryotron memory and logic family

The development of superconducting electronics based on nanocryotrons has been limited so far to few device circuits, in part due to the lack of standard and robust logic cells. Here, we introduce and experimentally demonstrate designs for a set of nanocryotron-based building blocks that can be configured and combined to implement memory and logic functions. The devices were fabricated by patterning a single superconducting layer of niobium nitride and measured in liquid helium on a wide range of operating points. The tests show 10 - 4 bit error rates with above ± 20 % margins up to 50 MHz and the possibility of operating under the effect of an out-of-plane 36 mT magnetic field, with ± 30 % margins at 10 MHz. Additionally, we designed and measured an equivalent delay-flip-flop made of two memory cells to show the possibility of combining multiple building blocks to make larger circuits. These blocks may constitute a solid foundation for the development of nanocryotron logic circuits and finite-state machines with potential applications in the integrated processing and control of superconducting nanowire single-photon detectors.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2022

The Octopus processor for the CMS L1 muon trigger for High Luminosity LHC

The upgraded L1 muon trigger system of the CMS experiment in the High Luminosity Large Hadron Collider is based on custom processors featuring large Field Programmable Gate Arrays (FPGAs) connected by large numbers of optical links. These provide the I/O bandwidth and power necessary to process the complex algorithms used during the collection of physics data. The design and performance requirements of these processors creates significant challenges in signal integrity, power delivery, and thermal management. In this paper we describe the Octopus processor, featuring a large Xilinx Virtex Ultrascale+ FPGA and up to 128 links interfaced to optics through high quality twin-ax copper cables. Results on signal integrity at 25 Gb/s and the first demonstration of 50+ Gb/s links with pluggable optics in CMS are also shown, demonstrating bit error rates below 10 –15 at a 95% confidence level. The thermal performance is measured inside an Advanced-TCA crate with acceptable thermal margins up to 200 W of chip power. Future improvements are mentioned, potentially allowing operation at up to 300 W.

Instruments & Instrumentation↗

DOE OSTI2025

Development of a test system for data links of the ATLAS Inner Tracker (ITk) upgrade silicon pixel detector

This contribution introduces a novel test system developed to evaluate the signal transmission quality in high-speed data links for the 2026 Inner Tracker (ITk) upgrade of the ATLAS experiment. Using an FPGA-based data acquisition (DAQ) framework, the setup can run simultaneous Bit Error Rate (BER) tests for up to 64 channels and generate virtual eye diagrams, for qualifying the ∼26k electrical links at the ATLAS ITk data rate of 1.28 Gb/s. The paper includes results from system calibration, yielding its contribution to the measured losses, and preliminary results from tests of prototype and pre-production assemblies of on-detector links of the three ATLAS ITk Pixel subsystems.

47 OTHER INSTRUMENTATION↗

DOE OSTI2022

Hyperentangled Time-Bin and Polarization Quantum Key Distribution

Fiber-based quantum communication networks are currently limited without quantum repeaters. Satellite-based quantum links have been proposed to extend the network domain. Here, we develop a quantum communication system, suitable for realistic satellite-to-ground communication. With this system, we execute an entanglement-based quantum key distribution (QKD) protocol developed by Bennett, Brassard, and Mermin (BBM92), achieving quantum bit-error rates (QBERs) below 2% in all bases. More importantly, we demonstrate low-QBER execution of a higher-dimensional hyperentanglement-based QKD protocol, using photons simultaneously entangled in polarization and time bin, leading to significantly higher secure key rates, at the cost of increased technical complexity and system size. We show that our protocol is suitable for a space-to-ground link, after incorporating Doppler-shift compensation, and verify its security using a rigorous finite-key analysis. Additionally, we discuss system-engineering considerations relevant to those and other quantum communication protocols and their dependence on what photonic degrees of freedom are utilized.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2023

Analysis and Compensation of Tx and Rx IQ Imbalances in Uplink IM-OFDMA Systems

Index modulation-based orthogonal division multiple access (IM-OFDMA) has recently been proposed as a potential technique for future wireless communication systems due to its superior spectral efficiency and error performance over conventional multiple access schemes. However, its performance is still under investigation by researchers in light of a variety of scenarios and assumptions. Following this direction, in this Article, the individual and joint effects of the transmitter (Tx) and receiver (Rx) in-phase and quadrature imbalances (IQI) on the bit-error-rate (BER) performance of the uplink IM-OFDMA scheme are investigated by considering whether each user's RF front-end is identical or not. Moreover, to reduce the detrimental effect of IQI, a preamble-based estimation and compensation method is proposed for IM-OFDMA. Closed-form expressions for the average BER of IM-OFDMA are obtained by considering the physical effect of the Tx and Rx IQI. Also, using Monte Carlo simulations, the derived expressions are verified under different system configurations. Furthermore, analytical and simulation results reveal that Tx and Rx IQI cause an error floor in the BER performance of IM-OFDMA schemes. However, the proposed estimation and compensation method not only reduces the impact of IQI but also leads to a better BER performance compared to the case of no IQI, which mainly refers to the frequency diversity caused by the IQI.

42 ENGINEERING↗

DOE OSTI2024

Entanglement-based quantum digital signatures over a deployed campus network

The quantum digital signature protocol offers a replacement for most aspects of public-key digital signatures ubiquitous in today’s digital world. A major advantage of a quantum-digital-signatures protocol is that it can have information-theoretic security, whereas public-key cryptography cannot. Here we demonstrate and characterize hardware to implement entanglement-based quantum digital signatures over our campus network. Over 25 hours, we collect measurements on our campus network, where we measure sufficiently low quantum bit error rates (<5% in most cases) which in principle enable quantum digital signatures at over 50 km as shown through rigorous simulation accompanied by a noise model developed specifically for our implementation. These results show quantum digital signatures can be successfully employed over deployed fiber. Moreover, our reported method provides great flexibility in the number of users, but with reduced entanglement rate per user. Finally, while the current implementation of our entanglement-based approach has a low signature rate, feasible upgrades would significantly increase the signature rate.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2024

HPE ultralit project (ARPA-E open program 2018) final report 15

The goal of the program was to build a fully integrated optical transceiver with >1 Tb/s and <1.5 pJ/bit operating at 50 ◦ C. Optical transceivers are critical components in high-performance-computers (HPC) and data centers, and the details of their implementation has a big impact on the total power consumption (energy efficiency) of an HPC system. Our proposed transceiver used three key enabling technologies. Firstly, SiGe avalanche photodetectors have record-low sensitivities, meaning that they can reach low bit error rates with very little light input. As a result, we can drive our lasers at a lower drive current, thus saving electrical power. Secondly, we use MOS-based capacitive tuning in our deinterleaver, modulator, and demultiplexer. Capacitive tuning allows for the tuning of photonic elements with zero static power consumption. Thirdly, we use quantum dots as the gain material in our light source. This allows us to efficiently use our light source at temperatures that are typically encountered in an HPCsystem. Our proposed optical transceiver consisted of a quantum dot comb laser as a light source, a booster SOA, MOS-based deinterleavers, MOS based ring modulators, MOS-based ring demultiplexers, and SiGe APDs.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

DOE OSTI2024

LEED: A Lightwave Energy-Efficient Datacenter

The Lightwave Energy-Efficient Datacenter (LEED) program is a disruptive “green-field” approach that provides a quantum leap in the energy efficiency of datacenters. LEED’s fundamental value proposition is that a novel and re-architected optical network—RotorNet— can deliver “more bandwidth per buck” as well as unique system-level attributes that significantly improve overall datacenter energy efficiency and performance. LEED has developed three system-level testbeds. The first testbed uses calibrated hardware and software power measurements to determine server energy efficiency as a function of network bandwidth and workload. These measurements have shown that increasing network communications bandwidth dramatically increases server energy efficiency providing a realistic path to the overall ENLITENED program goal of doubling the number of transactions per joule. The second testbed demonstrates key hardware: a prototype low-loss, high-port count optical “selector switch”. This switch was fabricated, racked, and tested. Measured switch characteristics include loss, bandwidth, crosstalk, switch time, system-level switch time (including the transceivers), and bit error rate. The third testbed demonstrates a fully working and manufactured pinwheel design which dramatically lowers the cost of design, while delivering high switch radix and low reconfiguration times. The LEED project has tied these three novel photonic switch prototypes together with production servers and software through the development of a novel FPGA-based NIC platform called Corundum. Corundum ensures that the packet-switched protocols supported by commodity operating systems and devices can interface with the Rotor switch design. The LEED group has used this combined hardware and software prototype to characterize applications running at a commercially relevant scale. The project has used a combination of enhanced optical modulation amplitude (OMA) modulators, broadband multiplexers and demultiplexers, avalanche photodiodes, and a novel burst-mode receivers to enable the insertion of LEED-developed optical switches without the need for expensive optical amplification. Our modeling has shown that measured LEED-developed device characteristics can achieve link characteristics of 2 pJ/bit including both transceivers and the Rotor switch. In summary, the LEED program has demonstrated a credible and practical path, through novel hardware and software, to realize the program objectives of ENLITENED. The net result will ensure that the United States maintains its strength in the crucial sector of Information Technology, which is vital to both our economic security and our national security.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

DOE OSTI2023

The design and test results of A Giga-Bit Cable Receiver (GBCR) for the ATLAS Inner Tracker Pixel Detector

This paper presents the design and test results of a Gigabit Cable Receiver ASIC called GBCR for the HL-LHC upgrade of the ATLAS Inner Tracker (ITk) pixel detector. Three prototypes (GBCR1, GBCR2, and GBCR3) have been designed in the CERN-identified 65 nm CMOS technology. GBCR receives seven (GBCR2) or six (GBCR3) channels (RX) each at 1.28 Gbps from the front-end readout chip RD53B via flex cables up to 1 meter and Twinax cables up to 5 meters and sends the equalized and retimed signals to lpGBT. Both GBCR2 and GBCR3 ASICs have two transmitting channels (TX) that pre-emphasize the signals from lpGBT before sending them to RD53B through the same cables. No Single-Event Upset (SEU) is observed in any tested channels of GBCR2 in a 400 MeV proton beam. The extrapolated bit error rate for the future HL-LHC application is below 8*10^(-16), significantly below the specified BER criterion. GBCR3 is designed to improve the immunity to single-event-upset by applying the Triple Modular Redundancy (TMR) technology to all RX channels. The retimed signals from GBCR3 have less total jitter than those from GBCR2 (35 ps versus 79 ps). Each receiver channel of GBCR3 consumes 75% more power than that of GBCR2.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2022

SZ3: A Modular Framework for Composing Prediction-Based Error-Bounded Lossy Compressors

Today's scientific simulations require a significant reduction of data volume because of extremely large amounts of data they produce and the limited I/O bandwidth and storage space. Here, error-bounded lossy compression has been considered one of the most effective solutions to the above problem. In practice, however, the best-fit compression method often needs to be customized or optimized in particular because of diverse characteristics in different datasets and various user requirements on the compression quality and performance. In this paper, we address this issue with a novel modular, composable compression framework named SZ3. Our contributions are four-folds. (1) We develop SZ3 which features an innovative modular abstraction for the prediction-based compression framework, such that compression modules can be plugged in easily to create new compressors based on characteristics of data and user requirements. (2) We create a new compression pipeline by SZ3 for GAMESS data, which significantly improves the compression ratios over state-of-the-art compressors. (3) We develop an adaptive compression pipeline by SZ3 for APS data with minimal efforts, which leads to the best rate-distortion among all existing error-bounded lossy compressors for any bit-rate. (4) We compare the sustainability of SZ3 with leading error-bounded prediction-based compressors, and then demonstrate the necessity of diverse pipelines by integrating and evaluating several compression pipelines on diverse scientific datasets from multiple disciplines. Experiments show that SZ3 incurs very limited overhead in compressor integration and our customized compression pipelines lead to up to 20% improvement in compression ratios under the same data distortion, when compared with the best existing approach.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2025

Q-Cluster: Quantum Error Mitigation Through Noise-Aware Unsupervised Learning

Quantum error mitigation (QEM) is critical in reducing the impact of noise in the pre-fault-tolerant era, and is expected to complement error correction in fault-tolerant quantum computing (FTQC). In this work, we propose a novel QEM approach, Q-Cluster, that uses unsupervised learning (clustering) to reshape the measured bit-string distribution. Our approach starts with a simplified bit-flip noise model. It first performs clustering on noisy measurement results, i.e., bit-strings, based on the Hamming distance. The centroid of each cluster is calculated using a qubit-wise majority vote. Next, the noisy distribution is adjusted with the clustering outcomes and the bitflip error rates using Bayesian inference. Our simulation results show that Q-Cluster can mitigate high noise rates (up to 40% per qubit) with the simple bit-flip noise model. However, real quantum computers do not fit such a simple noise model. To address the problem, we (a) apply Pauli twirling to tailor the complex noise channels to Pauli errors, and (b) employ a machine learning model, ExtraTrees regressor, to estimate an effective bit-flip error rate using a feature vector consisting of machine calibration data (gate & measurement error rates), circuit features (number of qubits, numbers of different types of gates, etc.) and the shape of the noisy distribution (entropy). Our experimental results show that our proposed Q-Cluster scheme improves the fidelity by a factor of 1.46x, on average, compared to the unmitigated output distribution, for a set of low-entropy benchmarks on five different IBM quantum machines. Our approach outperforms the state-of-art QEM approaches RZNE [28], M3 [24], Hammer [35], and QBEEP [33] by 1.26x,1.29x,1.47x, and 2.65 x, respectively.

42 ENGINEERING↗

DOE OSTI2023

Perturbative readout-error mitigation for near-term quantum computers

Readout errors on near-term quantum computers can introduce significant error to the empirical probability distribution sampled from the output of a quantum circuit. These errors can be mitigated by classical postprocessing given the access of an experimental response matrix that describes the error associated with the measurement of each computational basis state. However, the resources required to characterize a complete response matrix and to compute the corrected probability distribution scale exponentially with the number of qubits, n . In this work, we modify standard matrix inversion techniques using perturbative approximations with significantly reduced complexity and bounded error when the likelihood of high-order bit-flip events is strongly suppressed. Given a characteristic error rate q , we discuss a method to recover the probability of the all-zeros bit string p 0 by sampling only a small subspace of the response matrix before inverting readout error, resulting in a relative speedup of poly [ 2 n / ( n w ) ] , which we motivate using a simplified error model for which the approximation incurs only O ( q w ) error for some integer w . We then provide a generalized technique to efficiently recover full output distributions with O ( q w ) error in the perturbative limit. These approximate techniques for readout-error correction may greatly accelerate near-term quantum computing applications.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2023

Digital encoding algorithm for pixelated detectors

A detector for imaging and efficiently digitizing a spatial distribution of photon flux includes pixel circuits that compressively encode pixel values generated by integrated analog to digital converters (ADCs). On-pixel digital compression circuits (DCCs) implement compression to increase continuous frame rate by reducing the number of bits per pixel while keeping quantization error below Poisson noise. Several mapping algorithms for photon-counting and charge-integrating detectors and compact digital logic implementations are presented.

Hammer, Michael P.↗