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At least 19 records

Bit error rate measurement above and below bit rate tracking threshold

Bit error rate is measured by sending a pseudo-random noise (PRN) code test signal simulating digital data through digital equipment to be tested. An incoming signal representing the response of the equipment being tested, together with any added noise, is received and tracked by being compared with a locally generated PRN code. Once the locally generated PRN code matches the incoming signal a tracking lock is obtained. The incoming signal is then integrated and compared bit-by-bit against the locally generated PRN code and differences between bits being compared are counted as bit errors.

Kobayaski, H. S.

Performance of concatenated codes using 8-bit and 10-bit Reed-Solomon codes

The performance improvement of concatenated coding systems using 10-bit instead of 8-bit Reed-Solomon codes is measured by simulation. Three inner convolutional codes are considered: (7,1/2), (15,1/4), and (15,1/6). It is shown that approximately 0.2 dB can be gained at a bit error rate of 10(-6). The loss due to nonideal interleaving is also evaluated. Performance comparisons at very low bit error rates may be relevant for systems using data compression.

Pollara, F.

Acquisition and Retaining Granular Samples via a Rotating Coring Bit

This device takes advantage of the centrifugal forces that are generated when a coring bit is rotated, and a granular sample is entered into the bit while it is spinning, making it adhere to the internal wall of the bit, where it compacts itself into the wall of the bit. The bit can be specially designed to increase the effectiveness of regolith capturing while turning and penetrating the subsurface. The bit teeth can be oriented such that they direct the regolith toward the bit axis during the rotation of the bit. The bit can be designed with an internal flute that directs the regolith upward inside the bit. The use of both the teeth and flute can be implemented in the same bit. The bit can also be designed with an internal spiral into which the various particles wedge. In another implementation, the bit can be designed to collect regolith primarily from a specific depth. For that implementation, the bit can be designed such that when turning one way, the teeth guide the regolith outward of the bit and when turning in the opposite direction, the teeth will guide the regolith inward into the bit internal section. This mechanism can be implemented with or without an internal flute. The device is based on the use of a spinning coring bit (hollow interior) as a means of retaining granular sample, and the acquisition is done by inserting the bit into the subsurface of a regolith, soil, or powder. To demonstrate the concept, a commercial drill and a coring bit were used. The bit was turned and inserted into the soil that was contained in a bucket. While spinning the bit (at speeds of 600 to 700 RPM), the drill was lifted and the soil was retained inside the bit. To prove this point, the drill was turned horizontally, and the acquired soil was still inside the bit. The basic theory behind the process of retaining unconsolidated mass that can be acquired by the centrifugal forces of the bit is determined by noting that in order to stay inside the interior of the bit, the frictional force must be greater than the weight of the sample. The bit can be designed with an internal sleeve to serve as a container for granular samples. This tube-shaped component can be extracted upon completion of the sampling, and the bottom can be capped by placing the bit onto a corklike component. Then, upon removal of the internal tube, the top section can be sealed. The novel features of this device are: center dot A mechanism of acquiring and retaining granular samples using a coring bit without a closed door. center dot An acquisition bit that has internal structure such as a waffle pattern for compartmentalizing or helical internal flute to propel the sample inside the bit and help in acquiring and retaining granular samples. center dot A bit with an internal spiral into which the various particles wedge. center dot A design that provides a method of testing frictional properties of the granular samples and potentially segregating particles based on size and density. A controlled acceleration or deceleration may be used to drop the least-frictional particles or to eventually shear the unconsolidated material near the bit center.

Bar-Cohen, Yoseph

Foldable Instrumented Bits for Ultrasonic/Sonic Penetrators

Long tool bits are undergoing development that can be stowed compactly until used as rock- or ground-penetrating probes actuated by ultrasonic/sonic mechanisms. These bits are designed to be folded or rolled into compact form for transport to exploration sites, where they are to be connected to their ultrasonic/ sonic actuation mechanisms and unfolded or unrolled to their full lengths for penetrating ground or rock to relatively large depths. These bits can be designed to acquire rock or soil samples and/or to be equipped with sensors for measuring properties of rock or soil in situ. These bits can also be designed to be withdrawn from the ground, restowed, and transported for reuse at different exploration sites. Apparatuses based on the concept of a probe actuated by an ultrasonic/sonic mechanism have been described in numerous prior NASA Tech Briefs articles, the most recent and relevant being "Ultrasonic/ Sonic Impacting Penetrators" (NPO-41666) NASA Tech Briefs, Vol. 32, No. 4 (April 2008), page 58. All of those apparatuses are variations on the basic theme of the earliest ones, denoted ultrasonic/sonic drill corers (USDCs). To recapitulate: An apparatus of this type includes a lightweight, low-power, piezoelectrically driven actuator in which ultrasonic and sonic vibrations are generated and coupled to a tool bit. The combination of ultrasonic and sonic vibrations gives rise to a hammering action (and a resulting chiseling action at the tip of the tool bit) that is more effective for drilling than is the microhammering action of ultrasonic vibrations alone. The hammering and chiseling actions are so effective that the size of the axial force needed to make the tool bit advance into soil, rock, or another material of interest is much smaller than in ordinary twist drilling, ordinary hammering, or ordinary steady pushing. Examples of properties that could be measured by use of an instrumented tool bit include electrical conductivity, permittivity, magnetic field, magnetic permeability, temperature, and any other properties that can be measured by fiber-optic sensors. The problem of instrumenting a probe of this type is simplified, relative to the problem of attaching electrodes in a rotating drill bit, in two ways: (1) Unlike a rotating drill bit, a bit of this type does not have flutes, which would compound the problem of ensuring contact between sensors and the side wall of a hole; and (2) there is no need for slip rings for electrical contact between sensor electronic circuitry and external circuitry because, unlike a rotating drill, a tool bit of this type is not rotated continuously during operation. One design for a tool bit of the present type is a segmented bit with a segmented, hinged support structure (see figure). The bit and its ultrasonic/sonic actuator are supported by a slider/guiding fixture, and its displacement and preload are controlled by a motor. For deployment from the folded configuration, a spring-loaded mechanism rotates the lower segment about the hinges, causing the lower segment to become axially aligned with the upper segment. A latching mechanism then locks the segments of the bit and the corresponding segments of the slider/guiding fixture. Then the entire resulting assembly is maneuvered into position for drilling into the ground. Another design provides for a bit comprising multiple tubular segments with an inner alignment string, similar to a foldable tent pole comprising multiple tubular segments with an inner elastic cable connecting the two ends. At the beginning of deployment, all segments except the first (lowermost) one remain folded, and the ultrasonic/sonic actuator is clamped to the top of the lowermost segment and used to drive this segment into the ground. When the first segment has penetrated to a specified depth, the second segment is connected to the upper end of the first segment to form a longer rigid tubular bit and the actuator is moved to the upper end of the second segnt. The process as described thus far is repeated, adding segments until the desired depth of penetration has been attained. Yet other designs provide for bits in the form of bistable circular- or rectangular- cross-section tubes that can be stowed compactly like rolls of flat tape and become rigidified upon extension to full length, in a manner partly similar to that of a common steel tape measure. Albeit not marketed for use in tool bits, a bistable reeled composite product that transforms itself from a flat coil to a rigid tube of circular cross section when unrolled, is commercially available under the trade name RolaTube(TradeMark) and serves as a model for the further development of tool bits of this subtype.

Bar-Cohen, Yoseph

Vector excitation coding with dynamic bit allocation

Vector excitation coding (VXC) has shown promise for digital transmission of fairly high communications quality speech at low bit rates, but current version of the algorithm still suffer from audible degradations, particularly at 4.8 kb/s. The authors examine the technique of dynamic bit allocation (DBA) to improve the performance of VXC for a given bit rate. The approach is based on the observation that the minimum bit rate needed to code adequately both the long-term and short-term predictors in VXC varies dynamically with time. Therefore, in frames where fewer bits suffice for the predictors, the unneeded bits can be reallocated to other coder parameter sets such as excitation vectors. By dynamically distributing available bits among the different coder parameter sets while keeping the total number of bits in each frame fixed, it is possible to improve overall coder performance without increasing bit rate.

Yong, Mei

32-Bit-Wide Memory Tolerates Failures

Electronic memory system of 32-bit words corrects bit errors caused by some common type of failures - even failure of entire 4-bit-wide random-access-memory (RAM) chip. Detects failure of two such chips, so user warned that ouput of memory may contain errors. Includes eight 4-bit-wide DRAM's configured so each bit of each DRAM assigned to different one of four parallel 8-bit words. Each DRAM contributes only 1 bit to each 8-bit word.

Buskirk, Glenn A.

Least Reliable Bits Coding (LRBC) for high data rate satellite communications

An analysis and discussion of a bandwidth efficient multi-level/multi-stage block coded modulation technique called Least Reliable Bits Coding (LRBC) is presented. LRBC uses simple multi-level component codes that provide increased error protection on increasingly unreliable modulated bits in order to maintain an overall high code rate that increases spectral efficiency. Further, soft-decision multi-stage decoding is used to make decisions on unprotected bits through corrections made on more protected bits. Using analytical expressions and tight performance bounds it is shown that LRBC can achieve increased spectral efficiency and maintain equivalent or better power efficiency compared to that of Binary Phase Shift Keying (BPSK). Bit error rates (BER) vs. channel bit energy with Additive White Gaussian Noise (AWGN) are given for a set of LRB Reed-Solomon (RS) encoded 8PSK modulation formats with an ensemble rate of 8/9. All formats exhibit a spectral efficiency of 2.67 = (log2(8))(8/9) information bps/Hz. Bit by bit coded and uncoded error probabilities with soft-decision information are determined. These are traded with with code rate to determine parameters that achieve good performance. The relative simplicity of Galois field algebra vs. the Viterbi algorithm and the availability of high speed commercial Very Large Scale Integration (VLSI) for block codes indicates that LRBC using block codes is a desirable method for high data rate implementations.

Vanderaar, Mark

Correction of burst errors containing bit slippages for cyclic block codes

A technique is presented for correction of an (n,k) cyclic block code subjected to a noise disturbance consisting of an arbitrary number of both bit deletions and bit inversions contained within a single error burst. Following the procedure described by Meggitt (1961), the correction of a b-bit burst is attempted by first loading the initial error syndrome into an (n-k) order feedback shift register with taps selected for the code's generating polynomial; the register is then successively shifted one bit position in the direction of lower order. The discussion covers burst correction with m-bit deletion, burst/deletion decoder implementation, false correction probability, and bit slippage involving bit insertions. The principal elements of the burst/deletion correction decoder are presented in schematic form.

Green, E. P.

Critique of the Hughes Aircraft shuttle Ku band leading edge bit synchronizer

A bit synchronizer is analyzed via timing diagrams in a noise-free environment. It is believed that this new bit synchronizer will track the rising edge of the data bits with 25% asymmetry and up to a 90 deg phase shift between the received clock and data bit timing. In addition, the data bits will be demodulated correctly. It is not true that phase shifts larger than 90 deg will necessarily be corrected by this bit synchronizer. However, the specifications currently require the loop to operate over only a + or - 75 deg phase shift between the received data stream leading edges and the bit synchronizer leading edges; consequently, there should be no problem.

Holmes, J. K.

Theoretical Accuracy for ESTL Bit Error Rate Tests

"Bit error rate" [BER] for the purposes of this paper is the fraction of binary bits which are inverted by passage through a communication system. BER can be measured for a block of sample bits by comparing a received block with the transmitted block and counting the erroneous bits. Bit Error Rate [BER] tests are the most common type of test used by the ESTL for evaluating system-level performance. The resolution of the test is obvious: the measurement cannot be resolved more finely than 1/N, the number of bits tested. The tolerance is not. This paper examines the measurement accuracy of the bit error rate test. It is intended that this information will be useful in analyzing data taken in the ESTL. This paper is divided into four sections and follows a logically ordered presentation, with results developed before they are evaluated. However, first-time readers will derive the greatest benefit from this paper by skipping the lengthy section devoted to analysis, and treating it as reference material. The analysis performed in this paper is based on a Probability Density Function [PDF] which is developed with greater detail in a past paper, Theoretical Accuracy for ESTL Probability of Acquisition Tests, EV4-98-609.

Lansdowne, Chatwin

The effect of bandlimiting of a PCM/NRZ signal on the bit-error probability.

The explicit expressions for the intersymbol interference as a function of bandwidth-bit duration product and bit positions for PCM/NRZ systems operating in the presence of Gaussian noise and in a bandlimited channel are determined. Two types of linear bit detectors are considered, integrate and dump, and bandlimit and sample. Restriction of bandwidth results in a performance degradation. The degradation of signal-to-noise ratio is presented as a function of bandwidth-bit duration product and bit patterns. The average probability of bit errors is computed for various bandwidths. The calculations of the upper bound and lower bound on the error probability are also presented.

Tu, K.

Shuttle bit rate synchronizer

A shuttle bit rate synchronizer brassboard unit was designed, fabricated, and tested, which meets or exceeds the contractual specifications. The bit rate synchronizer operates at signal-to-noise ratios (in a bit rate bandwidth) down to -5 dB while exhibiting less than 0.6 dB bit error rate degradation. The mean acquisition time was measured to be less than 2 seconds. The synchronizer is designed around a digital data transition tracking loop whose phase and data detectors are integrate-and-dump filters matched to the Manchester encoded bits specified. It meets the reliability (no adjustments or tweaking) and versatility (multiple bit rates) of the shuttle S-band communication system through an implementation which is all digital after the initial stage of analog AGC and A/D conversion.

Huey, D. C.

A fixed/variable bit-rate data compression architecture

A VLSI architecture for an adaptive data compression encoder capable of sustaining fixed or variable bit-rate output has been developed. There are three modes of operation: lossless with variable bit-rate, lossy with fixed bit-rate and lossy with variable bit-rate. For lossless encoding, the implementation is identical to the USES chip designed for Landsat 7. Obtaining a fixed bit-rate is achieved with a lossy DPCM algorithm using adaptive, nonuniform scalar quantization. In lossy mode, variable bit-rate coding uses the lossless sections of the encoder for post-DPCM entropy coding. The encoder shows excellent compression performance in comparison to other current data compression techniques. No external tables or memory are required for operation.

Zweigle, Gregary C.

Theoretical and subjective bit assignments in transform picture

It is shown that all combinations of symmetrical input distributions with difference distortion measures give a bit assignment rule identical to the well-known rule for a Gaussian input distribution with mean-square error. Published work is examined to show that the bit assignment rule is useful for transforms of full pictures, but subjective bit assignments for transform picture coding using small block sizes are significantly different from the theoretical bit assignment rule. An intuitive explanation is based on subjective design experience, and a subjectively obtained bit assignment rule is given.

Jones, H. W., Jr.

Effect of atmospheric turbulence on the bit error probability of a space to ground near infrared laser communications link using binary pulse position modulation and an avalanche photodiode detector

The effect of atmospheric turbulence on the bit error rate of a space-to-ground near infrared laser communications link is investigated, for a link using binary pulse position modulation and an avalanche photodiode detector. Formulas are presented for the mean and variance of the bit error rate as a function of signal strength. Because these formulas require numerical integration, they are of limited practical use. Approximate formulas are derived which are easy to compute and sufficiently accurate for system feasibility studies, as shown by numerical comparison with the exact formulas. A very simple formula is derived for the bit error rate as a function of signal strength, which requires only the evaluation of an error function. It is shown by numerical calculations that, for realistic values of the system parameters, the increase in the bit error rate due to turbulence does not exceed about thirty percent for signal strengths of four hundred photons per bit or less. The increase in signal strength required to maintain an error rate of one in 10 million is about one or two tenths of a db.

Safren, H. G.

Cascade Error Projection with Low Bit Weight Quantization for High Order Correlation Data

In this paper, we reinvestigate the solution for chaotic time series prediction problem using neural network approach. The nature of this problem is such that the data sequences are never repeated, but they are rather in chaotic region. However, these data sequences are correlated between past, present, and future data in high order. We use Cascade Error Projection (CEP) learning algorithm to capture the high order correlation between past and present data to predict a future data using limited weight quantization constraints. This will help to predict a future information that will provide us better estimation in time for intelligent control system. In our earlier work, it has been shown that CEP can sufficiently learn 5-8 bit parity problem with 4- or more bits, and color segmentation problem with 7- or more bits of weight quantization. In this paper, we demonstrate that chaotic time series can be learned and generalized well with as low as 4-bit weight quantization using round-off and truncation techniques. The results show that generalization feature will suffer less as more bit weight quantization is available and error surfaces with the round-off technique are more symmetric around zero than error surfaces with the truncation technique. This study suggests that CEP is an implementable learning technique for hardware consideration.

Duong, Tuan A.