SEARCH · Search NASA

Results for “buffer layers”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

SourceResearch connectionFrom yearThrough year

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records

All sources NASA NTRS DOE OSTI

NASA NTRS1983

Leakage effects in n-GaAs MESFET with n-GaAs buffer layer

Whereas improvement of the interface between the active layer and the buffer layer has been demonstrated, the leakage effects can be important if the buffer layer resistivity is not sufficiently high and/or the buffer layer thickness is not sufficiently small. It was found that two buffer leakage currents exist from the channel under the gate to the source and from drain to the channel in addition to the buffer leakage resistance between drain and source. It is shown that for a 1 micron gate-length n-GaAs MESFET, if the buffer layer resistivity is 12 OHM-CM and the buffer layer thickness h is 2 microns, the performance of the device degrades drastically. It is suggested that h should be below 2 microns.

Wang, Y. C.↗

NASA NTRS1991

Y1Ba2Cu3O(6+delta) growth on thin Y-enhanced SiO2 buffer layers on silicon

SiO2 buffer layers as thin as 2 nm have been developed for use in the growth of Y1Ba2Cu3O(6+delta) thin films on silicon substrates. The SiO2 layers are formed through Y enhancement of silicon oxidation, and are highly stoichiometric. Y1Ba2Cu3O(6+delta) film growth on silicon with thin buffer layers has shown c orientation and Tc0 = 78 K.

Robin, T.↗

NASA NTRS1992

Buffer layers for high-Tc thin films on sapphire

Buffer layers of various oxides including CeO2 and yttrium-stabilized zirconia (YSZ) have been deposited on R-plane sapphire. The orientation and crystallinity of the layers were optimized to promote epitaxial growth of YBa2Cu3O(7-delta) (YBCO) thin films. An ion beam channeling minimum yield of about 3 percent was obtained in the CeO2 layer on sapphire, indicating excellent crystallinity of the buffer layer. Among the buffer materials used, CeO2 was found to be the best one for YBCO thin films on R-plane sapphire. High Tc and Jc were obtained in YBCO thin films on sapphire with buffer layers. Surface resistances of the YBCO films were about 4 mOmega at 77 K and 25 GHz.

Wu, X. D.↗

NASA NTRS1995

Growth and micro structural studies on Yittria Stabilized Zirconia (YSZ) and Strontium Titanate (STO) buffer layers

Microstructure of Yittria Stabilized Zirconia (YSZ) and Strontium Titanate (STO) of radio frequency magnetron sputtered buffer layers was studied at various sputtering conditions on Si (100), Sapphire and LaAlO3 (100) substrates. The effect of substrate temperatures up to 800 C and sputtering gas pressures in the range of 50 mTorr. of growth conditions was studied. The buffer layers of YSZ and STO showed a strong tendency for columnar growth was observed above 15 mTorr sputtering gas pressure and at high substrate temperatures. Post annealing of these films in oxygen atmosphere reduced the oxygen deficiency and strain generated during growth of the films. Strong c-axis oriented superconducting YBa2Cu3O7-x (YBCO) thin films were obtained on these buffer layers using pulsed laser ablation technique. YBCO films deposited on multilayers of YSZ and STO were shown to have better superconducting properties.

Srinivas, S.↗

NASA NTRS2004

Buffer Layer Effects on Tandem InGaAs TPV Devices

Single junction indium gallium arsenide (InGaAs) based TPV devices have demonstrated efficiencies in excess of 20% at radiator temperatures of 1058 C. Modeling suggests that efficiency improvements in single bandgap devices should continue although they will eventually plateau. One approach for extending efficiencies beyond the single bandgap limit is to follow the technique taken in the solar cell field, namely tandem TPV cells. Tandem photovoltaic devices are traditionally composed of cells of decreasing bandgap, connected electrically and optically in series. The incident light impinges upon the highest bandgap first. This device acts as a sieve, absorbing the high-energy photons, while allowing the remainder to pass through to the underlying cell(s), and so on. Tandem devices reduce the energy lost to overexcitation as well as reducing the current density (Jsc). Reduced Jsc results in lower resistive losses and enables the use of thinner and lower doped lateral current conducting layers as well as a higher pitch grid design. Fabricating TPV tandem devices utilizing InGaAs for all of the component cells in a two cell tandem necessitates the inclusion of a buffer layer in-between the high bandgap device (In0.53 Ga0.47As - 0.74eV) and the low bandgap device (In0.66Ga0.34As - 0.63eV) to accommodate the approximately 1% lattice strain generated due to the change in InGaAs composition. To incorporate only a single buffer layer structure, we have investigated the use of the indium phosphide (InP) substrate as a superstrate. Thus the high-bandgap, lattice- matched device is deposited first, followed by the buffer structure and the low-bandgap cell. The near perfect transparency of the high bandgap (1.35eV) iron-doped InP permits the device to be oriented such that the light enters through the substrate. In this paper we examine the impact of the buffer layer on the underlying lattice-matched InGaAs device. 0.74eV InGaAs devices were produced in a variety of configurations both with and without buffer layers. All structures were characterized by reciprocal space x-ray diffraction to determine epilayer composition and residual strain. Electrical characterization of the devices was performed to examine the effect of the buffer on the device performance. The effect of the buffer structure depends upon where it is positioned. When near the emitter region, a 2.6x increase in dark current was measured, whereas no change in dark current was observed when it was near the base region.

Wilt, David M.↗

NASA NTRS1996

On buffer layers as non-reflecting computational boundaries

We examine an absorbing buffer layer technique for use as a non-reflecting boundary condition in the numerical simulation of flows. One such formulation was by Ta'asan and Nark for the linearized Euler equations. They modified the flow inside the buffer zone to artificially make it supersonic in the layer. We examine how this approach can be extended to the nonlinear Euler equations. We consider both a conservative and a non-conservative form modifying the governing equations in the buffer layer. We compare this with the case that the governing equations in the layer are the same as in the interior domain. We test the effectiveness of these buffer layers by a simulation of an excited axisymmetric jet based on a nonlinear compressible Navier-Stokes equations.

Hayder, M. Ehtesham↗

NASA NTRS1988

Characterization of ZrO2 buffer layers for sequentially evaporated Y-Ba-CuO on Si and Al2O3 substrates

Thin film high temperature superconductors have the potential to change the microwave technology for space communications systems. For such applications it is desirable that the films be formed on substrates such as Al2O3 which have good microwave properties. The use of ZrO2 buffer layers between Y-Ba-Cu-O and the substrate has been investigated. These superconducting films have been formed by multilayer sequential electron beam evaporation of Cu, BaF2 and Y with subsequent annealing. The three layer sequence of Y/BaF2/Cu is repeated four times for a total of twelve layers. Such a multilayer film, approximately 1 micron thick, deposited directly on SrTiO3 and annealed at 900 C for 45 min produces a film with a superconducting onset of 93 K and critical temperature of 85 K. Auger electron spectroscopy in conjunction with argon ion sputtering was used to obtain the distribution of each element as a function of depth for an unannealed film, the annealed film on SrTiO3 and annealed films on ZrO2 buffer layers. The individual layers were apparent. After annealing, the bulk of the film on SrTiO3 is observed to be fairly uniform while films on the substrates with buffer layers are less uniform. The Y-Ba-Cu-O/ZrO2 interface is broad with a long Ba tail into the ZrO2, suggesting interaction between the film and the buffer layer. The underlying ZrO2/Si interface is sharper. The detailed Auger results are presented and compared with samples annealed at different temperatures and durations.

Valco, George J.↗

NASA NTRS2002

Single Junction InGaP/GaAs Solar Cells Grown on Si Substrates using SiGe Buffer Layers

Single junction InGaP/GaAs solar cells displaying high efficiency and record high open circuit voltage values have been grown by metalorganic chemical vapor deposition on Ge/graded SiGe/Si substrates. Open circuit voltages as high as 980 mV under AM0 conditions have been verified to result from a single GaAs junction, with no evidence of Ge-related sub-cell photoresponse. Current AM0 efficiencies of close to 16% have been measured for a large number of small area cells, whose performance is limited by non-fundamental current losses due to significant surface reflection resulting from greater than 10% front surface metal coverage and wafer handling during the growth sequence for these prototype cells. It is shown that at the material quality currently achieved for GaAs grown on Ge/SiGe/Si substrates, namely a 10 nanosecond minority carrier lifetime that results from complete elimination of anti-phase domains and maintaining a threading dislocation density of approximately 8 x 10(exp 5) per square centimeter, 19-20% AM0 single junction GaAs cells are imminent. Experiments show that the high performance is not degraded for larger area cells, with identical open circuit voltages and higher short circuit current (due to reduced front metal coverage) values being demonstrated, indicating that large area scaling is possible in the near term. Comparison to a simple model indicates that the voltage output of these GaAs on Si cells follows ideal behavior expected for lattice mismatched devices, demonstrating that unaccounted for defects and issues that have plagued other methods to epitaxially integrate III-V cells with Si are resolved using SiGe buffers and proper GaAs nucleation methods. These early results already show the enormous and realistic potential of the virtual SiGe substrate approach for generating high efficiency, lightweight and strong III-V solar cells.

Ringel, S. A.↗

NASA NTRS1980

Portable heatable container

A container is provided which can be designed to heat its outer surface to sterilize it, or to heat its inner surface and any contents therewithin. In a container that self sterilizes its outer surface, the container includes a combustible layer of thermite-type pyrotechnic material which can be ignited to generate considerable heat, and a thin casing around the combustible layer which is of highly thermally conductive materials such as aluminum which can be heated to a high temperature by the ignited combustible layer. A buffer layer which may be of metal, lies within the combustible layer, and a layer of insulation such as Teflon lies within the buffer layer to insulate the contents of the container from the heat.

Yang, L. C.↗

NASA NTRS1988

New MBE buffer for micron- and quarter-micron-gateGaAs MESFETs

A new buffer layer has been developed that eliminates backgating in GaAs MESFETs and substantially reduces short-channel effects in GaAs MESFETs with 0.27-micron-long gates. The new buffer is grown by molecular beam epitaxy (MBE) at a substrate temperature of 200 C using Ga and As sub 4 beam fluxes. The buffer is crystalline, highly resistive, optically inactive, and can be overgrown with high quality GaAs. GaAs MESFETs with a gate length of 0.27 microns that incorporate the new buffer show improved dc and RF properties in comparison with a similar MESFET with a thin undoped GaAs buffer. To demonstrate the backgating performance improvement afforded by the new buffer, MESFETs were fabricated using a number of different buffer layers and structures. A schematic cross section of the MESFET structure used in this study is shown. The measured gate length, gate width, and source-drain spacing of this device are 2,98, and 5.5 microns, respectively. An ohmic contact, isolated from the MESFET by mesa etching, served as the sidegate. The MESFETs were fabricated in MBE n-GaAs layers grown on the new buffer and also in MBE n-GaAs layers grown on buffer layers of undoped GaAs, AlGaAs, and GaAs/AlGaAs superlattices. All the buffer layers were grown by MBE and are 2 microns thick. The active layer is doped to approximately 2 x 10 to the 17th/cu cm with silicon and is 0.3 microns thick.

Source record↗

NASA NTRS1977

GaAs solar cell development

The motivation for developing GaAs solar cells is based on their superior efficiency when compared to silicon cells, their lower degradation with increasing temperature, and the expectation for better resistance to space radiation damage. The AMO efficiency of GaAs solar cells was calculated. A key consideration in the HRL technology is the production of GaAs cells of large area (greater than 4 sg cm) at a reasonable cost without sacrificing efficiency. An essential requirement for the successful fabrication of such cells is the ability to grow epitaxially a uniform layer of high quality GaAs (buffer layer) on state-of-the-art GaAs substrates, and to grow on this buffer layer the required than layer of (AlGa)As. A modified infinite melt liquid phase epitaxy (LPE) growth technique is detailed.

Knechtli, R. C.↗

NASA NTRS1996

Characterization of SiGe/Ge heterostructures and graded layers using variable angle spectroscopic ellipsometry

Variable angle spectroscopic ellipsometry (VASE) has been used to characterize Si(x)Ge(1-x)/Ge superlattices (SLs) grown on Ge substrates and thick Si(x)Ge(1-x)/Ge heterostructures grown on Si substrates. Our VASE analysis yielded the thicknesses and alloy compositions of all layers within the optical penetration depth of the surface. In addition, strain effects were observed in the VASE results for layers under both compressive and tensile strain. Results for the SL structures were found to be in close agreement with high resolution x-ray diffraction measurements made on the same samples. The VASE analysis has been upgraded to characterize linearly graded Si(x)Ge(1-x) buffer layers. The algorithm has been used to determine the total thickness of the buffer layer along with the start and end alloy composition by breaking the total thickness into many (typically more than 20) equal layers. Our ellipsometric results for 1 (mu)m buffer layers graded in the ranges 0.7 less than or = x less than or = 1.0, and 0.5 less than or = x less than or = 1.0 are presented, and compare favorably with the nominal values.

Croke, E. T.↗

NASA NTRS1987

Semiconductor structure and devices

Semiconductor devices such as lasers which include a substrate with a channel therein with a clad layer overlying the substrate and filling the channel exhibit irregularities such as terraces in the surface of the clad layer which are detrimental to device performance. These irregularities are substantially eliminated by forming the channel in a surface of a buffer layer greater than about 4 micrometers thick on the substrate and forming the clad layer over the buffer layer and the channel. CW lasers incorporating the principles of the invention exhibit the highest output power in a single spatial mode and maximum output power which have been observed to date.

Dinkel, Nancy A.↗

NASA NTRS1975

Rough-to-smooth transition of an equilibrium neutral constant stress layer

A model is proposed for low-level atmospheric flows over terrains of changing roughness length, such as those found at the windward end of landing strips adjoining rough terrain. The proposed model is used to develop a prediction technique for calculating transition wind and shear-stress profiles in the region following surface roughness discontinuity. The model for the transition region comprises two layers: a logarithmic layer and a buffer layer. The flow is assumed to be steady, two-dimensional, and incompressible, with neutral hydrostatic stability. A diagram is presented for a typical wind profile in the transition region, obtained from the logarithmic and velocity defect profiles using shear stress calculated by relevant equations.

Logan, E., Jr.↗

NASA NTRS1989

Monolithic III-V/Silicon Spatial Light Modulator

Current techniques for growth of device-quality GaAs on silicon substrates enables fabrication of silicon-based version of photodiode-coupled spatial light modulator. Monolithic photodiode-coupled light-modulator array constructed on silicon substrate by growing InAs/GaAs multiple-quantum-wells over silicon PIN diode layer. Intermediate GaAs buffer layer confines attice-misfit dislocations to vicinity of silicon. Use of silicon makes available wider range of auxiliary on-chip signal-processing circuitry for coding and decoding of data, addition or subtraction of brightness levels, spatial reformatting, and rescaling.

Maserjian, Joseph↗

NASA NTRS1979

Electron Radiation Damage of (alga) As-gaas Solar Cells

Solar cells (2 cm by 2 cm (AlGa) As-GaAs cells) were fabricated and then subjected to irradiation at normal incidence by electrons. The influence of junction depth and n-type buffer layer doping level on the cell's resistance to radiation damage was investigated. The study shows that (1) a 0.3 micrometer deep junction results in lower damage to the cells than does a 0.5 micrometer junction, and (2) lowering the n buffer layer doping density does not improve the radiation resistance of the cell. Rather, lowering the doping density decreases the solar cell's open circuit voltage. Some preliminary thermal annealing experiments in vacuum were performed on the (AlGa)As-GaAs solar cells damaged by 1-MeV electron irradiation. The results show that cell performance can be expected to partially recover at 200 C with more rapid and complete recovery occurring at higher temperature. For a 0.5hr anneal at 400 C, 90% of the initial power is recovered. The characteristics of the (AlGa)As-GaAs cells both before and after irradiation are described.

Loo, R.↗

NASA NTRS1996

Epitaxial Growth of beta-Silicon Carbide (SiC) on a Compliant Substrate via Chemical Vapor Deposition (CVD)

Many lattice defects have been attributed to the lattice mismatch and the difference in the thermal coefficient of expansion between SiC and silicon (Si). Stacking faults, twins and antiphase boundaries are some of the lattice defects found in these SiC films. These defects may be a partial cause of the disappointing performance reported for the prototype devices fabricated from beta-SiC films. The objective of this research is to relieve some of the thermal stress due to lattice mismatch when SiC is epitaxially grown on Si. The compliant substrate is a silicon membrane 2-4 microns thick. The CVD process includes the buffer layer which is grown at 1360 C followed by a very thin epitaxial growth of SiC. Then the temperature is raised to 1500 C for the subsequent growth of SiC. Since silicon melts at 1415 C, the SiC will be grown on molten Silicon which is absorbed by a porous graphite susceptor eliminating the SiC/Si interface. We suspect that this buffer layer will yield less stressed material to help in the epitaxial growth of SiC.

Mitchell, Sharanda L.↗

NASA NTRS1991

Whiskerless Schottky diode

A Schottky diode for millimeter and submillimeter wave applications is comprised of a multi-layered structure including active layers of gallium arsenide on a semi-insulating gallium arsenide substrate with first and second insulating layers of silicon dioxide on the active layers of gallium arsenide. An ohmic contact pad lays on the silicon dioxide layers. An anode is formed in a window which is in and through the silicon dioxide layers. An elongated contact finger extends from the pad to the anode and a trench, preferably a transverse channel or trench of predetermined width, is formed in the active layers of the diode structure under the contact finger. The channel extends through the active layers to or substantially to the interface of the semi-insulating gallium arsenide substrate and the adjacent gallium arsenide layer which constitutes a buffer layer. Such a structure minimizes the effect of the major source of shunt capacitance by interrupting the current path between the conductive layers beneath the anode contact pad and the ohmic contact. Other embodiments of the diode may substitute various insulating or semi-insulating materials for the silicon dioxide, various semi-conductors for the active layers of gallium arsenide, and other materials for the substrate, which may be insulating or semi-insulating.

Bishop, William L.↗