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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

High voltage switch with cascaded transistor topology

A switching apparatus includes three or more series-connected transistors, and it further includes a balancing network. The balancing network includes a resistor network configured to divide a voltage from a voltage source across the series-connected transistors. The resistor network includes at least two resistive legs connected in parallel. In each resistive leg, two or more resistors are connected in series. The balancing network may further comprise at least one capacitive leg of series-connected capacitors connected across the series-connected transistors, and it may further comprise at least one leg of series-connected avalanche diodes connected across the series-connected transistors for overvoltage protection. In example embodiments, the series-connected transistors are JFETs. In other example embodiments, the series-connected transistors may be HEMTs or GaN transistors.

Gill, Lee↗
DOE OSTI2020

Soft-Switching Solid-State Transformer With Reduced Conduction Loss

Solid-state transformers (SSTs) are a promising solution photovoltaic (PV), wind, traction, data center, battery energy storage system (BESS), and fast charging electric vehicle (EV) applications. The traditional SSTs are typically three-stage, i.e., hard-switching cascaded multilevel rectifiers and inverters with dual active bridge (DAB) converters, which leads to bulky passives, low efficiency, and high electromagnetic interference (EMI). This article proposes a new soft-switching solid-state transformer (S4T). The S4T has full-range zero-voltage switching (ZVS), electrolytic capacitor-less dc link, and controlled dv/dt, which reduces EMI. The S4T comprises two reverse-blocking current-source inverter (CSI) bridges, auxiliary branches for ZVS, and transformer magnetizing inductor as a reduced dc link with 60% ripple. Compared with the prior S4T, an effective change on the leakage inductance diode is made to reduce the number of the devices on the main power path by 20% for significant conduction loss saving and retain the same functionality of damping the resonance between the leakage and resonant capacitors and recycling trapped leakage energy. The conduction loss saving is crucial, being the dominating loss mechanism in SSTs. Importantly, the proposed single-stage SST not only holds the potential for high power density and high efficiency but also has full functionality, e.g., multiport dc loads integration, voltage regulation, and reactive power compensation, unlike the traditional single-stage matrix SST. The S4T can achieve single-stage isolated bidirectional dc–dc, ac–dc, dc–ac, or ac–ac conversion. It can also be configured input-series output-parallel (ISOP) in a modular way for medium-voltage (MV) grids. Hence, the S4T is a promising candidate for the SST. The full functionality, e.g., voltage buck–boost, multiport, etc., and the universality of the S4T for the dc–dc, dc–ac, and ac–ac conversion are verified through the simulations and experiments of two-port and three-port MV prototypes based on 3.3 kV SiC MOSFETs in dc–dc, dc–ac, and ac–ac modes at 2 kV.

14 SOLAR ENERGY↗
DOE OSTI2022

Development of a 250 Degree C 15kV Supercascode Switch Using SiC JFET Technology

Tetra Corporation is developing a pulsed power drilling system for the geothermal industry. The system requires a high temperature switching technology to replace the existing technology based on Si thyristors with a temperature limit of 150 degrees C. This work focuses on the development of such switch based on a Supercascode configuration using SiC JFET technology. The development presented contains thermal models, packaging design and processes, circuit simulations and prototypes of both the Supercascode switch and the high temperature packaged SiC JFETs.

cascaded switch↗
DOE OSTI2020

High-Efficiency Model Predictive Control for Star-Connected Cascaded H-Bridge STATCOM Under Unbalanced Conditions

This paper presents a high-efficiency model predictive control (HMPC), which is enabled by a sorting approach based on dc capacitor voltages to significantly reduce the exponentially-increasing switching states in cascaded Hbridge (CHB) converters. In addition, a generic discrete-time prediction model for star-connected CHB static synchronous compensator is proposed to address the issues due to either grid and/or load unbalances. Both simulation and hardware-in-loop experimental results are presented to validate the feasibility and effectiveness of the proposed HMPC strategy.

Li, Yufei↗
DOE OSTI2025

A Sequential Model Predictive and Deep Reinforcement Learning-Based Controller for Distribution System Outage Mitigation under Hurricane Events

This paper proposes a proactive outage mitigation framework for power distribution networks to withstand hurricane-induced disruptions. It leverages Model Predictive Control (MPC) to identify safe lines for proactive switching during hurricanes, minimizing the risk of cascading failures and voltage violations. The switching strategies optimized by MPC are sequentially integrated with a Deep Reinforcement Learning agent using the Advantage Actor-Critic algorithm, enabling dynamic line switching to maximize connected buses and minimize voltage violations in real time. Using a probabilistic hurricane model, the framework predicts line failures and adapts to varying conditions to enhance grid resilience. Simulations on the IEEE 123-bus system demonstrate its effectiveness in maintaining high connectivity and minimizing disruptions. Real-time testing with an RTDS confirms the practicality and reliability of the proposed approach.

Selim, Alaa [University of Connecticut]↗
DOE OSTI2025

AC to AC Solid State Transformer with Bidirectional Switches

This report details the work of the 3-year project for the AC-to-AC Solid State Transformer with Bidirectional Switches project devoted to developing and demonstrated a Type I Solid State Transformer. This report details the design, fabrication, and evaluation of both three-phase and single-phase versions of this solid state transformer operating as a single module, modules in parallel, and modules in cascade. Additionally, this report details the fabrication and evaluation of custom Silicon Carbide bidirectional switches to enable this topology with a comparison between monolithically integrated bidirectional switches as well as co-packaged back-to-back unidirectional devices. Finally, results for custom-fabricated Fe 4 N/ferrite laminated toroidal cores for high frequency transformers are present.

42 ENGINEERING↗
DOE OSTI2022

Dynamic Load Inrush Current Mitigation in Islanded Microgrids Powered by Grid-Forming Inverters

Grid-forming inverters in a microgrid may trip due to high inrush current caused by a switched connection of an inductive load, e.g., a relatively large induction motor. The control scheme presented in this article includes virtual inertia control method superimposed on the cascaded controller. This article studies the impact of cascaded control scheme used for grid-forming inverter to mitigate the inrush current effects and enhance the inverter’s robustness for the safe connection of inductive and dynamic loads. Experimental tests are performed using the virtual inertia method for generating the reference angle for synchronous frame conversion. The experimental performance and sensitivity of the controller to different controller gain settings for a switched connection of an induction motor are discussed. The cascaded operation significantly mitigates the inrush currents while the inverters can perform a normal operation. The performance of the control method is tested in a laboratory-scale hardware setup of a 208V microgrid fed by 5kVA and 10kVA inverters, and the results are presented.

Gursoy, Mehmetcan↗
DOE OSTI2021

A Computationally Improved Heuristic Algorithm for Transmission Switching Using Line Flow Thresholds for Load Shed Reduction

We present a computationally improved heuristic algorithm for transmission switching (TS) to recover load shed. Research from the past showed that changing power system topology may control power flows and remove line congestion. Hence, TS may reduce the required load shed. One of the main challenges is to find a potential TS candidate in a suitable time. Here, we propose a novel heuristic method that is capable of finding the potential TS candidate faster than existing algorithms in literature. The proposed method is compatible with both the AC and DC optimal power flows (OPF). Three metrics are used to compare the proposed algorithm with the state-of-the-art from literature to show the speedup and accuracy achieved. The proposed method is implemented on the IEEE 30-bus system, PEGASE 89-bus system, IEEE 118-bus system, and Polish 2383- bus system. The results on the large-scale Polish 2383-bus system shows that the proposed algorithm is scalable to large real-world systems. Parallel computing is implemented to further improve the computational performance of the proposed algorithm.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2020

A Generic Multivector Model Predictive Control With Symmetric Pulse Pattern for Hybrid Multilevel Converters

This article presents a generic multivector model predictive control (MV-MPC) method that has the potential to be applied to all hybrid multilevel converters (HMCs). It first locates the reference voltage vector in the 120° oblique coordinate to select the three adjacent voltage vectors to be applied over one control cycle. Then, the current tracking is guaranteed through duty cycle optimization and dc capacitor voltages are balanced by evaluating possible switching sequences that belong to the voltage vectors with optimal duty cycles. At last, the optimal switching sequence with a symmetric five- or seven-segment pulse pattern is generated using an external modulator. Here, the proposed generic MV-MPC can significantly improve the quality of the output current, while achieving a constant equivalent switching frequency at the same time. Experimental studies on an all silicon carbide HMC prototype, i.e., an active neutral point clamped converter with cascaded H-bridge, are presented to validate the effectiveness of the proposed MV-MPC strategy.

42 ENGINEERING↗
DOE OSTI2026

Ferroelectric Fractals: Switching Mechanism of Wurtzite AlN

The advent of wurtzite ferroelectrics is enabling new ferroelectric devices for computer memory that have the potential to bypass the von Neumann bottleneck due to their robust polarization and silicon compatibility. However, the atomistic switching mechanism of wurtzites is still undetermined due to the limitations of density functional theory simulation size and experimental temporal and spatial resolution. Thus, physics-informed materials engineering to reduce coercive field and breakdown in these devices has been limited. In this work, the atomistic mechanism of domain wall migration and domain growth in aluminum nitride-based wurtzites is uncovered using molecular dynamics and Monte Carlo simulations. We reveal the anomalous switching mechanism of fast 1D single columns of atoms propagating from a slow-moving 2D fractallike domain wall. We find that the critical nucleus is a single aluminum ion that breaks its bond with one nitrogen and bonds to another nitrogen; this creates a cascade that flips atoms directly only in the same column, due to the extreme locality (sharpness) of the domain walls in wurtzites. We further show how the fractallike shape of the domain wall in the 2D plane breaks assumptions in the Kolmogorov, Avrami, and Ishibashi (KAI) model and leads to the anomalously fast switching in wurtzite structured ferroelectrics.

36 MATERIALS SCIENCE↗
DOE OSTI2020

An Improved Transmission Switching Algorithm for Managing Post-(N-1) Contingencies in Electricity Networks

In this presentation, we detail the shortcomings of existing transmission switching (TS) methodologies for preventing post-contingency loss of load in wide area electric power networks. Following that, we present a bi-level algorithm as an improvement to the state of the art. We show proof-of-concept level results that indicate computational viability, fast solutions, and the ability to pick the same best candidate as non computationally viable methods. Further, our method also minimizes load shedding after the contingency, thus enhancing the reliability and security of electricity supply. We also include a futuristic scenario of increased renewables and decreased natural gas sourced generators to show promising results. We grant permission for our presentation to be recorded and uploaded by the conference organizers.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2020

A Computational Efficient Space-Vector Modulation Scheme for A Hybrid Seven-Level Converter for Medium Voltage Grid-Tied Applications

In this paper, a fast space-vector modulation (SVM) scheme is proposed for a hybrid 7-level (7-L) converter, i.e., cascaded T-type converter and H-bridge converters, for grid-tied applications. Using oblique coordinate reference, the proposed SVM can quickly locate the switching triangle enclosing the reference vector in the 7-L space vector diagram. Then all available switching sequences and vector duty cycles are acquired by straightforward calculation without using any look-up tables, which significantly reduces the computational cost. The floating capacitor voltages are also stabilized by using the proposed SVM. Experimental studies on a scale-down prototype are presented in this work to validate the effectiveness of the proposed scheme.

Diao, Fei↗
DOE OSTI2022

A PWM Strategy for Cascaded H-bridges to Reduce the Loss Caused by Parasitic Capacitances of Medium Voltage Dual Active Bridge Transformers

In this paper, to reduce the power loss caused by the parasitic capacitances of medium voltage medium frequency transformers in a two-stage dc/ac converter, including a dual active bridge (DAB)-based dc/dc stage and a cascaded H-bridge (CHB)-based dc/ac stage, a PWM strategy is proposed for the dc/ac stage. For each H-bridge, by shifting the high switching frequency to one half-bridge and having the other half-bridge switching at the fundamental frequency of the ac voltage, equivalent frequencies of transformer terminal-to-ground voltages are reduced. As a result, the frequencies of charging and discharging current to the parasitic capacitance are reduced, and therefore the loss caused by the parasitic capacitances is reduced. Compared to the conventional phase-shift PWM, the proposed PWM strategy can reduce the parasitic capacitance loss by about 75%. Experimental test results of one phase in the 13.8 kV/ 100 kW converter prototype are provided to validate the approach.

Li, Haiguo↗
DOE OSTI2024

ARC-SAFE: Accelerated Response semiconducting Contactors and Surge Attenuation For DC Electrical systems (Final Scientific/Technical Report)

The landscape of power transmission and distribution is quickly evolving as more power conversion is done through power electronics and transmitted or distributed at medium voltage direct current (MVDC). As power electronics tend to store less energy and be less resilient to faults than conventional power transformers, a reliable and fast protection against faults is critical to protect power electronics (PE) based infrastructure, especially for medium- and high-voltage applications. This motivates the development of PE based protection circuits to replace slower contemporary electromechanical breakers. In this project a novel PE based MVDC circuit breaker is developed; the new design is comprised of 1) a normally-on leg made of commercially-available, cascaded SiC junction field effect transistors (JFETs) with a passive balancing network, and 2) a normally-off leg based on an optically-triggered gallium nitride (GaN) photoconductive semiconductor switch (PCSS). The normally-off leg was designed to be quickly turned on, to divert current to an auxiliary dissipative circuit, as the normally-on leg is turned off. This approach, using solid-state devices, was selected for a high-performance, fast-switching operation for the DC circuit breaker as compared to approaches that use slower mechanical switches. To be practical, the circuit breaker must have low conduction loss (low Ron) in the normally-on leg and fast coordinated triggering of the normally-off leg to avoid damage from inductive flyback, which could be considerable for long lengths of cable.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2022

Single DC Source Based Cascaded Multilevel Inverter

The objective of this project is to develop a high-efficiency solid-state transformer that converts a fixed DC voltage to a medium-voltage AC for utility distribution network connections without having the conventional low-frequency bulky transformers and switch gears. The initial target of 99% efficiency was achieved with the use of wide bandgap semiconductor devices using a proposal novel multilevel inverter. The medium-voltage was successfully tested at 7.2/12.47 kV phase/line voltage level for a 100-kW three-phase inverter.

14 SOLAR ENERGY↗
DOE OSTI2024

Multi-resonant switched capacitor power converter architecture

A switched-capacitor (SC) network in an SC converter is controlled to operate at varying resonant modes to achieve high conversion ratio efficiency, at a low circuit component count. These power converters are suited to numerous application areas including improving energy efficiency of data centers. A family of resonant switched capacitor (SC) converters with multiple operating phases are presented “Multi-Resonant SC Converters”. Described in detail are an 8-to-1 Multi-Resonant-Doubler (MRD) converter and a 6-to-1 Cascaded Series-Parallel (CaSP). The topology of these converters make them amenable to combining like units in parallel toward reaching higher power levels.

Ye, Zichao↗
DOE OSTI2024

Comprehensive AI-based System for Control, Sensor Estimation, and Fault Detection of Cascaded Multilevel Inverters

In this paper, an Artificial Intelligence-based (AI) system is proposed for an 11-level cascaded H-bridge multilevel inverter (MLI) with the aims of harmonic suppression and reliability enhancement. The system consists of three seamlessly integrated Neural Networks (NNs). First, a multilayer perceptron is used to generalize the optimal switching angles for selective harmonic elimination under non-equal DC voltages. Next, an autoencoder NN estimates the voltage sensor readings to address potential drifting. Finally, a perceptron NN detects inverter faults based solely on the output voltage of the MLI. Simulation scenarios were evaluated, and the results show that the proposed system provides a comprehensive solution for the robust operation of the MLI. The proposed solution is capable of minimizing the targeted harmonics orders with minimal impact on the fundamental voltage, even when the voltage sensor drifts. Furthermore, the inverter under fault conditions was successfully identified.

Rezende da Costa Reis Kimpara, Renata↗