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Young Electronics Company's new product is a testboard developed by the Jet Propulsion Laboratory as a tool for training and qualifying personnel in board assembly and in the art of soldering components without damaging boards or components. The boards are used for pre- employment testing and employee requalification.
Separations between views adjusted precisely for best results. Simple jig adjusted to set precisely, distance between right and left positions of camera used to make stereoscopic photographs. Camera slides in slot between extreme positions, where it takes stereoscopic pictures. Distance between extreme positions set reproducibly with micrometer. In view of trend toward very-large-scale integration of electronic circuits, training method and jig used to make training photographs useful to many companies to reduce cost of training manufacturing personnel.
An engineering evaluation was performed on the ExerGenie(r) exercise device to quantify its capabilities and limitations to address questions from the Constellation Program. Three subjects performed rowing and circuit training sessions to assess the suitability of the device for aerobic exercise. Three subjects performed a resistive exercise session to assess the suitability of the device for resistive exercise. Since 1 subject performed both aerobic and resistive exercise sessions, a total of 5 subjects participated.
Circuit converts number represented as two level signal on n-bit lines to series of pulses on one of two lines, depending on sign of number. Converter accepts parallel binary input data and produces number of output pulses equal to number represented by input data.
Performance scaling in pulsed inductive thrusters is discussed in the context of previous experimental studies and modeling results. Two processes, propellant ionization and acceleration, are interconnected where overall thruster performance and operation are concerned, but they are separated here to gain physical insight into each process and arrive at quantitative criteria that should be met to address or mitigate inherent inductive thruster difficulties. The effects of preionization in lowering the discharge energy requirements relative to a case where no preionization is employed, and in influencing the location of the initial current sheet, are described. The relevant performance scaling parameters for the acceleration stage are reviewed, emphasizing their physical importance and the numerical values required for efficient acceleration. The scaling parameters are then related to the design of the pulsed power train providing current to the acceleration stage. The impact of various choices in pulsed power train and circuit topology selection are reviewed, paying special attention to how these choices mitigate or exacerbate switching, lifetime, and power consumption issues.
A neural network circuit is provided having a plurality of circuits capable of charge storage. Also provided is a plurality of circuits each coupled to at least one of the plurality of charge storage circuits and constructed to generate an output in accordance with a neuron transfer function. Each of a plurality of circuits is coupled to one of the plurality of neuron transfer function circuits and constructed to generate a derivative of the output. A weight update circuit updates the charge storage circuits based upon output from the plurality of transfer function circuits and output from the plurality of derivative circuits. In preferred embodiments, separate training and validation networks share the same set of charge storage circuits and may operate concurrently. The validation network has a separate transfer function circuits each being coupled to the charge storage circuits so as to replicate the training network s coupling of the plurality of charge storage to the plurality of transfer function circuits. The plurality of transfer function circuits may be constructed each having a transconductance amplifier providing differential currents combined to provide an output in accordance with a transfer function. The derivative circuits may have a circuit constructed to generate a biased differential currents combined so as to provide the derivative of the transfer function.
A TSP from NASA Tech Briefs provided the solution to an electrical problem at a Florida museum. When a model train would not start without a jerk, a Marshall Space Flight Center development called pulse width control was adapted. The new circuit enables the train to start smoothly and reduces construction and maintenance costs. The same technology is also used in another hands-on exhibit. Applications of other TSPs are anticipated.
Impulse neural networks use pulse trains to communicate neuron activation levels. Impulse neural circuits emulate natural neurons at a more detailed level than that typically employed by contemporary neural network implementation methods. An impulse neural circuit which realizes short term memory dynamics is presented. The operation of that circuit is then characterized in terms of pulse frequency modulated signals. Both fixed and programmable synapse circuits for realizing long term memory are also described. The implementation of a simple and useful unsupervised learning law is then presented. The implementation of a differential Hebbian learning rule for a specific mean-frequency signal interpretation is shown to have a straightforward implementation using digital combinational logic with a variation of a previously developed programmable synapse circuit. This circuit is expected to be exploited for simple and straightforward implementation of future auto-adaptive neural circuits.
The present invention is a system for deriving direct digital indications of frequency and phase difference between two incoming pulse trains adaptable for collision avoidance systems or the like. A pair of radar beams are directed toward a target and corresponding beams returning therefrom are detected. A digital difference circuit forms a pulse train from the Doppler shift frequencies of each beam pair having a repetition rate functionally related to the difference in magnitude of the shift frequencies. Pulses from the pulse train are counted as a function of time. Visual indications thereof on display are correlative to target position relative to beams.
The Orion CEV Northstar ASIC (application- specific integrated circuit) project required a DDR (double data rate) memory bus driver/receiver (DDR PHY block) to interface with external DDR memory. The DDR interface (JESD79C) is based on a source synchronous strobe (DQS\) that is sent along with each packet of data (DQ). New data is provided concurrently with each edge of strobe and is sent irregularly. In order to capture this data, the strobe needs to be delayed and used to latch the data into a register. A circuit solves the need for training a DDR PRY block by incorporating a PVT-compensated delay element in the strobe path. This circuit takes an external reference clock signal and uses the regular clock to calibrate a known delay through a data path. The compensated delay DQS signal is then used to capture the DQ data in a normal register. This register structure can be configured as a FIFO (first in first out), in order to transfer data from the DDR domain to the system clock domain. This design is different in that it does not rely upon the need for training the system response, nor does it use a PLL (phase locked loop) or a DLL (delay locked loop) to provide an offset of the strobe signal. The circuit is created using standard ASIC building blocks, plus the PVT (process, voltage, and temperature) compensated delay line. The design uses a globally available system clock as a reference, alleviating the need to operate synchronously with the remote memory. The reference clock conditions the PVT compensated delay line to provide a pre-determined amount of delay to any data signal that passes through this delay line. The delay line is programmed in degrees of offset, so that one could think of the clock period representing 360deg of delay. In an ideal environment, delaying the strobe 1/4 of a clock cycle (90deg) would place the strobe in the middle of the data packet. This delayed strobe can then be used to clock the data into a register, satisfying setup and hold requirements of the system.
An investigation into the electrostatic phenomena associated with the manufacturing and handling of explosives is discussed. The testing includes measurement of the severity of the primary charge generation mechanism, triboelectric effects between dissimilar surfaces; refinement of equivalent circuits of the XM15/XM165 and E8 fuse trains; evaluation of the electrostatic spark discharge characteristics predicted by an equivalent circuit analysis; and determination of the spark ignition sensitivity of materials, components, junctions, and subassemblies which compose the XM15/XM165 and E8 units. Special studies were also performed. These special tests included ignition sensitivity of the complete XM15 fuse train when subjected to discharges through its entire length, measurement of electrostatic potentials which occur during the E8 foaming operation during fabrication, and investigation of the inadvertent functioning of an XM15 cluster during manufacturing. The test results are discussed and related to the effectiveness of suggested modification to reduce the electrostatic ignition sensitivity.
A system for deriving direct digital indications of frequency and phase difference between two incoming pulse trains adaptable for collision avoidance systems or the like. A pair of radar beams 152 and 152A are directed toward a target 153 and corresponding beams 154 and 154A returning therefrom are detected. A digital difference circuit 110 forms a pulse train 66 from the Doppler shift frequencies of each beam pair having a repetition rate functionally related to the difference in magnitude of the shift frequencies. Pulses from the pulse train are counted as a function of time. Visual indications thereof on display 144 are correlative to target position relative to beams 152 and 152A.
Pulse divide and determination network provides a logical determination of pulse presence within a data train. The network uses digital logic circuitry to divide positive and negative pulses, to shape the separated pulses, and to determine, by means of coincidence logic, if negative pulses are missing from the pulse train.
Mathematical model of proposed wind-tunnel facility represents wind-tunnel circuit and associated equipment in terms of lumped-parameter components. Requires less computational effort and computing time than full three-dimensional aerodynamic computer analysis of system with many volume elements. Approximates distributed nature of wind tunnel well enough to simulate steady-state and transient behavior for analysis of proposed control subsystems and for training of operators. Lumped-parameter circuit model represents wind tunnel and associated equipment. Implemented on analog or digital computers to simulate wind-tunnel performance without risk to operators or equipment.
A 30-cell stack was tested for 7200 hours. At 6000 hours the stack was successfully refilled with acid with no loss of performance. A second stack containing the advanced Configuration B cell package was fabricated and assembled for testing in 1985. A 200-kW brassboard inverter was successfully evaluated, verifying the design of the two-bridge ASCR circuit design. A fuel processing catalyst train was tested for 2000 hours verifying the catalyst for use in a 200-kW development reformer. The development reformer was fabricated for evaluation in 1985. The initial test plan was prepared for a 200-kW verification test article.
Circuit design and performance to convert DC INPUT voltage to pulse train with width proportional to input
Pulsed inductive plasma accelerators are spacecraft propulsion devices in which energy is stored in a capacitor and then discharged through an inductive coil. The device is electrodeless, inducing a plasma current sheet in propellant located near the face of the coil. The propellant is accelerated and expelled at a high exhaust velocity (order of 10 km/s) through the interaction of the plasma current with an induced magnetic field. The Faraday Accelerator with RF-Assisted Discharge (FARAD) thruster [1,2] is a type of pulsed inductive plasma accelerator in which the plasma is preionized by a mechanism separate from that used to form the current sheet and accelerate the gas. Employing a separate preionization mechanism in this manner allows for the formation of an inductive current sheet at much lower discharge energies and voltages than those found in previous pulsed inductive accelerators like the Pulsed Inductive Thruster (PIT). In a previous paper [3], the authors presented a basic design for a 100 J/pulse FARAD laboratory-version thruster. The design was based upon guidelines and performance scaling parameters presented in Refs. [4, 5]. In this paper, we expand upon the design presented in Ref. [3] by presenting a fully-assembled and operational FARAD laboratory-model thruster and addressing system and subsystem-integration issues (concerning mass injection, preionization, and acceleration) that arose during assembly. Experimental data quantifying the operation of this thruster, including detailed internal plasma measurements, are presented by the authors in a companion paper [6]. The thruster operates by first injecting neutral gas over the face of a flat, inductive acceleration coil and at some later time preionizing the gas. Once the gas is preionized current is passed through the acceleration coil, inducing a plasma current sheet in the propellant that is accelerated away from the coil through electromagnetic interaction with the time-varying magnetic field. Neutral gas is injected over the face of the acceleration coil through a fast-acting valve that feeds a central distribution manifold. The thruster is designed to preionize the gas using an RF-frequency ringing signal produced by a discharging Vector Inversion Generator (VIG). The acceleration stage consists of a multiple-turn, multiple-strand spiral induction coil (see Fig. 1, left panel) and is designed for operation at discharge energies on the order of 100 J/pulse. Several different pulsed power train modules can be used to drive current through the acceleration coil. One such power train is based upon the Bernardes and Merryman circuit topology, which restricts voltage reversal on the capacitor banks and can be clamped to eliminate current reversal in the coil. A second option is a pulse-compression-ring power train (see Fig. 1, right panel), which takesa temporally broad, low current pulse and transforms it into a short, high current pulse.
RC transistor circuit to indicate each pulse of pulse train and occurrence of nth pulse