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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Characterization of Engineered Pinholes in Dielectric Stacks of High-Performance Poly-Silicon Passivating Contacts

Passivating contact structures are expected to be implemented in > 50 % of industrially manufactured silicon photovoltaics produced over the next decade. One type of passivating contact utilizes a c-Si/dielectric/doped poly-Si layer stack. In cases where the dielectric layer/s are thick enough to impede tunneling of charge carriers, it was shown that disruptions (pinholes) in the dielectric are required to facilitate transport.[1] Pinholes in SiOx layers have typically been formed via high temperature annealing that allows localized breakup of this layer. This approach has drawbacks; 1) high temperature annealing increases cost and 2) pinhole formation is sensitive to both the SiOx thickness and wafer surface morphology making control of density and dimensions difficult. Recently, an alternative method of pinhole formation relying on metal assisted chemical etching (MACE) was shown to allow control over pinhole areal densities.[2] Such control is critical as both the density and dimensions of the pinholes determine saturation current density and contact resistivity. The contacts formed with the MACE process are known as polysilicon on locally etched oxide or PLEO and also result in low saturation current densities and low contact resistivity due to SiOx passivation and engineered pinhole enabled charge carrier transport, respectively. Photovoltaic devices with efficiencies greater than 20 % have recently been produced with these contacts, demonstrating the viability of contacts with engineered pinholes. Experimentally, preferential local collection of excess charge carriers has been observed and definitively connected to thermally induced pinholes in thick SiOx layers within c-Si/SiOx/poly-Si contact structures.[3] Recent work has shown that enhanced local collection of excess carriers can result from enhanced diffusion of dopants through pinholes in SiOx layers.[4] This study was restricted to simulation and characterization of poly-Si with the same dopant type as the c-Si substrates. In this work we focus our analysis on boron doped poly-Si with different stacks of dielectric layers (PLEO and PLENO where the N refers to a SiNy layer on top of the SiOx) on n-type crystalline silicon. This provides insight into how engineered pinholes affect charge collection across the p-n junction. Like previous observations of locally enhanced carrier transport through thermally induced pinholes, the EBIC images in Figure 1 shows that engineered pinholes in PLENO (1a) and PLEO (1b) also exhibit locally enhanced carrier transport at pinhole locations (bright spots in the images). We will also present detailed correlative nanoscale structural and chemical analysis using TEM imaging and EELS analysis with sample preparation guided by EBIC imaging. This allows us to connect the density and dimensions of engineered pinholes with charge carrier transport and measured photovoltaic device parameters. Our findings will accelerate the adoption of PLEO and PLENO contacts in industrially manufactured photovoltaic devices.

EBIC↗
DOE OSTI2022

Controlled Dielectric Breakdown to Form Pinhole Passivated Contacts

This contribution explores a low-temperature route to forming dielectric pinholes to form poly-Si/dielectric/c-Si passivated contacts. The method utilizes controlled dielectric breakdown to form nanoscale pinholes in a thick (non-tunnelling) dielectric which, when annealed, allows dopant atoms to pass from doped poly-Si through the dielectric and into the c-Si wafer forming conductive pathways. We show that the pinholes can be repassivated with dopants and H diffusion which results in increased PL signals after processing. The method can be expanded to optimized dielectric passivation stacks (not just a single layer) and can be formed in parallel over the faces of the wafer in selected areas (only under the grid).

controlled dielectric breakdown↗
DOE OSTI2023

Controlled Dielectric Breakdown to Form Pinhole Passivating Contacts

This contribution explores an alternate route to forming pinhole-based poly-Si/dielectric/c-Si passivating contacts. The method utilizes controlled dielectric breakdown or electroforming to produce nanoscale pinholes in a thick (non-tunnelling) dielectric which, when annealed, allows dopant atoms to pass from doped poly-Si through the pinholes and into the c-Si wafer, forming conductive pathways. We show that the pinholes lose passivation after electroforming but can be repassivated with a forming gas anneal. N-type contacts show contact resistivities of ~20 mOhm-cm2, but p-type contacts are ~100 mOhm-cm2. Devices show a distinct kink in the J-V curve indicative of a barrier to transport. The method can be expanded to optimized dielectric passivation stacks (not just thin, single layers) and can be formed in parallel over the faces of the wafer in selected areas (pinholes only under the grid lines).

CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SU↗
DOE OSTI2023

Pinhole electrical conductivity in polycrystalline Si on locally etched SiN$_y$/SiO$_x$ passivating contacts for Si solar cells

State-of-the-art monocrystalline Si (c-Si) solar cells require passivating contacts to achieve a high degree of charge-carrier separation and collection. In this work, we focus on boron-doped polycrystalline Si on locally etched silicon nitride/silicon oxide (PLENO) passivating contacts. In PLENO contacts, excellent surface passivation is provided by the ~10 nm dielectric bilayer, while pinholes in the dielectric bilayer, that are filled with doped polycrystalline Si, provide charge-carrier selectivity and transport. During PLENO fabrication, etch undercut in the dielectric bilayer occurs. Here, using electrical characterization and microscopies, we show that undercut causes pinholes to be electrically resistive in PLENO. A processing sequence that eliminates the undercut in the final PLENO structure results in electrically conductive pinholes with low contact resistivity.

14 SOLAR ENERGY↗
DOE OSTI2025

Self‐Assembled Monolayer Templating for Engineered Nanopinholes in Passivated Contact Solar Cells

We present a novel self-assembled monolayer (SAM)-based technique to make nanopinhole-enabled passivated contacts on silicon solar cells by tuning the SAM coverage area and etch selectivity. We deposit trimethyl-silyl Si(CH 3 ) 3 groups using hexamethyldisilazane (HMDS) as the precursor over passivating dielectric layers and their stacks (SiO 2 , SiN x , SiO 2 /SiN x ) and interrupt the HMDS attachment chemistry shortly before a full monolayer is formed on its surface. Subsequent etching in dilute HF produces pinholes through the dielectric layers due to the higher etch resistance of the SAM to HF etching. The pinhole areal density (10 4 –10 8 /cm 2 ) and size (10–1000 nm) can be tuned both by duration of HMDS attachment and HF etch time. Pinholes were characterized by atomic force microscopy, tetramethylammonium hydroxide (TMAH) selective etch, and Ag decoration by electroless plating. Polysilicon (poly-Si) passivated contacts enabled by pinholes were formed by subsequent deposition of doped amorphous silicon (a-Si:H) followed by thermal crystallization and dopant drive-in. At optimal areal pinhole density ≈10 7 /cm 2 , contacts exhibit both passivation and carrier transport via pinholes as evidenced by electron beam induced current, transmission line measurements, and carrier lifetime measurements. Solar cells based with these pinhole contacts show V oc = 723 mV and FF = 80.3%. The remaining SAM layer does not affect device performance.

14 SOLAR ENERGY↗
NASA NTRS1992

Ion collection from a plasma by a pinhole

Ion focusing by a biased pinhole is studied numerically. Laplace's equation is solved in 3-D for cylindrical symmetry on a constant grid to determine the potential field produced by a biased pinhole in a dielectric material. Focusing factors are studied for ions of uniform incident velocity with a 3-D Maxwellian distribution superimposed. Ion currents to the pinhole are found by particle tracking. The focusing factor of positive ions as a function of initial velocity, temperature, injection radius, and hole size is reported. For a typical Space Station Freedom environment (oxygen ions having a 4.5 eV ram energy, 0.1 eV temperature, and a -140 V biased pinhole), a focusing factor of 13.35 is found for a 1.5 mm radius pinhole.

Snyder, David B.↗
NASA NTRS1984

Numerical simulations of positively-biased probes and dielectric-conductor disks in a plasma

Plasma densities in the low-earth orbit range may be sufficient to cause difficulties for spacecraft operating at high voltages in this environment. The present investigation is concerned with the results of a continuing effort to develop a particle-in-cell (PIC), cylindrically-symmetric, 2-1/2 dimensional, self-consistent numerical simulation code. The simulation has the objective to explore the interactions of an ambient plasma with a conducting disk, which may be partially covered by a dielectric material. The disk and the surrounding dielectric material represent a hole in an insulator covering a conductor. Attention is given to a review of the simulation model, plain disk calculations, the disk and dielectric configuration, and the 'pinhole' effect.

Brandon, S. T.↗
DOE OSTI2026

Silicon pinhole strip defects and their impact on ATLAS Inner Tracker HV current measurement

In preparation for the High-Luminsity LHC (HL-LHC) [1], the ATLAS detector will undergo major detector upgrades, including the replacement of the current Inner Detector with the new all-silicon Inner Tracker (ITk) [2]. The ITk consists of a pixel detector close to the beamline surrounded by a large-area strip detector. During detector production, the electrical properties of silicon sensors and readout electronics must be characterized through a series of quality control (QC) and quality assurance tests. These tests ensure any defect is captured at the earliest possible stage. One such defect, callled a pinhole, occurs when the strip implant and the metal readout electrode are shorted through the intermediary dielectric layer. Notably, the introduction of pinholes during module assembly and pinhole effects on completed modules, especially on leakage current measurement circuitry, have never been studied. In this paper, we investigate the effect of such connections on the sensor leakage current measurements of completed modules and introduce new ways to locate pinholed strips. Here, with minor modifications to testing procedures, such defects are shown not to impede module testing or performance.

FOS: Physical sciences↗
DOE OSTI2023

High-Performance Passivating Contacts for Si PV Based on Engineered, Doped Nanopinholes through Dielectric Layers

We present a novel, industrially relevant method to fabricate high-performance poly-Si passivating contacts for Si PV. Passivating contacts based on SiOx/poly-Si layer stacks have been implemented in record-efficiency homojunction Si solar cells. In this technology, the carrier transport through a surface-passivating SiOx is enabled either by quantum-tunneling or nanopinholes. The doped poly-Si layer provides charge-carrier selectivity. Previously, the ISFH research group demonstrated a record 26.1% efficient Si homojunction cell, where transport pinholes in ~2 nm SiOx were produced by thermal breakdown at > 1000 degrees C, which is hard to control and is surface morphology-dependent. At room temperature, our new process uses electroless plating of Ag nanoparticles, followed by metal-assisted chemical etching. Nanogalvanic corrosion yields < 20 nm-wide nanopinholes in an insulating > 2 nm SiOx layer. The nanopinholes are filled by a heavily doped a-Si:H overlayer. We drive in the dopants into the Si wafer with subsequent high-temperature annealing. Preferential incorporation of dopants at pinhole locations results in nanoscale p+/n or n+/n junctions near the wafer interface. Each heavily-doped nanoscale pinhole junction collects and transports photogenerated carriers to the cell metal contacts. The density of the engineered nanopinholes can be tuned over a wide range which is critical for optimization of device performance. The same nanogalvanic corrosion principles can be applied to produce doped transport pinholes in well-passivating thick dielectric SiOx/SiNy stacks. Importantly, our process does not rely on thermal breakdown of the dielectric layers and can be applied to textured wafers resulting in Si solar cells with > 20% conversion efficiency.

dielectric layer↗
NASA NTRS1974

High voltage solar array experiments

The interaction between the components of a high voltage solar array and a simulated space plasma is studied to obtain data for the design of a high voltage solar array capable of 15kW at 2 to 16kV. Testing was conducted in a vacuum chamber 1.5-m long by 1.5-m diameter having a plasma source which simulated the plasma conditions existing in earth orbit between 400 nautical miles and synchronous altitude. Test samples included solar array segments pinholes in insulation covering high voltage electrodes, and plain dielectric samples. Quantitative data are presented in the areas of plasma power losses, plasma and high voltage induced damage, and dielectric properties. Limitations of the investigation are described.

Kennerud, K. L.↗
NASA NTRS1991

Transmittance measurements of ultra violet and visible wavelength interference filters flown aboard LDEF

A set of ten interference filters for the UV and VIS spectral region were flown on the surface of the Long Duration Exposure Facility (LDEF) Tray B-8 along with earth radiation budget (ERB) components from the Eppley Laboratory. Transmittance changes and other degradation observed after the return of the filters to Barr are reported. Substrates, coatings, and (where applicable) cement materials are identified. In general, all filters except those containing lead compounds survived well. Metal dielectric filters for the UV developed large numbers of pinholes which caused an increase in transmittance. Band shapes and spectral positioning, however, did not change.

Mooney, Thomas A.↗
NASA NTRS1983

Plasma polymerized high energy density dielectric films for capacitors

High energy density polymeric dielectric films were prepared by plasma polymerization of a variety of gaseous monomers. This technique gives thin, reproducible, pinhole free, conformable, adherent, and insoluble coatings and overcomes the processing problems found in the preparation of thin films with bulk polymers. Thus, devices are prepared completely in a vacuum environment. The plasma polymerized films prepared all showed dielectric strengths of greater than 1000 kV/cm and in some cases values of greater than 4000 kV/cm were observed. The dielectric loss of all films was generally less than 1% at frequencies below 10 kHz, but this value increased at higher frequencies. All films were self healing. The dielectric strength was a function of the polymerization technique, whereas the dielectric constant varied with the structure of the starting material. Because of the thin films used (thickness in the submicron range) surface smoothness of the metal electrodes was found to be critical in obtaining high dielectric strengths. High dielectric strength graft copolymers were also prepared. Plasma polymerized ethane was found to be thermally stable up to 150 C in the presence of air and 250 C in the absence of air. No glass transitions were observed for this material.

Yamagishi, F. G.↗
DOE OSTI2023

Loss Analysis and Performance Optimization Pathways of 729-mV Voc Si Solar Cells with Poly-Si on Locally-Etched Dielectric Passivating Contacts

In this article, the loss analysis of silicon solar cells with polysilicon on locally-etched dielectric passivating contacts with Voc=729.0 mV and efficiency=22.6% has been presented. Experimentally, nano-pinholes were introduced in SiO x (2.2 nm) and SiO x /SiN y (2.2 nm/8nm) stack using metal-assisted chemical etching (MACE). SunSolve and Quokka3 were used to simulate the experimental solar cell and investigate the optical and electrical power losses. Simulations suggest maximum power loss occurs due to recombination and resistive losses in the bulk (~0.76 mW/cm2) followed by power loss due to rear contact recombination (~0.35 mW/cm2). Recombination at the front surface also contributes to 0.24 mW/cm2. The effect of improving the bulk lifetime and lowering the recombination current density at the rear side on Voc, FF and hence, efficiency has been investigated. Further, advanced structures have been proposed to minimize recombination and parasitic absorption to achieve higher Voc and Jsc of the solar cells with locally-etched dielectric passivating contacts.

contacts↗
NASA NTRS2003

Collaboration of the NASA Glenn Research Center and Rolls-Royce Developed Thin Film Multilayered Dielectrics for Harsh Environments

The use of thin films to electrically insulate thin film sensors on engine components minimizes the intrusiveness of the sensors and allows a more accurate measurement of the environment. A variety of insulating films were investigated for preventing electrical shorting caused by insulator failure between the sensor and the component. By alternating layers of sputtered high-temperature ceramics, a sequence of insulating layers was devised that (1) prevents pinholes from forming completely through the insulator and (2) maintains high electrical resistivity at high temperatures. The total thickness is only a fraction of that needed for conventional insulating techniques. The Sensors and Electronics Technology Branch of the NASA Glenn Research Center has an in-house effort to develop thin film sensors for surface measurement in propulsion system research. Thin film sensors do not require special machining of the components on which they are mounted, and they are considerably thinner (less than 10 mm thick) than wire or foil sensors. The thin film sensors are thus much less disturbing to the operating environment and have a minimal impact on the physical characteristics of the supporting component. To further this research, NASA Glenn and Rolls-Royce (Derby, UK), with assistance from the Ohio Aerospace Institute (OAI) and the Akima Corporation, pursued a joint investigation using multilayered thin film dielectrics as a reliable insulator in harsh environments. The use of a multilayered scheme is thought to be promising for the fabrication of electrically insulating thin films. A major cause of conduction in thin film dielectrics is the presence of defects, such as pinholes, that propagate through the film to the underlying substrate surface. By alternating the insulating material, each new growth pattern would deviate from the previous one, eliminating direct pathways for conduction to the substrate. The film depositions and testing were conducted in the Instrument Research Laboratory at Glenn. The multilayered insulator test samples were made from alumina and stainless steel shims that were first covered with a sputtered underlayer of either yttria-stabilized zirconia or chromium carbide, and then overcoated with a sputtered top layer of alumina. An example of a test sample is shown in the following photograph. Each multilayered insulator sample was 5 mm thick, at least an order of magnitude thinner than conventional insulators. The insulating properties of the samples were tested in a high-temperature air oven to determine their suitability. The multilayer insulators tested showed a stabilized film at temperatures in excess of 800 C (1472 F). The underlying materials in these multilayers allow thermal expansion stresses produced during the heating to be graded. The chromium carbide-alumina multilayer had the best adhesion at high temperatures, presumably from the induced chemical bonding between the substrate and the chromium carbide underlayer. However, the zirconia-alumina multilayer proved to have slightly better insulating properties when adhering. The application of the zirconia-alumina insulator has been demonstrated on a nickel-alloy fan blade, as shown. The insulators using thin film sensors still need to be tested in a relevant high-temperature combustion environment.

Wrbanek, John D.↗
DOE OSTI2023

Loss Analysis and Performance Optimization Pathways of 729-mV VocSi Solar Cells with Poly-Si on Locally-Etched Dielectric Passivating Contacts

In this article, the performance analysis of a 22.5% efficient polysilicon on silicon oxide (poly-Si/SiOx) passivated contact solar cells with deliberately introduced pinholes using metal-assisted chemical etching (MACE) has been performed with the help of optical analysis using Sunsolve and electrical analysis using Quokka3. The power loss is maximum due to recombination and resistive losses in the bulk (~0.76 mW/cm2 ) followed by power loss due to rear contact recombination (~0.35 mW/cm2 ). Recombination at the front surface also contributes to 0.24 mW/cm2. The effect of improving the bulk lifetime and lowering the recombination current density at the rear side on Voc, FF and efficiency has been investigated.

MACE↗
NASA NTRS1999

The Conductor-Dielectric Junctions in a Low Density Plasma

A conductor-dielectric junction exposed to the space environment is a frequent spacecraft design feature. Due to spacecraft charging and/or solar array operation, the conductor can acquire a high potential with respect to the surrounding plasma. If this potential is positive the insulators adjacent to exposed conductors can collect current as if they were conductors themselves. This phenomenon, called snapover, results in a substantial increase in current collection, and may even result in a glow discharge if the potential is high enough. If a conductor has a negative potential, arcing can occur at the site of a junction. Both of these phenomena negatively affect spacecraft operation. To prevent negative consequences, the physical mechanisms of snapover and arc inception require investigation. In this paper, results are presented of an experimental and theoretical study of snapover, glow discharge, and arc phenomena for different materials immersed in argon or xenon plasmas. The effect of snapover is investigated for several metal-dielectric junctions: copper-teflon, copper-Kapton, copper-glass, aluminum-teflon, aluminum-Kapton, steel-teflon, anodized aluminum with pinholes, and copper-ceramics. I-V curves are measured and snapover inception voltages, essential parameters (increase in current and collection area due to secondary electrons), and glow discharge inception thresholds are determined. Optical spectra are obtained for glow discharges in both argon and xenon plasmas. These spectra provide information regarding atomic species entrapped in the glow region. Some spectral lines can be used to estimate plasma parameters in the discharge area. A video-camera and linear array were used to confirm that snapover inception is accompanied by very low intensity visible light emission. This result seems to be important for the estimate of the light pollution around spacecraft. Optical spectra (wavelengths 380-650 nm) of arcs are also obtained on a negatively biased chromic acid anodized aluminum plate immersed in low density argon and xenon plasmas. Analysis of these spectra confirms our earlier findings that aluminum atoms are ejected from the arc site. Moreover, it is found that chromium atoms are also quite abundant in the arc plasma. It is believed that the latter results contribute considerably to the understanding of processes of plasma contamination caused by arcing.

Vayner, Boris↗
DOE OSTI2025

Dielectric Engineering of ZnO@ZIF‐8 for High‐Performance Triboelectric Nanogenerators and Self‐Powered Humidity Sensors

Porous metal oxide–metal-organic framework (MO x @MOF) hybrids offer synergistic effects that enhance surface charge density, electronic structure, and textural properties, making them ideal for self-powered sensing applications. Here, uniform, and pinhole-free ternary porous ZnO–PTFE@ZIF-8 hybrid films are developed on room-temperature co-sputtered ZnO–polytetrafluoroethylene (PTFE) composite films, where ZnO serves as a self-sacrificial precursor to precisely regulate ZIF-8 (Zn-MeIm 2 ) growth through solvothermal methods. The resulting TENG achieves a high output power density of 0.67 mW cm −2 , attributed to the synergistic effects of fluorine-rich PTFE and methyl-functionalized ZIF-8, which enhance surface charge density and dielectric response. By tuning PTFE content in the ZnO–PTFE composite, the dielectric constant and triboelectric output is optimized. The ZP60@ZIF-8-based device also demonstrates excellent humidity sensing performance, with a wide detection range (20–99% RH) and ultrahigh sensitivity (R V % of 19 900%, R I % of 19 325% at 99% RH). These results position ZP@ZIF-8-based TENGs as promising platforms for next-generation self-powered sensors and smart wearable electronics.

42 ENGINEERING↗
NASA NTRS1980

Evaluation of charge control techniques on spacecraft thermal surfaces (electrostatic discharge study)

The charging and discharging characteristics of various dielectric materials commonly used on spacecraft were tested. The experimental apparatus and the calculations used to analyze the data generated during the testing are described. The test technique, results, and analysis used are presented. Indium tin oxide coated Teflon, Kapton, and quartz do not charge significantly. CTL 15 white paint shows no large charge build up. Pinholes in Teflon and Kapton increase the leakage through the sample and reduce the energy released in an arc. Conductive grids in Teflon and Kapton reduce the arc energy by two orders of magnitude over untreated samples. Extreme low temperatures (-195 C) do not significantly increase the arc energy of the gridded sample.

Robinson, P. A., Jr.↗