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Total ionizing dose irradiations were performed on a 22 nm fully-depleted silicon-on-insulator static random access memory. There is a strong well-bias effect in the TID response. Combined TID and SEE results are also presented.
Low-energy-electron-induced single-event upsets are observed in a 22 nm fully-depleted silicon-on-insulator process at nominal and higher supply voltages. Electron dose enhancement was also observed.
Total ionizing dose irradiations were performed on a 22 nm fully-depleted silicon-on-insulator static random access memory. There is a strong well-bias effect in the TID response. Combined TID and SEE results are also presented.
Total ionizing dose irradiations were performed on a 22 nm fully-depleted silicon-on-insulator static random access memory. There is a strong well-bias effect in the TID response. Combined TID and SEE results are also presented.
We will present the first ever single-event effects testing results on a 22 nm fully-depleted silicon-on-insulator test chip. The 128 MB SRAMs were irradiated with heavy ions and the results are compared to previous technology generations.
In addition to the widely recognized advantages of full dielectric isolation, e.g., reduced parasitic capacitance, transient radiation hardness, and processing simplicity, fully-depleted silicon-on-sapphire offers reduced floating body effects and improved thermal characteristics when compared to other silicon-on-insulator technologies. The properties of this technology and its potential impact on advanced VLSI circuitry will be discussed.