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We describe an ongoing program to develop and demonstrate ultra-high performance SFQ VLSI technology to enable superconducting processors for petaFLOPS-scale computing.
We discuss the status and limitations of FLUX, and future plans for SFQ processors for a petalFLOPS machine.
In this paper, we review the state of the art of Nb circuit fabrication and discuss the requirements for significantly improving circuit density and speed.
Superconducting (SC) electronics have emerged as a promising platform for high-speed, energy-efficient computing and quantum information processing. This work, centered on NbTiN, presents recent advances in material science and fabrication methods leading to significant improvements in performance, scalability and vertical integration. We specifically report on fabrication and characterization of key components, including Josephson junctions (JJs), flux trapping structures and SC interconnects. Together, these efforts represent critical steps towards realizing practical, complex, dense and large-scale SC integrated circuits.
Although superconducting qubits have emerged as a leading technology platform for quantum computing through large improvements in device coherence times and gate fidelity in recent years, the presence of defects and impurities at the interfaces and surfaces in the constituent materials continue to limit performance and serve as a critical barrier in achieving scalable quantum systems. Understanding and eliminating these sources of quantum decoherence in superconducting qubit devices requires dedicated studies aimed at establishing robust structure-property relationships that will enable researchers to target and eliminate defects strategically. As part of the Superconducting Materials and Systems (SQMS) center, we have extensively employed state-of-the-art materials characterization techniques, including scanning/transmission electron microscopy, secondary ion mass spectrometry, atom probe tomography, x-ray diffraction, and x-ray photoelectron spectroscopy in conjunction with device measurements to elucidate such relationships. In this talk, I will discuss some of our recent findings, including linking atomic defects to microwave loss in surface oxides, linking impurities in the Josephson Junction to qubit parameters, and linking low temperature precipitates to device performance. By applying these insights, we have been able to strategically develop and implement mitigation strategies for reliable fabrication of high coherence superconducting qubits.
Although superconducting qubits have emerged as a leading technology platform for quantum computing through large improvements in device coherence times and gate fidelity in recent years, the presence of defects and impurities at the interfaces and surfaces in the constituent materials continue to limit performance and serve as a critical barrier in achieving scalable quantum systems. Understanding and eliminating these sources of quantum decoherence in superconducting qubit devices requires dedicated studies aimed at establishing robust structure-property relationships that will enable researchers to target and eliminate defects strategically. As part of the Superconducting Materials and Systems (SQMS) center, we have extensively employed state-of-the-art materials characterization techniques, including scanning/transmission electron microscopy, secondary ion mass spectrometry, atom probe tomography, x-ray diffraction, and x-ray photoelectron spectroscopy in conjunction with device measurements to elucidate such relationships. In this talk, I will discuss some of our recent findings, including linking atomic defects to microwave loss in surface oxides, linking impurities in the Josephson Junction to qubit parameters, and linking low temperature precipitates to device performance. By applying these insights, we have been able to strategically develop and implement mitigation strategies for reliable fabrication of high coherence superconducting qubits.
Superinductors have become a crucial component in the superconducting circuit toolbox, playing a key role in the development of more robust qubits. Enhancing the performance of these devices can be achieved by suspending the superinductors from the substrate, thereby reducing stray capacitance. Here, we present a fabrication framework for constructing superconducting circuits with suspended superinductors in planar architectures. To validate the effectiveness of this process, we systematically characterize both resonators and qubits with suspended arrays of Josephson junctions, ultimately confirming the high quality of the superinductive elements. In addition, this process is broadly compatible with other types of superinductors and circuit designs. Furthermore, our results not only pave the way for scalable superconducting architectures utilizing superinductors but also provide the primitive for future investigation of loss mechanisms associated with the device substrate.