Modeling integrated circuits for computing
Integrated circuit models for computer analysis and design
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Integrated circuit models for computer analysis and design
A general form of a comprehensive reliability modeling rationale was formulated for the integrated circuit. Integrated device failure models amenable to long term applications were investigated.
Black box modeling of linear integrated circuits for computer analysis in frequency domain
Computer oriented modeling of integrated circuits - algorithms for dichotomous presentation of active networks
Three digital simulation techniques for MOS integrated circuit faults were examined. These techniques embody a hierarchy of complexity bracketing the range of simulation levels. The digital approaches are: transistor-level, connector-switch-attenuator level, and gate level. The advantages and disadvantages are discussed. Failure characteristics are also described.
Mathematical models represent single-event upset in bipolar memory chips. Physics of single-event upset in integrated circuits discussed in theoretical paper. Pair of companion reports present mathematical models to predict critical charges for producing single-event upset in bipolar randomaccess memory (RAM) chips.
A code for designing magnetic bearings is described. The code generates curves from magnetic circuit equations relating important bearing performance parameters. Bearing parameters selected from the curves by a designer to meet the requirements of a particular application are input directly by the code into a three-dimensional finite element analysis preprocessor. This means that a three-dimensional computer model of the bearing being developed is immediately available for viewing. The finite element model solution can be used to show areas of magnetic saturation and make more accurate predictions of the bearing load capacity, current stiffness, position stiffness, and inductance than the magnetic circuit equations did at the start of the design process. In summary, the code combines one-dimensional and three-dimensional modeling methods for designing magnetic bearings.
As microelectronics are scaled in to the deep sub-micron regime, users of advanced technology CMOS, particularly in high-reliability applications, should reassess how scaling effects impact long-term reliability. An experimental based reliability study of industrial grade SRAMs, consisting of three different technology nodes, is proposed to substantiate current acceleration models for temperature and voltage life-stress relationships. This reliability study utilizes step-stress techniques to evaluate memory technologies (0.25mum, 0.15mum, and 0.13mum) embedded in many of today's high-reliability space/aerospace applications. Two acceleration modeling approaches are presented to relate experimental FIT calculations to Mfr's qualification data.
Adaptation of models for minority carrier devices, and applicability in computer design evaluation studies of integrated circuits
A circuit model for an existing silicon integrated bipolar junction transistor (IBJT) is used to evaluate presently achievable high frequency circuit performance. The relationship between circuit model and processing parameters are semi-quantitatively explored to make predictions on the frequency response, which can be achieved through realistic device fabrication modifications. A new figure of merit is introduced, which is defined as the signal frequency at which an integrated bipolar junction transistor can deliver a power gain of G. The most sensitive parameter influencing attainable high frequency IBJT performance is base resistance.
The relationship of integrated circuit (IC) cost to electronic system cost is developed using models for integrated circuit cost which are based on design/fabrication approach. Emphasis is on understanding the relationship between cost and volume for custom circuits suitable for NASA applications. In this report, reliability is a major consideration in the models developed. Results are given for several typical IC designs using off the shelf, full custom, and semicustom IC's with single and double level metallization.
The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500 C durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.
The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500 degrees Celsius durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.
Numerical simulations of the two-dimensional temperature distributions for a typical GaAs MMIC circuit are conducted, aiming at understanding the heat conduction process of the circuit chip and providing temperature information for device reliability analysis. The method used is to solve the two-dimensional heat conduction equation with a control-volume-based finite difference scheme. In particular, the effects of the power dissipation and the ambient temperature are examined, and the criterion for the worst operating environment is discussed in terms of the allowed highest device junction temperature.
Hall thrusters exhibit characteristic discharge voltage and current oscillations during steady-state operation. The lower frequency breathing-mode current oscillations are inherent to each thruster and could impact thruster operation and power processing unit (PPU) design. The design of the discharge output filter, in particular, the output capacitor is important because it supplies the high peak current oscillations that the thruster demands. However, space-rated, high-voltage capacitors are not readily available and can have significant mass and volume. So, it is important for a PPU designer to know what is the minimum amount of capacitance required to operate a thruster. Through Simulation Program with Integrated Circuit Emphasis modeling and electrical measurements on the Hall Effect Rocket with Magnetic Shielding thruster, it was shown that the harness impedance between the power supply and the thruster is the main contributor towards generating voltage ripple at the thruster. Also, increasing the size of the discharge filter capacitor, as previously implemented during thruster tests, does not reduce the voltage oscillations. The electrical characteristics of the electrical harness between the discharge supply and the thruster is crucial to system performance and could have a negative impact on performance, life and operation.
Hall thrusters exhibit characteristic discharge voltage and current oscillations during steady-state operation. The lower frequency breathing-mode current oscillations are inherent to each thruster and could impact thruster operation and power processing unit (PPU) design. The design of the discharge output filter, in particular, the output capacitor is important because it supplies the high peak current oscillations that the thruster demands. However, space-rated, high-voltage capacitors are not readily available and can have significant mass and volume. So, it is important for a PPU designer to know what is the minimum amount of capacitance required to operate a thruster. Through Simulation Program with Integrated Circuit Emphasis modeling and electrical measurements on the Hall Effect Rocket with Magnetic Shielding thruster, it was shown that the harness impedance between the power supply and the thruster is the main contributor towards generating voltage ripple at the thruster. Also, increasing the size of the discharge filter capacitor, as previously implemented during thruster tests, does not reduce the voltage oscillations. The electrical characteristics of the electrical harness between the discharge supply and the thruster is crucial to system performance and could have a negative impact on performance, life and operation.
Goal: Enable anyone to SPICE-model and design 500 °C durable integrated circuits for their intended application.
Goal: Enable anyone to SPICE-model and design 500 °C durable integrated circuits for their intended application.