Gate-Driver Integrated Junction Temperature Estimation of SiC MOSFET Modules
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With this final report, the combined team of the University of Arkansas (UA), University of Illinois, Urbana-Champaign (UIUC), Wolfspeed, Caterpillar, and Ampaire have successfully met all of their project objectives. Noteworthy for the heavy equipment portion of the project with Caterpillar is that the team made its project milestones two years into the project by designing a power dense motor drive for a permanent magnet synchronous machine. Upon finding out that Caterpillar had pivoted to switched-reluctance machines (SRMs), the team subsequently redesigned and implemented the SRM drive with a coolant temperature of 105°C! The other major task that the UA, UIUC, and Wolfspeed teams took on was the design of a PMSM drive for a hybrid aircraft that was flown on Feb. 20, 2023 by Ampaire after extensive testing and evaluation. While there were also technical objectives in thermal management, integrated gate drivers, reliability studies, and high temperature capacitors with integrated bussing, each of these have been fully reported on in quarterly reports. In brief, advances in thermal management and high temperature capacitors were utilized in order to achieve a 105°C motor drive. The integrated gate driver work resulted in a higher density drive with no loss of efficiency. Most of the last year, during a no-cost extension, was spent waiting for the Ampaire motor drive to be tested (outside of our project). Many months passed with the device just sitting in California while the company dealt with battery-related issues. This delayed the integration and testing activities until Fall 2022. Once those began, then the process took about 4-5 months to complete culminating in the test flight in Feb. 2023. By providing technical advances and integration into final platforms, the barrier to economic impact has been lowered. This project benefits the public by overcoming key technical barriers to electrified and hybrid electric heavy equipment and aircraft. This, in turn, leads to lower greenhouse gas emissions and a cleaner environment. This final report summarizes the integrated gate driver work and the Ampaire hybrid electric aircraft integration and test flight efforts. All other information has been previously reported in quarterly reports. A summary of the motor drives created during this project is provided along with a listing of publications.
This paper proposes and demonstrates a real-time condition monitoring method using gate driver integrated sensing circuits and sensor fusion algorithms. Power device on-state voltage (VDSon) measurement and junction temperature (Tj) sensing circuits with high noise immunity are built and integrated into an adaptive gate driver circuit for power modules. Considering the inherently noisy measurement environment of power converters, VDSon together with several other measurements are fused together to provide accurate descriptions of the stress and degradation of each power device. Furthermore, the gate driver circuit can actively control the turn-on gate voltage (VGSon) for each device based on the stress and degradation state. The proposed sensing circuits and power device condition assessment algorithms are implemented in a 75 KVA grid-tied power converter. This paper focuses on the sensing circuits hardware designs and testing in grid-tied power converter prototype and device stress index generation. More comprehensive results on the device state of health index generation will be presented in future work.
Lateral gallium nitride (GaN) high-electron-mobility transistors (HEMTs) present better electrical characteristics compared to silicon or silicon carbide devices such as high switching speed and low gate charge, but also present additional challenges on the module design. Here, this paper discusses a high-density GaN power module with double-sided cooling, low inductance, on-package decoupling capacitors, and integrated gate drivers. The GaN dies as well as the gate drive are sandwiched between the printed circuit board (PCB) and direct bonded copper (DBC) substrate to achieve compact loop and double-sided cooling effect. Design considerations and thermal performance are analyzed. A module assembly procedure is presented utilizing the layer-by-layer attachment process. Finally, a 2.7 cm x 1.8 cm half-bridge GaN power module is fabricated and tested, achieving a low power-loop inductance of 1.03 nH, and the overshoot voltage of the switching waveform is less than 5% under a 400-V/25-A double-pulse test. The thermal resistance is 0.32 K/W, verified by simulation and experimental results. The design and assembly process can be generalized and applied to high power applications to achieve high power density and high performance.
This article presents the design and analysis of a double-side-cooled printed circuit board (PCB) embedded silicon carbide (SiC) MOSFET half-bridge package with low loop inductances and an integrated gate driver. The 1.2 kV SiC MOSFET dies used in the half-bridge package are embedded in the PCB using AT&S's patented technique. The dies are cooled and electrically connected to traces in the PCB through copper-filled microvias. The design methodology accounts for both electrical and thermal performance, limiting the power-loop inductance to 2.3 nH and the maximum package temperature to less than the 175 °C limit. The integration of the gate drive circuitry allows for a high power density and 2.2 nH gate-loop inductances. At 0.12 K/W, the measured junction-to-case thermal resistance with double-sided cooling is 57% lower than that of a TO-247 package. Under similar operating conditions, the PCB-embedded half-bridge package also achieves a 5.6 times lower voltage overshoot and a 0.5% higher peak efficiency than a TO-247-based half-bridge. This article reports the first demonstration of PCB-embedded 1.2 kV SiC MOSFET packages in buck, boost, and ac–dc converters. Furthermore, the prototype three-phase ac–dc converter for an electric vehicle on-board charger is composed of six PCB-embedded half-bridge packages and achieves an efficiency of 98.2% and a power density of 182 W/in 3 .
A wide range of utility applications require controllable switches with features such as high-voltage (HV) blocking and high-current carrying capacity especially at high pulse width modulation (PWM) frequency. Low and medium voltage utility applications such as motor drives and flexible AC transmission systems (FACTS) as well as solid state transformers (SST) could also benefit from a low-cost HV switching module. Wide band gap (WBG) semiconductors such as SiC and GaN MOSFETs are considered to be the present and next generation device choices, although they have their own limitations. For relatively HV applications with demanding thermal management, SiC is still the only choice, and GaN dominates the low voltage regime. This manuscript proposes a new half bridge power MOSFET module that is suitable for conventional H-bridge of multilevel configurations used in HV applications. Constructed from bare SiC dies, this half bridge module takes advantage of (1) optimized MOSFET placement inside the module, (2) customized heat exchanger, manifold and cooling, (3) integrated gate driver module with PWM over wi-fi to eliminate the need for low voltage signals, (4) wireless power transfer (WPT) enabled gate driver and other ancillary circuits, (5) and the option to incorporate an onboard state of health (SOH) estimator module onboard. The entire architecture has been designed and built at National Renewable Energy Laboratory (NREL), Golden, CO.
A wide range of utility applications require controllable switches with features such as high-voltage blocking and high-current carrying capacity, especially at high pulse width modulation (PWM) frequency. Low- and medium-voltage utility applications such as motor drives and flexible AC transmission systems as well as solid state transformers could also benefit from a low-cost high-voltage switching module. Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) metal oxide semiconductor field effect transistors (MOSFETs) are considered to be the present and next-generation device choices, although they have limitations. For relatively high-voltage applications with demanding thermal management, SiC is still the only choice, and GaN dominates the low-voltage regime. This manuscript proposes a new half-bridge power MOSFET module that is suitable for conventional H-bridge of multilevel configurations used in high-voltage applications. Constructed from bare SiC dies, this half-bridge module takes advantage of (1) optimized MOSFET placement inside the module, (2) customized heat exchanger, manifold, and cooling, (3) integrated gate driver module with pulse width modulation (PWM) over wi-fi to eliminate the need for low-voltage signals, (4) wireless power transfer (WPT)-enabled gate driver and other ancillary circuits, (5) and the option to incorporate an onboard state-of-health (SOH) estimator module. The entire architecture has been designed and built at the National Renewable Energy Laboratory (NREL) in Golden, CO.
The demand for grid-interface converter with flexible dc bus is driven by the fast development of energy storage system (ESS), electric vehicle (EV) charging system, and versatile residential load. This paper first proposes a two-stage intelligent power stage (IPS) unit for future grid-interface applications. To achieve zero common-mode (CM) voltage emissions, step-up and step-down voltage gain, a 3-level four-switch buck-boost (3-L FSBB) dc-dc converter is adopted with fully zero voltage switching (ZVS). In one IPS unit, an advanced fiberoptic communication with sub-nanosecond synchronization is developed for different enhanced gate drivers. Moreover, an enhanced gate driver integrated current and voltage sensors is designed for monitoring and diagnostics. To achieve a whole low-profile design, three 12 oz heavy copper planar ac inductors are designed and implemented. Finally, a 75 kVA IPS unit was built to verify both the thermal and electrical design.
The goal of this project is to develop packaging technologies for making high-temperature, high-density, and low-profile wide-bandgap (WBG) power electronics modules for electric drives. These modules are aimed at enabling the DOE’s University Consortium to reach its 2025 inverter targets of ≥ 100 kW/L and ≤ 2.7 $/kW. The specific objectives are to: design and fabricate SiC half-bridge power modules with double-sided cooling and parasitic inductances < 5 nH, heat flux density > 400 W/cm 2 , and working junction temperature of 200 o C; design, fabricate, and deliver a gate driver with double-sided cooled modules for the construction of a 100 kW/L inverter at Oak Ridge National Lab; and design and prototype intelligent gate drivers with integrated current sensor and a low-profile DC-DC power supply with air-core transformer for testing power modules at 200 o C junction temperature. We followed an iterative technical approach of design, simulation, fabrication, and testing of various versions of modules, current sensors, and power supply. The state-of-the-art silicon carbide devices rated at 1.2 kV and 149 A were packaged by sintered-silver bonding on an aluminum nitride direct-bond-copper substrate for high thermal conductivity, high working temperature, and high joint reliability. Porous silver posts were used to interconnect the device’s source pads to the other direct-bond-copper substrate for low mechanical stresses, ease of manufacturing, and double-sided cooling. A current sensor based on package parasitic inductance was developed to measure switching current. A dynamic feedback scheme was developed to compensate the effect of parasitic resistance and temperature variation. A constant-current class-E dc-dc converter with air-core transformer was developed. Air-core transformer was used due to the unavailability of magnetic core at high temperatures. Gate driver and power supply were integrated with the double-side cooled, high temperature SiC power modules for testing the modules at 200 o C junction temperature. Double-pulse and continuous testing of the integrated technologies validated the design and fabrication of the three component technologies. Throughout the project, we overcame the challenge for design verification caused by low prototyping yield, which then helped train the graduate students, the future workforce, to learn the engineering know-how for low-cost manufacturing of reliable products. Below is a summary of the major accomplishments of this project: development of a prototyping process for fabricating double-side cooled (1200 V, 149 A) SiC phase-leg modules capable of working to 200 o C Tj; simulation and experimental verification of the improvement of thermo-mechanical reliability of the double-side cooled SiC phase-leg module by using rigid encapsulant; design and experimental validation of a current sensor based on package parasitic inductance and a compensation solution for eliminating the effect of parasitic resistance; design and experimental validation of a low-profile power supply with six-output air-core transformer for gate driver; functional demonstration of a SiC phase-leg module integrated with its gate driver, current sensor, and an air-core power supply at 200 o C Tj in a double-pulse switching test setup and Buck converter continuous test setup; successful completion of six PhD and two MS students who are or will work at Apple Inc., Tesla Inc., Wolfspeed Inc., Microchip Inc., Monolithic Power Systems Inc., and LG Magna Inc.
This Final Technical Report (FTR) summarizes the work conducted at the Center for Power Electronics Systems (CPES) under the Wide-Bandgap Generation (WBGen) fellowship and traineeship program established by the Advanced Manufacturing and Technologies Office (AMMTO) of the U.S. Department of Energy Office of Energy Efficiency and Renewable Energy (EERE) at Virginia Tech, which had as main objective to train the next generation of U.S. citizen power engineers with wide-bandgap (WBG) power semiconductor expertise, with the intent to aid in fulfilling the future workforce needs in this field. The latter was deemed of strategic importance given the fast-paced growth observed—and predicted—in the demand of this technical expertise, whose practitioners have become the enablers and executioners of the electrification transformation process that not just the U.S., but the whole world, is currently undergoing as it seeks for more effective and efficient ways to use energy. As such, the WBGen program set forth to achieve its educational goals, which in addition sought to broaden the range of WBG-based power electronics by conducting research and development on high-efficiency grid apparatus and high-efficiency electrical power systems, and to also enhance the power engineering curriculum by formalizing WBG-oriented design procedures replacing existent yet now obsolete design procedures developed for Silicon (Si) based power electronics. This effort led CPES to spearhead the development of a new major within The Bradley Electrical and Computer Engineering (ECE) Department at Virginia Tech, namely Electronic Power and Energy Systems (EPES), which coalesced power electronics and power systems courses to provide undergraduate students with a strong formation in the power engineering field, while creating a pipeline of graduate students that could pursue the WBG-based curriculum and conduct research at CPES. In all, in what is considered a true success, eight of the twenty WBGen fellows that graduated program were recruited from the ECE department undergraduate cohort. The traineeship emphasized as well, from its beginning, the partnership with industry and national laboratories, which took advantage of the successful industry consortium at CPES that has historically been formed by 80–90 power and energy companies working in close collaboration with the center. This gave WBGen fellows the accessibility and possibility to conduct internships at partner facilities during the summer months, focused solely on the evaluation, testing, and adoption of WBG devices, which were many times tightly related to their respective research work and plans. In addition, WBGen fellows conducted their main research work within the confines of research programs at CPES conducted with these industry partners, providing them with a unique opportunity to develop not just their technical expertise—while advancing their knowledge, but to also learn and practice a slew of skills needed for their professional growth. As such, the fellows tackled a variety of WBG-related research topics, from device reliability and capability aspects as well as packaging and integration, encompassing the use of advanced materials and new structures, current sharing challenges, and insulation systems, to advanced gate-drivers with integrated sensors and protection mechanisms and active current- and voltage-based control, to optimized layouts seeking to maximize the switching and power processing performance of these devices, to power processing solutions adopting Gallium-Nitride (GaN) and Silicon-Carbide (SiC) power semiconductors for a variety of applications; including radiation-hardened converters for space dc distribution systems, direct three-phase ac-to-ac power converters for aerospace systems, dc-ac inverters for automotive traction drives, high-frequency isolated dc-dc battery chargers also for heavy transportation systems, and medium-voltage dc-dc and dc-ac converters for distribution systems and future power grids. The WBGen program ultimately graduated a total of 20 power engineers, all experts on WBG-based power electronics, awarding 18 M.S. and 2 PhD degrees in the process. These fellows, all U.S. citizens, allowed CPES to increase the number of citizens students to 33 % at the peak of the program, as the traineeship made possible the recruitment of talent with more attractive graduate research assistantship (GRA) contracts. Unfortunately, the present U.S. citizen enrollment at CPES has declined back to historic levels—approximately 10 %, as the regular GRA rates are not competitive enough when compared with entry-level industry jobs. In all, WBGen fellows published a total of 7 peer-reviewed journal articles, 44 papers at international technical conferences, made 42 presentations at international technical conferences, and filed 4 invention disclosures and patent applications, which have since then been granted by the U.S. Patent and Trademark Office (USPTO). Their contribution to CPES, Virginia Tech, the United States, and the world, has been significant, and continues to yield results thanks to the exemplary career that the fellows have initiated at many of the partners of the program, which include Wolfspeed, Raytheon Technologies, Infineon, Lockheed Martin, Dominion Energy, Northrop Grumman, Rivian, Aerospace Corporation, Sandia National Laboratory, National Renewable Energy Laboratory, John Hopkins University, and Virginia Tech.
In this paper, the concept and prototype of an aging detector for silicon carbide (SiC) power metal oxide semiconductor field effect transistor (MOSFET) are proposed and described. It leverages the resonant peak values of gate-source voltage at different instants during the switching transients to decode the change of multiple aging indicators, such as the increases of on-state resistance and threshold voltage. Modeling-based analysis is conducted to support the idea. The detector can be fully integrated into gate drivers without any additional connection to the power stage and is functional during normal power stage operation. A prototype unit was built, and preliminary tests were conducted to validate the idea and the practicality of the detector.
The ongoing work involves 1) the identification and evaluation of various electric signals as indicators to module failure and precursors to aging, and 2) the development of corresponding detection techniques. In the current phase, 1) the increase of on-state resistance is selected as the precursor to the power cycle aging of silicon carbide power MOSFET modules based on review and rest data. 2) A detection method leveraging the gate voltage fluctuations magnitude during commutation transients to inform the on-state resistance increase is investigated which has the benefit of being able to be integrated into the gate driver. A dedicated detection circuit for implementation is designed and simulated and is currently in fabrication.
This work discusses a novel set of alternate implementations of isolated gate driver circuits for power electronic transistors. The proposed topologies for the driver have been designed specifically for SiC power MOSFET. Three different solutions are discussed, all of them providing the required gate turn-on and turn-off command signal with galvanic isolation, but also supplying power to the secondary side of the driver by means of magnetic transformers. The resulting solutions, all of them implemented with simple circuitry, enable the integration of the driver into the power cell, allowing for theoretical higher power density values in the final system. The principle of operation of the different solutions is discussed, and then the main relevant implementation details are presented. After that, the operation of the circuits is demonstrated experimentally, by testing a set of prototypes of these drivers. This provides a comprehensive design example that assesses the feasibility of the proposed solutions. Finally, the main results of the performance of the three gate drivers, on an SiC MOSFET-based prototype are presented and compared.
Current prognostics for life expectancy of power semiconductors utilize off-line measurements of the on-state resistance. Presented is a half-bridge (HB) on-state voltage (VON) sensor capable of being utilized for in-situ measurements enabling continuous and real-time monitoring of the on-state resistance. The design provides a single VON measurement output that contains independent VON information of both high and low side devices in a HB leg. The measurement output is referenced from the middle point of the HB and combines the two complementary VON sensing outputs. This system reduces the number of components, required number of analog signal processing circuits, and ADC channels for in-situ health monitoring of a power electronics system. These reductions will facilitate integration of the VON sensor with the gate driver board and achieve low system profile. The experimental results demonstrate the proposed VON measurements while switching with inductive and resistive loads.
Background Accurate estimation of net ecosystem exchange of CO 2 fluxes (Fc) is essential for understanding carbon cycle processes and assessing ecosystem carbon budgets. However, conventional modeling approaches often emphasize temporal dynamics while overlooking the pronounced spatial heterogeneity within the footprint of eddy covariance (EC) towers, potentially limiting predictive accuracy and interpretability of Fc estimates. To address this challenge, we developed a spatiotemporal model that integrates high-resolution footprint-weighted spatial information with sequential environmental drivers. Results The integrated model combines a deeper graph convolutional network to characterize fine-scale spatial variability within EC footprints and a gated recurrent unit network to capture temporal dependencies in biophysical conditions. Using multi-year flux tower observations, remote sensing vegetation indices and footprint modeling, we evaluate the proposed method across three land cover types. This spatiotemporal model consistently outperforms temporal-only and spatial-only baselines, achieving the highest overall accuracy (R 2 = 0.9569) and the lowest RMSE (1.8128 μmol m −2 s −1 ) and MAE (1.1939 μmol m −2 s −1 ). Performance gains are particularly evident in ecosystems with strong vegetation heterogeneity, where spatial structure substantially modulates Fc variability. Conclusions This study demonstrates the importance of joint modeling spatial heterogeneity and temporal dynamics for improving Fc estimation and provides a robust method for advancing footprint-based Fc estimates across diverse ecosystems, supporting refined assessments of terrestrial carbon fluxes, and enhancing scientific foundations for carbon studies.
The project goal was to research, design and fabricate high-power-density, high-performance SiC power electronic modules for motor drive inverters in electric vehicles (EVs) to enable the subsequent motor drive to achieve a power density of 100 kW/l. EVs use electric motors instead of internal combustion engines as the prime mover, and their core components are semiconductor-based power electronic modules. Efficient power electronic modules play a vital role in power conversion systems. The performance of power modules directly affects the energy efficiency and overall performance of electric vehicles. Therefore, it is particularly important to develop power modules with high power density and high electrical performance that will perform reliably under EV environmental conditions. To achieve these goals, advanced electronic packaging technologies are required. This report describes a 5-year effort to integrate key aspects surrounding the basic power devices into the module itself to increase power density. These include sensing and sensing readout circuits, gate driver circuits, and two-sided cooling solutions.
Wide bandgap devices are key enablers for high power density traction inverters. A highly integrated wide bandgap (WBG) power module enables higher temperature operation, higher inverter efficiency and overall smaller die area with the same power delivery. However, it requires careful design of the power module to take advantage of all the superior material properties that silicon carbide (SiC) provides over conventional silicon (Si) Insulated Gate Bipolar Transistor (IGBT) based design. This project developed an efficient and densely packed SiC power module for an automotive traction inverter application. Extensive study was performed to select the best performing SiC die considering a wide range of temperature variation, suitability to integrate into target packaging, robust body diode performance and overall high electrical efficiency. Multiple design ideas were explored to achieve lower stray inductance for both power loop and signal loop, uniform current distribution, compact form factor, and very high thermal performance. The final power module package includes all six inverter switches in the same module (six-pack) with die sintered at both bottom and top surfaces utilizing high performance substrate to achieve high electrical and thermal performance. Two power module variants were developed using 900 V and 1200 V devices for operating at two different high voltage levels (> 600 V HV battery). Both power modules were comprehensively characterized, and high efficiency operation of the inverter was confirmed through analysis. Finally, a complete functional inverter was built with the 1200V power modules using other essential components (HV capacitors, gate driver board, controller board, current sensor, connectors etc.) and tested using GM’s standard test procedure. There are several challenges associated with adopting WBG devices for high voltage operation. In order to assess and mitigate those challenges, GM and subrecipients of this project have conducted multiple detailed studies. This includes phase current reconstruction using integrated Rogowski coil, device junction temperature estimation using on-state gate resistance, modeling and testing the effect of high voltage and fast switching on motor insulation and bearings, partial discharge inception voltage measurement under different environmental conditions. Findings of all these studies are summarized in this report.
Inertial Confinement Fusion produces energy from a burning plasma lasting a fraction of a nanosecond. Power plant designs based on Inertial Fusion Energy (IFE) will need to ignite targets 1-10 times a second, fired as projectiles into a chamber and delivering the driver to the target location. Driver asymmetry is known to impact ICF experiments at gain near unity and remains a candidate for primary yield degradation, and therefore fusion power plant energy output, for high-gain target designs. For a Fusion Power Plant (FPP), continuous and real-time monitoring of target performance provides an opportunity to stabilize or correct the target-driver registration. This requires x-ray and neutron imaging with a large field-of-view, sufficiently high resolution, fast analysis and to subtend a minimal solid angle. We introduce design criteria for such an imaging system that uses a coded aperture and time-gated, lens-coupled scintillators as a viable solution and outline the research steps required to field such a system. Integrating the imaging system into an IFE power plant as part of an active feedback loop could increase average power output by reducing the failure rate due to mis-aligned drivers with respect to the target.