The presence of deep levels in ion implanted junctions.
Deep trapping levels caused by ion implantation doping, discussing level effects on electrical characteristics of zinc implanted GaAs diodes
Hunsperger, R. G.↗
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Bilayer Ion Trap Design for 2D Arrays
Junctions are fundamental elements that support qubit locomotion in two-dimensional ion trap arrays and enhance connectivity in emerging trapped-ion quantum computers. In surface ion traps they have typically been implemented by shaping radio frequency (RF) electrodes in a single plane to minimize the disturbance to the pseudopotential. However, this method introduces issues related to RF lead routing that can increase power dissipation and the likelihood of voltage breakdown. Here, we propose and simulate a novel two-layer junction design incorporating two perpendicularly rotoreflected (rotated, then reflected) linear ion traps. The traps are vertically separated, and create a trapping potential between their respective planes. The orthogonal orientation of the RF electrodes of each trap relative to the other provides perpendicular axes of confinement that can be used to realize transport in two dimensions. While this design introduces manufacturing and operating challenges, as now two separate structures have to be precisely positioned relative to each other in the vertical direction and optical access from the top is obscured, it obviates the need to route RF leads below the top surface of the trap and eliminates the pseudopotential bumps that occur in typical junctions. Here in this paper the stability of idealized ion transfer in the new configuration is demonstrated, both by solving the Mathieu equation analytically to identify the stable regions and by numerically modeling ion dynamics. Our novel junction layout has the potential to enhance the flexibility of microfabricated ion trap control to enable large-scale trapped-ion quantum computing.
42 ENGINEERING↗
Design, Control and Application of Next Generation Qubits
Design, Control and Application of Next Generation Qubits Arun Bansil, Northeastern University (Principal Investigator) Claudio Chamon, Boston University (Co-Investigator) Adrian Feiguin, Northeastern University (Co-Investigator) Liang Fu, MIT (Co-Investigator) Eduardo Mucciolo, Univ. of Central Florida (Co-Investigator) Qimin Yan, Temple University (Co-Investigator) The quest for developing technologies for manipulating and storing information quantum mechanically is currently led by approaches that include Josephson-junctions, ion-traps, and qubits generated by defect spins in solids. Topological qubits, however, are inherently more robust to decoherence by environmental effects, and should be able to sprint ahead once practical barriers have been overcome. At the present stage of the development of the field, it is important to explore a variety of architectures and materials beyond the conventional paradigms in order to seed breakthroughs toward building a scalable quantum computer. Our comprehensive theoretical research program involved four interconnected thrusts as follows. • A materials discovery effort in two-dimensional compounds in search of materials to support Majorana zero modes and defect structures suitable as qubits. • Exploration of architectures for topological quantum computation by investigating both superconducting Majorana qubits, and robust platforms for braiding with new “meta-materials” built of arrays of Majorana qubits. • Investigation of properties of hybrid metal-organic qubits based on transition-metal centers in graphene, and molecular crystals of polyaromatic complexes with embedded transition-metal atoms. • Development of tensor-network and semiclassical approaches to study decoherence in the presence of random and dispersive spin baths, and NV centers in diamond. The full spectrum of theoretical and numerical approaches was used to address the goals of this project including first-principles, density-matrix-renormalization group, tensor networks, and data-driven high-throughput approaches using materials database and machine-learning.
36 MATERIALS SCIENCE↗
Design and fabrication of ion traps for low RF power dissipation
Large surface-electrode ion traps with multiple trapping regions and junctions are a natural approach to scaling trapped ion quantum computers, supporting the connectivity and ion counts necessary for complex quantum algorithms. However, a major hurdle in this scaling is on-chip power dissipation from the applied RF voltage, which increases at a rate between linear and cubic relative to trap size, depending on whether the losses are dielectric or Ohmic. Here, we present two versions of a trap with features designed to reduce both types of RF power dissipation. The first variant contains a raised RF electrode that increases the electrode–ground distance to reduce capacitance. Different DC voltage sources are demonstrated on this trap to show that technical noise before the filter remains the dominant source of voltage noise and therefore motional heating. The second variant additionally includes a method for removing dielectric from beneath the RF electrode to further reduce dielectric losses. These traps were demonstrated at room temperature with 40 Ca + ions. In conclusion, the similar heating rates and heating rate axial frequency dependencies between 2.4 and 3.0 MHz illustrate that this dielectric modification is not detrimental to trap performance.
Sterk, J. D. [Sandia National Laboratories (SNL-NM↗
Trap Passivation for Reducing On-Resistance and Saturation Voltage in Wafer-Bonded InGaAs-Channel/GaN-Drain Vertical FETs
High frequency and high power are the driving forces behind semiconductor transistor technology. However, conventional devices have the tradeoff of either being high speed or high breakdown—but not both. Wafer-bonded current aperture vertical electron transistors (BAVETs) help eliminate the tradeoff by combining a high-speed III-As channel to a high-breakdown III-N drift region. The device presented herein comprises of an InAlAs gate-barrier/InGaAs channel, wafer-bonded to an InGaN/GaN drift region, with the InGaAs/InGaN interface referred to as the wafer-bonded interface (WBI). The electronic behavior of WBIs is yet less known but necessary in realizing the potential of a BAVET. Herein, strong trap activity at the WBI is shown to be the cause of abnormally high saturation voltage ( V DS_SAT ) in BAVETs. The traps cause unintentional space charge (SC) region in the drain region of the device. This causes a drain resistance, a higher ON-resistance ( R ON ), and a higher V DS_SAT . Here, the challenge is overcome by hydrogen passivation of traps at WBI by using a p-doping for the InAlAs layer, which reduces the trap-charge concentration at the WBI. Consequently, the width of the SC region is reduced and a reduction in V DS_SAT is demonstrated, wherein it reduces from >12 to 5 V.
36 MATERIALS SCIENCE↗
TISCC: A Surface Code Compiler and Resource Estimator for Trapped-Ion Processors
We introduce the Trapped-Ion Surface Code Compiler (TISCC), a software tool that generates circuits for a universal set of surface code patch operations in terms of a native trapped-ion gate set. To accomplish this, TISCC manages an internal representation of a trapped-ion system where a repeating pattern of trapping zones and junctions is arranged in an arbitrarily large rectangular grid. Surface code operations are compiled by instantiating surface code patches on the grid and using methods to generate transversal operations over data qubits, rounds of error correction over stabilizer plaquettes, and/or lattice surgery operations between neighboring patches. Beyond the implementation of a basic surface code instruction set, TISCC contains corner movement functionality and a patch translation that is implemented using ion movement alone. Except in the latter case, all TISCC functionality is extensible to alternative grid-like hardware architectures. TISCC output has been verified using the Oak Ridge Quasi-Clifford Simulator (ORQCS).
LeBlond, Tyler↗
ORNL-QCI/TISCC
We introduce the Trapped-Ion Surface Code Compiler (TISCC), a software tool that generates circuits for a universal set of surface code patch operations in terms of a native trapped-ion gate set. To accomplish this, TISCC manages an internal representation of a trapped-ion system where a repeating pattern of trapping zones and junctions is arranged in an arbitrarily large rectangular grid. Surface code operations are compiled by instantiating surface code patches on the grid and using methods to generate transversal operations over data qubits, rounds of error correction over stabilizer plaquettes, and/or lattice surgery operations between neighboring patches. Beyond the implementation of a basic surface code instruction set, TISCC contains corner movement functionality and a patch translation that is implemented using ion movement alone. Except in the latter case, all TISCC functionality is extensible to alternative grid-like hardware architectures. TISCC output has been verified using the Oak Ridge Quasi-Clifford Simulator (ORQCS).
LeBlond, Tyler↗
Suppressing Loss of Ions in an Atomic Clock
An improvement has been made in the design of a compact, highly stable mercury- ion clock to suppress a loss of ions as they are transferred between the quadrupole and higher multipole ion traps. Such clocks are being developed for use aboard spacecraft for navigation and planetary radio science. The modification is also applicable to ion clocks operating on Earth: indeed, the success of the modification has been demonstrated in construction and operation of a terrestrial breadboard prototype of the compact, highly stable mercury-ion clock. Selected aspects of the breadboard prototype at different stages of development were described in previous NASA Tech Briefs articles. The following background information is reviewed from previous articles: In this clock as in some prior ion clocks, mercury ions are shuttled between two ion traps, one a 16- pole linear radio-frequency trap, while the other is a quadrupole radio-frequency trap. In the quadrupole trap, ions are tightly confined and optical state selection from a 202Hg lamp is carried out. In the 16-pole trap, the ions are more loosely confined and atomic transitions are interrogated by use of a microwave beam at approximately 40.507 GHz. The trapping of ions effectively eliminates the frequency pulling that would otherwise be caused by collisions between clock atoms and the wall of a gas cell. The shuttling of the ions between the two traps enables separation of the state-selection process from the clock microwave-resonance process, so that each of these processes can be optimized independently of the other. This is similar to the operation of an atomic beam clock, except that with ions the beam can be halted and reversed as ions are shuttled back and forth between the two traps. When the two traps are driven at the same radio frequency, the strength of confinement can be reduced near the junction between the two traps, depending upon the relative phase of the RF voltage used to operate each of the two traps, and can cause loss of ions during each transit between the traps and thereby cause loss of the 40.507-GHz ion-clock resonance signal. The essence of the modification is to drive the two traps at different frequencies typically between 1.5 and 2 MHz for the quadrupole trap and a frequency a few hundred kHz higher for the 16- pole trap. A frequency difference of a few hundred kHz ensures that the ion motion caused by the trapping electric fields is small relative to the diameter of the traps. Unlike in the case in which both traps are driven at the same frequency, the trapping electric fields near the junction are not zero at all times; instead, the regions of low electric field near the junction open and close at the difference frequency. An additional benefit of making the 16-pole trap operate at higher frequency is that the strength or depth of the multipole trap can be increased independent of the quadrupole ion trap.
Prestage, John↗
The Roadrunner Trap: A QSCOUT Device
The Roadrunner ion trap is a micro-fabricated surface-electrode ion trap based on silicon technology. This trap has one long linear section and a junction to allow for chain storage and reconfiguration. It uses a symmetric rf-rail design with segmented inner and outer control electrodes and independent control in the junction arms. The trap is fabricated on Sandia’s High Optical Access (HOA) platform to provide good optical access for tightly focused laser beams skimming the trap surface. It is packaged on our custom Bowtie-102 ceramic pin or land grid array packages using a 2.54 mm pitch for backside pins or pads. This trap also includes an rf sensing capacitive divider and tungsten wires for heating or temperature monitoring. The Roadrunner builds on the knowledge gained from previous surface traps fabricated at Sandia while improving ion control capabilities.
42 ENGINEERING↗
Trap-Assisted Dopant Compensation Prevents Shunting in poly-Si Passivating Interdigitated Back Contact Silicon Solar Cells
Interdigitated back contact (IBC) solar cells achieve the highest efficiencies of single-junction architectures, but complicated patterning of the rear fingers and spreading of dopants during processing inhibit their mainstream adoption due to concerns of shunting between the IBC fingers. One method of simplifying patterning at the rear is by using contact masks combined with plasma-enhanced chemical vapor deposition (PECVD) or ion implantation. However, the intrinsic isolation region becomes contaminated during high-temperature annealing by lateral diffusion of dopants and during masked PECVD by spreading of dopant radicals through region between the mask and the substrate. Despite this contamination, we show through scanning spreading resistance microscopy and Kelvin probe force microscopy that a ~20 µm wide compensating region exists with high enough resistivity to prevent shunting. We model this p-i-n poly-Si system using two simulation models: a simple resistor model considering only the capture of charge carriers by trap defects in poly-Si to reduce the conductivity, and a more refined 1-dimensional finite element model using Poisson’s equation, drift-diffusion equations, and recombination of carriers. Using this model, we show that high defect density significantly decreases the current across the region between the p- and n-type fingers, preventing shunting.
atom probe↗
Induced junction solar cell and method of fabrication
An induced junction solar cell is fabricated on a p-type silicon substrate by first diffusing a grid of criss-crossed current collecting n+ stripes and thermally growing a thin SiO2 film, and then, using silicon-rich chemical vapor deposition (CVD), producing a layer of SiO2 having inherent defects, such as silicon interstices, which function as deep traps for spontaneous positive charges. Ion implantation increases the stable positive charge distribution for a greater inversion layer in the p-type silicon near the surface. After etching through the oxide to parallel collecting stripes, a pattern of metal is produced consisting of a set of contact stripes over the exposed collecting stripes and a diamond shaped pattern which functions as a current collection bus. Then the reverse side is metallized.
Maserjian, J.↗
Anatomy of Protein Electrospray Ionization Mass Spectra by Superconducting Tunnel Junction Mass and Energy Spectrometry
Cryogenic superconducting tunnel junction (STJ) detectors have the advantage of single-particle sensitivity, high quantum efficiency, low noise, and the ability to detect the time and relative impact energy of deposited ions. This makes them attractive for use in mass spectrometry (MS) and as a form of energy spectrometry. STJ cryodetectors have been coupled to time-offlight (TOF) mass spectrometers equipped with a matrix-assisted laser desorption ionization (MALDI) source and to an electrospray ionization (ESI) TOF mass spectrometer. Here, a lab-made linear ion trap (LIT) mass spectrometer system was coupled to an ESI source and a 16-channel Nb-STJ array with improved readout electronics. The goal was to investigate fundamentals of ESI-generated protein ions by further exploiting the advantage of resolving these ions in a third dimension of the relative energy deposited into the STJs. The proteins equine cytochrome c, bovine carbonic anhydrase, bovine serum albumin, and murine immunoglobulin G were studied using this ESI-LIT-STJ-MS instrument. Multiply charged monomers, multimers, and fragments from metastable ions were resolved from monomer peaks by differences in ion deposition energy even when these ions have the same mass-to-charge ratio as the corresponding monomer. The determination of fragment mass from metastable decomposition is accomplished without knowing the charge state of the fragment. The average charge state of the multimers is reduced with each addition of a protein which is a direct reflection of the surface area available for charging. Multiply charged in-source fragments have also been observed and distinguished in the mass spectrum of carbonic anhydrase by using the differences in the energy deposited in the STJs.
42 ENGINEERING↗
The effect of process conditions on the performance of epitaxial InP solar cells
Indium phosphide solar cells have a higher resistance to electron irradiation than Si or GaAs cells of comparable junction depth. As a result, there is much interest in the use of this material for space applications. Cells of this material were made in bulk InP by a number of techniques, including ion implantation, direct diffusion in sealed ampoules, and by open tube diffusion. However, it is generally considered that the epitaxial approach will be superior to all of these techniques. The epitaxy of InP is considerably more difficult than that of gallium arsenide, for a number of reasons. Perhaps the most important is the fact that the native oxides of Indium are extremely difficult to remove, as compared to that of Gallium. In addition, thermal treatments for the desorption of these oxides often result in the formation of phosphorus vacancies and free indium on the surface. Thus, inadequate sample preparation before epitaxy, poor reactor cleaning procedures, or poor transition procedures between the growth of successive layers, all give rise to trap phenomena and to high interface recombination velocities. Moreover, the lifetime of the grown material is dominated by the occurrence of native defects, so that it is a strong function of growth parameters. These problems are of special interest to the fabrication of solar cells, where long life-time, combined with the absence of traps, is highly desirable. A study of this problem is described using a non-invasive diagnostic technique which was developed.
Borrego, J. M.↗
Reliable operation of Cr 2 O 3 :Mg/ $β$-Ga 2 O 3 p–n heterojunction diodes at 600 °C
Beta gallium oxide (β-Ga 2 O 3 )-based semiconductor heterojunctions have recently demonstrated improved performance at high voltages and elevated temperatures and are, thus, promising for applications in power electronic devices and harsh environment sensors. However, the long-term reliability of these ultra-wideband gap (UWBG) semiconductor devices remains barely addressed and may be strongly influenced by chemical reactions at the p–n heterojunction interface. Here, we experimentally demonstrate operation and evaluate the reliability of Cr 2 O 3 :Mg/β-Ga 2 O 3 p–n heterojunction diodes during extended operation at 600 °C, as well as after 30 repeated cycles between 25 and 550 °C. The calculated pO 2 -temperature phase stability diagram of the Ga-Cr-O material system predicts that Ga 2 O 3 and Cr 2 O 3 should remain thermodynamically stable in contact with each other over a wide range of oxygen pressures and operating temperatures. The fabricated Cr 2 O 3 :Mg/β-Ga 2 O 3 p–n heterojunction diodes show room-temperature on/off ratios >104 at ±5 V and a breakdown voltage (V Br ) of -390 V. The leakage current increases with increasing temperature up to 600 °C, which is attributed to Poole–Frenkel emission with a trap barrier height of 0.19 eV. Over the course of a 140-h thermal soak at 600 °C, both the device turn-on voltage and on-state resistance increase from 1.08 V and 5.34 mΩ cm 2 to 1.59 V and 7.1 mΩ cm 2 , respectively. This increase is attributed to the accumulation of Mg and MgO at the Cr 2 O 3 /Ga 2 O 3 interface as observed from the time-of-flight secondary ion mass spectrometry analysis. These findings inform future design strategies of UWBG semiconductor devices for harsh environment operation and underscore the need for further reliability assessments for β-Ga 2 O 3 -based devices.
36 MATERIALS SCIENCE↗