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Single-event gate rupture (SEGR) continues to be a key failure mode in power MOSFETs. (1) SEGR is complex, making rate prediction difficult SEGR mechanism has two main components: (1) Oxide damage-- Reduces field required for rupture (2) Epilayer response -- Creates transient high field across the oxide.
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In 2007, International Rectifier (IR) introduced a new version of its DirectFET metal oxide semiconductor field effect transistor (MOSFET) packaging. The new version (referred to as 'Version 2') enhances device moisture resistance, makes surface mount (SMT) assembly of these devices to printed wiring boards (PWBs) more repeatable, and subsequent assembly inspection simpler. In the present study, the National Aeronautics Space Administration (NASA) Jet Propulsion Laboratory (JPL), in collaboration with Stellar Microelectronics (Stellar), continued an evaluation of the DirectFET that they started together in 2006. The present study focused on comparing the two versions of the DirectFET and examining the suitability of the DirectFET devices for space applications. This study evaluated both versions of two DirectFET packaged devices that had both been shown in the 2006 study to have the best electrical and thermal properties: the IRF6635 and IRF6644. The present study evaluated (1) the relative electrical and thermal performance of both versions of each device, (2) the performance through high reliability testing, and (3) the performance of these devices in combination with a range of alternate solder alloys in the extreme thermal environments of deep space....
The channel conduction in 4H-SiC metal–oxide–semiconductor field effect transistors (MOSFETs) are highly impacted by charge trapping and scattering at the interface. Even though nitridation reduces the interface trap density, scattering still plays a crucial role in increasing the channel resistance in these transistors. In this work, the dominant scattering mechanisms are distinguished for inversion layer electrons and holes using temperature and body-bias-dependent Hall measurements on nitrided lateral 4H-SiC MOSFETs. The effect of the transverse electric field (E eƒƒ ) on carrier mobility is analyzed under strong inversion condition where surface roughness scattering becomes prevalent. Power law dependencies of the electron and hole Hall mobility for surface roughness scattering are determined to be E$^{-1.8}_{eƒƒ}$ and E$^{-2.4}_{eƒƒ}$, respectively, analogous to those of silicon MOSFETs. Moreover, for n-channel MOSFETs, the effect of phonon scattering is observed at zero body bias, whereas in p-channel MOSFETs, it is observed only under negative body biases. Along with the identification of regimes governed by different scattering mechanisms, these results highlight the importance of the selection of substrate doping and of E eƒƒ in controlling the value of channel mobility in 4H-SiC MOSFETs.
Single-event effect (SEE) and total ionizing dose (TID) test results are presented for various hardened and commercial power metal-oxide-semiconductor field effect transistors (MOSFETs), including vertical planar, trench, superjunction, and lateral process designs.
In this paper, the concept and prototype of an aging detector for silicon carbide (SiC) power metal oxide semiconductor field effect transistor (MOSFET) are proposed and described. It leverages the resonant peak values of gate-source voltage at different instants during the switching transients to decode the change of multiple aging indicators, such as the increases of on-state resistance and threshold voltage. Modeling-based analysis is conducted to support the idea. The detector can be fully integrated into gate drivers without any additional connection to the power stage and is functional during normal power stage operation. A prototype unit was built, and preliminary tests were conducted to validate the idea and the practicality of the detector.
Lightning induced damage is one of the major concerns in aircraft health monitoring. Such short-duration high voltages can cause significant damage to electronic devices. This paper presents a study on the effects of lightning injection on power metal-oxide semiconductor field effect transistors (MOSFETs). This approach consisted of pin-injecting lightning waveforms into the gate, drain and/or source of MOSFET devices while they were in the OFF-state. Analysis of the characteristic curves of the devices showed that for certain injection modes the devices can accumulate considerable damage rendering them inoperable. Early results demonstrate that a power MOSFET, even in its off-state, can incur considerable damage due to lightning pin injection, leading to significant deviation in its behavior and performance, and to possibly early device failures.
Silicon carbide (SiC) power devices have demonstrated many performance advantages over their silicon (Si) counterparts. As the inherent material limitations of Si devices are being swiftly realized, wide-band-gap (WBG) materials such as SiC have become increasingly attractive for high power applications. In particular, SiC power metal oxide semiconductor field effect transistors' (MOSFETs) high breakdown field tolerance, superior thermal conductivity and low-resistivity drift regions make these devices an excellent candidate for power dense, low loss, high frequency switching applications in extreme environment conditions. In this paper, a novel power processing unit (PPU) architecture is proposed utilizing commercially available 4H-SiC power MOSFETs from CREE Inc. A multiphase straight boost converter topology is implemented to supply up to 10 kilowatts full-scale. High Temperature Gate Bias (HTGB) and High Temperature Reverse Bias (HTRB) characterization is performed to evaluate the long-term reliability of both the gate oxide and the body diode of the SiC components. Finally, susceptibility of the CREE SiC MOSFETs to damaging effects from heavy-ion radiation representative of the on-orbit galactic cosmic ray environment are explored. The results provide the baseline performance metrics of operation as well as demonstrate the feasibility of a hard-switched PPU in harsh environments.
We show that quantum effects are likely to significantly degrade the performance of MOSFETs (metal oxide semiconductor field effect transistor) as these devices are scaled below 100 nm channel length and 2 nm oxide thickness over the next decade. A general and computationally efficient electronic device model including quantum effects would allow us to monitor and mitigate these effects. Full quantum models are too expensive in multi-dimensions. Using a general but efficient PDE solver called PROPHET, we implemented the density-gradient (DG) quantum correction to the industry-dominant classical drift-diffusion (DD) model. The DG model efficiently includes quantum carrier profile smoothing and tunneling in multi-dimensions and for any electronic device structure. We show that the DG model reduces DD model error from as much as 50% down to a few percent in comparison to thin oxide MOS capacitance measurements. We also show the first DG simulations of gate oxide tunneling and transverse current flow in ultra-scaled MOSFETs. The advantages of rapid model implementation using the PDE solver approach will be demonstrated, as well as the applicability of the DG model to any electronic device structure.
A circuit and method for transmitting and receiving on-off-keyed (OOK) signals with fractional signal-to-noise ratios uses available high-temperature silicon- on-insulator (SOI) components to move computational, sensing, and actuation abilities closer to high-temperature or high-ionizing radiation environments such as vehicle engine compartments, deep-hole drilling environments, industrial control and monitoring of processes like smelting, and operations near nuclear reactors and in space. This device allows for the networking of multiple, like nodes to each other and to a central processor. It can do this with nothing more than the already in-situ power wiring of the system. The device s microprocessor allows it to make intelligent decisions within the vehicle operational loop and to effect control outputs to its associated actuators. The figure illustrates how each node converts digital serial data to OOK 18-kHz in transmit mode and vice-versa in receive mode; though operations at lower frequencies or up to a megahertz are within reason using this method and these parts. This innovation s technique modulates a DC power bus with millivolt-level signals through a MOSFET (metal oxide semiconductor field effect transistor) and resistor by OOK. It receives and demodulates this signal from the DC power bus through capacitive coupling at high temperature and in high ionizing radiation environments. The demodulation of the OOK signal is accomplished by using an asynchronous quadrature detection technique realized by a quasi-discrete Fourier transform through use of the quadrature components (0 and 90 phases) of the carrier frequency as generated by the microcontroller and as a function of the selected crystal frequency driving its oscillator. The detected signal is rectified using an absolute-value circuit containing no diodes (diodes being non-operational at high temperatures), and only operational amplifiers. The absolute values of the two phases of the received signal are then summed and hard limited (digitized) by comparing them to a reference level and are then input into a microprocessor as a serial bit stream. The quasi-discrete Fourier transform is performed in high-temperature components (operational amplifiers, analog switches, resistors, and capacitors). The demodulated signal is a serial data stream that is input to the UART (universal asynchronous receiver transmitter) receiver pin of the microprocessor. The OOK of the carrier frequency uses the output of the UART pin as an enabling signal that drives the gate of the MOSFET. Logic low bits enable the carrier frequency (realized by using the 0 phase signal from the microcontroller, though either phase may be used) to be DC-coupled to the power supply bus through a current-limiting resistor mounted between the MOSFET drain and the supply rail. The presence of logic lows on the power supply rail is realized by carrier bursts while logic highs are realized by the absence of bursts.
The development of metal oxide semiconductor field effect transistors (MOSFETs) utilizing epitaxially grown 4H-SiC has accelerated in recent years due to their favorable properties, including a high breakdown field, high saturated electron drift velocity, and good thermal conductivity. However, extended defects in epitaxial 4H-SiC can affect both device yields and operational lifetime. In this work, we demonstrate the importance of a multiscale luminescence characterization approach to studying nondestructively extended defects in epitaxial 4H-SiC semiconducting materials. Multiscale luminescence analysis reveals different aspects of excess charge carrier recombination behavior based on the scale of a particular measurement. Combining measurements of the same extended defect area at different scales tells us more about the essential nature of that defect and its microstructure. Here, we use photoluminescence imaging and cathodoluminescence spectrum imaging to investigate the recombination behavior of several different types of extended defects, including stacking faults, inclusions, and basal plane dislocations. A detailed understanding of the optoelectronic properties of extended defects in epitaxial SiC helps elucidate the microstructure of extended defects and can provide pathways to mitigate detrimental changes during device operation related to their evolution, such as the recombination enhanced dislocation glide effect that affects SiC-based MOSFETs.
Superconducting magnets of future fusion reactors are expected to rely on composite high-temperature superconductor (HTS) cable conductors. In presently used HTS cables, current sharing between components is limited due to poorly defined contact resistances between superconducting tapes or by design. The interplay between contact and termination resistances is the defining factor for power dissipation in these cables and ultimately defines their safe operational margins. However, the current distribution between components along the composite conductor and inside its terminations is a priori unknown, and presently, no means are available to actively tune current flow distribution in real-time to improve margins of quench protection. Also, the lack of ability to electrically probe individual components makes it impossible to identify conductor damage locations within the cable. In this work, we address both problems by introducing active current control of current distribution between components using cryogenically operated metal-oxide-semiconductor-field-effect transistors (MOSFETs). We demonstrate through simulation and experiments how real-time current controls can help to drastically reduce heat dissipation in a developing hot spot in a two-conductor model system and help identify critical current degradation of individual cable components. Finally, prospects of other potential uses of MOSFET devices for improved voltage detection, AC loss-driven active quench protection, and remnant magnetization reduction in HTS magnets are also discussed.
Organic Direct-Bonded-Copper (ODBC) is a novel packaging technology for power modules which allows higher flexibility in layout design. In this work, a set of rapid prototyping techniques are developed for ODBC modules based on a polyimide dielectric material. These techniques enable fast and low-cost fabrication of modules with 3-Dimensional (3D) layout features. An example half-bridge (HB) silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET) module is designed and prototyped using the proposed techniques aiming at ultra-low power loop inductance. Finite element analysis (FEA)-circuit co-simulations results and experimental results validate an approximately 0.71nH power loop inductance for the example module design.
A wide range of utility applications require controllable switches with features such as high-voltage blocking and high-current carrying capacity, especially at high pulse width modulation (PWM) frequency. Low- and medium-voltage utility applications such as motor drives and flexible AC transmission systems as well as solid state transformers could also benefit from a low-cost high-voltage switching module. Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) metal oxide semiconductor field effect transistors (MOSFETs) are considered to be the present and next-generation device choices, although they have limitations. For relatively high-voltage applications with demanding thermal management, SiC is still the only choice, and GaN dominates the low-voltage regime. This manuscript proposes a new half-bridge power MOSFET module that is suitable for conventional H-bridge of multilevel configurations used in high-voltage applications. Constructed from bare SiC dies, this half-bridge module takes advantage of (1) optimized MOSFET placement inside the module, (2) customized heat exchanger, manifold, and cooling, (3) integrated gate driver module with pulse width modulation (PWM) over wi-fi to eliminate the need for low-voltage signals, (4) wireless power transfer (WPT)-enabled gate driver and other ancillary circuits, (5) and the option to incorporate an onboard state-of-health (SOH) estimator module. The entire architecture has been designed and built at the National Renewable Energy Laboratory (NREL) in Golden, CO.
Researchers at Sandia have developed a semiconductor-based high-voltage switch, with experimental results showing potential for enhanced radiation hardness, for use in multiple power conversion applications. Gallium nitride (GaN) metal-oxide semiconductor field effect transistors (MOSFETs) were modeled using commercial and Sandia CHARON simulation software to understand their performance and for future prediction of device operation in radiation environments.
It is widely accepted that the breakdown of Si0 2 gate dielectrics is caused by the buildup of stress-induced defects over time. Although several physical mechanisms have been proposed for the generation of these defects, very little direct experimental evidence as to the chemical and physical identity of these defects has been generated in the literature thus far. Here, we present electrically detected magnetic resonance (EDMR) measurements obtained via spin-dependent recombination currents at the interface of high-field stressed Si/Si0 2 metal-oxide-semiconductor field effect transistors (MOSFETs).
The objectives of this investigation were to determine the characteristics of semiconductor devices at low temperatures. The output characteristics of several currently available semiconductor devices and devices fabricated at Marshall Space Flight Center were measured over a range of gate voltages. Large variations in low-temperature performance, not only from type to type, but from field effect transistor (FET) to FET of the same type were obtained. By increasing the carrier concentrations at low temperatures through extra heavy doping, metal oxide semiconductor field effect transistor (MOSFET) device was fabricated that operated at 4.2K. To verify the low-temperature operation of a heavily doped device, this procedure was repeated. Their noise spectrum was analyzed at 4.2K. Suggestions were made as to possible fabrication methods, techniques, and other semiconductor materials that might improve the device charactersitics at low temperatures. A procedure for using an electric field to drift dopants through the insulating oxide to produce a very thin, heavily doped region under the gate of a MOSFET was initiated. Capacitance s a function of voltage plots was suggested as a method for determining the level of dopant drift.