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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS1980

Microprocessor user support at Langley Research Center

The use of microprocessors pose significant problems including: (1) a long learning process for proficient use of microprocessors; (2) the requirement for extensive support in both hardware and software; and (3) the need for coordination and sharing of the creative effort to avoid unnecessary duplication. To address these problems, Langley Research Center has established a microprocessor users committee to provide an advisory interface for management and users, and is training microprocessor users. A newsletter is published to disseminate information among microprocessor users. Both cross software on the central computer complex and microprocessor development systems are used to support the design of microprocessor based systems. Each of these activities is reviewed with special emphasis given to the microprocessor support available from the central computer complex. The effectiveness of the approach being taken at Langley is assessed and specific hardware and software development efforts that are targeted toward enhancing the existing microprocessing support are discussed.

Tucker, J. H.↗
NASA NTRS1982

Design guidelines for the testability of microprocessor based logic designs

This paper deals with the issue of designing microprocessor based systems with testability in mind. The ease of eventual testability should be a design consideration from the earliest design stage. Design guidelines with explicit examples for ease of testability are given. The issue of testing microprocessors as contrasted with testing random logic design is addressed, and procedures are delineated for the testability of microprocessors. Microprocessor testability design guidelines are discussed both at the design stage of the microprocessor itself as well as at the stage where the processor is imbedded as a component in a larger system. Specific instances and examples of a collection of design do's and don'ts are provided.

Mathur, F. P.↗
NASA NTRS1980

A command and data subsystem for deep space exploration based on the RCA 1802 microprocessor in a distributed configuration

The Command and Data Subsystem (CDS) is an RCA 1802microprocessor based subsystem that acts as the central nervous system for the Galileo Orbiter Spacecraft. All communication between the ground and spacecraft flows through the CDS. The CDS also distributes commands in real time, algorithmetrically expanded from a data base loaded from the ground and in response to spacecraft alarms. The distributed microprocessor system is configured as a redundant set of hardware with three microprocessors on each half. The microprocessors are surrounded by a group of special purpose hardware components which greatly enhance the ability of the software to perform its task. It is shown how the software architecture makes a distributed system of six microprocessors appear to each user as a single virtual machine, and collectively as a set of cooperating virtual machines that prevent the simultaneous presence of the several users from interfering destructively with each other.

Thomas, J. S.↗
NASA NTRS1980

A microprocessor application to a strapdown laser gyro navigator

The replacement of analog circuit control loops for laser gyros (path length control, cross axis temperature compensation loops, dither servo and current regulators) with digital filters residing in microcomputers is addressed. In addition to the control loops, a discussion is given on applying the microprocessor hardware to compensation for coning and skulling motion where simple algorithms are processed at high speeds to compensate component output data (digital pulses) for linear and angular vibration motions. Highlights are given on the methodology and system approaches used in replacing differential equations describing the analog system in terms of the mechanized difference equations of the microprocessor. Standard one for one frequency domain techniques are employed in replacing analog transfer functions by their transform counterparts. Direct digital design techniques are also discussed along with their associated benefits. Time and memory loading analyses are also summarized, as well as signal and microprocessor architecture. Trade offs in algorithm, mechanization, time/memory loading, accuracy, and microprocessor architecture are also given.

Giardina, C.↗
NASA NTRS1976

An assembler for the MOS Technology 6502 microprocessor as implemented in jolt (TM) and KIM-1 (TM)

Design of low-cost, microcomputer-based navigation receivers, and the assembler are described. The development of computer software for microprocessors is materially aided by the assembler program using mnemonic variable names. The flexibility of the environment provided by the IBM's Virtual Machine Facility and the Conversational Monitor System, make possible the convenient assembler access. The implementation of the assembler for the microprocessor chip serves a part of the present need and forms a model for support of other microprocessors.

Lilley, R. W.↗
NASA NTRS1976

Daily weather direct readout microprocessor study

The work completed included a study of the requirements and hardware and software implementation techniques for NIMBUS ESMR and TWERLE direct readout applications using microprocessors. Many microprocessors were studied for this application. Because of the available Interdata development capabilities, it was concluded that future implementations be on an Interdata microprocessor which was found adequate for the task.

Davisson, L. D.↗
NASA NTRS1977

Integrally regulated solar array demonstration using an Intel 8080 microprocessor

A concept for regulating the voltage of a solar array by using a microprocessor to effect discrete voltage changes was demonstrated. Eight shorting switches were employed to regulate a simulated array at set-point voltages between 10,000 and 15,000 volts. The demonstration showed that the microprocessor easily regulated the solar array output voltage independently of whether or not the switched cell groups were binary sized in voltage. In addition, the microprocessor provided logic memory capability to perform additional tasks such as locating and insolating a faulty switch.

Petrik, E. J.↗
NASA NTRS1978

Microprocessor-to-system/370 interface

The design and operation of a microprocessor interface unit which allows use of a computer terminal for communication at 110 or 300 baud both with a central host computer and with the microprocessor monitor are documented. Additionally, the interface permits the host computer to load the microprocessor memory directly with object code, avoiding the use of intermediate data storage such as paper tape. The central computer, containing an assembler language processor for the target microcomputer, can be used from the terminal with all the flexibility offered by the virtual machine facility, producing object code for the micro plus program listings and supporting outputs. The object code can then be loaded directly to the micro and the same terminal device used to run the micro program, communicating with the micro's monitor routine.

Lilley, R. W.↗
NASA NTRS1977

Microprocessor utilization in search and rescue missions

The feasibility of performing the same task in real time using microprocessor technology was determined. The least square algorithm was implemented on an Intel 8080 microprocessor. Results indicated that a microprocessor could easily match the IBM implementation in accuracy and be performed inside the time limitations set.

Schwartz, M.↗
NASA NTRS1978

Microprocessor utilization in search and rescue missions

The position of an emergency transmitter may be determined by measuring the Doppler shift of the distress signal as received by an orbiting satellite. This requires the computation of an initial estimate and refinement of this estimate through an iterative, nonlinear, least squares estimation. A version of the algorithm was implemented and tested by locating a transmitter on the premises and obtaining observations from a satellite. The computer used was an IBM 360/95. The position was determined within the desired 10 km radius accuracy. The feasibility of performing the same task in real time using microprocessor technology, was determined. The least squares algorithm was implemented on an Intel 8080 microprocessor. The results indicate that a microprocessor can easily match the IBM implementation in accuracy and be performed inside the time limitations set.

Schwartz, M.↗
NASA NTRS1977

Ionizing radiation effects on SBP9900 microprocessor

The radiation resistance of a 16-bit microprocessor based on integrated injection logic technology has been investigated. Cumulative fluences of 10 to the 12th power to 10 to the 14th power e/sq cm were used in the radiation-resistance study. Complete failure of the microprocessor was noted at a fluence level of 1.2 times 10 to the 14th power e/sq cm. Though the radiation resistance of the microprocessor makes it suited for space applications, reductions in the power dissipation of the device are needed.

Stanley, A. G.↗
NASA NTRS1978

Microprocessor control of a wind turbine generator

A microprocessor based system was used to control the unattended operation of a wind turbine generator. The turbine and its microcomputer system are fully described with special emphasis on the wide variety of tasks performed by the microprocessor for the safe and efficient operation of the turbine. The flexibility, cost and reliability of the microprocessor were major factors in its selection.

Gnecco, A. J.↗
NASA NTRS1978

Microprocessor control of a wind turbine generator

This paper describes a microprocessor based system used to control the unattended operation of a wind turbine generator. The turbine and its microcomputer system are fully described with special emphasis on the wide variety of tasks performed by the microprocessor for the safe and efficient operation of the turbine. The flexibility, cost and reliability of the microprocessor were major factors in its selection.

Gnecco, A. J.↗
NASA NTRS1980

G-cueing microcontroller (a microprocessor application in simulators)

A g cueing microcontroller is described which consists of a tandem pair of microprocessors, dedicated to the task of simulating pilot sensed cues caused by gravity effects. This task includes execution of a g cueing model which drives actuators that alter the configuration of the pilot's seat. The g cueing microcontroller receives acceleration commands from the aerodynamics model in the main computer and creates the stimuli that produce physical acceleration effects of the aircraft seat on the pilots anatomy. One of the two microprocessors is a fixed instruction processor that performs all control and interface functions. The other, a specially designed bipolar bit slice microprocessor, is a microprogrammable processor dedicated to all arithmetic operations. The two processors communicate with each other by a shared memory. The g cueing microcontroller contains its own dedicated I/O conversion modules for interface with the seat actuators and controls, and a DMA controller for interfacing with the simulation computer. Any application which can be microcoded within the available memory, the available real time and the available I/O channels, could be implemented in the same controller.

Horattas, C. G.↗
NASA NTRS1980

Distributed microprocessors in a tactical universal modem

The distributed microprocessor system associated with a wideband signal conversion unit (WBSCU) is described. Multiple embedded 8086 and 2901 microprocessors, supported by dedicated hardware modules, perform the required real time operations for both transmit and receive functions. Commands from a host computer determine the configuration of the WBSCU via the IEEE 488 bus. Each of the four WBSCU channels is assigned to process a specified IF waveform; each channel configures its own resources and, in some cases, borrows resources from other channels. The processed waveform data is communicated from individual channels to redundant global memories. Data flow between the user community and global memories occurs via redundant 1553 buses through intelligent Bus Interface Units. Each WBSCU channel contains one 2901 bit slice machine and one 8086 microprocessor. The 2901 provides high speed processing capability for the most time critical operations. The 8086 is used for lower speed processing tasks where its high level language capability can be better exploited. Each 8086 has a global bus for wideband interprocessor communication, and a local bus for 8086/2901, master/slave communication. Software architecture consists of a control and communications structure governing mode dependent signal processing tasks.

Gray, D. M.↗
NASA NTRS1981

Transient upsets in microprocessor controllers

The modeling and analysis of transient faults in microprocessor based controllers are discussed. Such controllers typically consist of a microprocessor, read only memory storing and application program, random access memory for data storage, and input/output devices for external communications. The effects of transient faults on the performance of the controller are reviewed. An instruction level perspective of performance is taken which is the basis of a useful high level program state description of the microprocessor controller. A transition matrix is defined which determines the controller's response to transient fault arrivals.

Glaser, R. E.↗
NASA NTRS1981

Automated mixed traffic transit vehicle microprocessor controller

An improved Automated Mixed Traffic Vehicle (AMTV) speed control system employing a microprocessor and transistor chopper motor current controller is described and its performance is presented in terms of velocity versus time curves. The on board computer hardware and software systems are described as is the software development system. All of the programming used in this controller was implemented using FORTRAN. This microprocessor controller made possible a number of safety features and improved the comfort associated with starting and shopping. In addition, most of the vehicle's performance characteristics can be altered by simple program parameter changes. A failure analysis of the microprocessor controller was generated and the results are included. Flow diagrams for the speed control algorithms and complete FORTRAN code listings are also included.

Marks, R. A.↗
NASA NTRS1980

Test vectors development and optimization for a microprocessor

This paper describes a method for generating and optimizing test vectors for a microprocessor, with the aid of a fault simulator implemented entirely by hardware. The development and optimization of test vectors has been done on a tester, with the fault simulator plugged directly into the test head. The fault simulator is capable of automatically injecting over a thousand single or multiple stuck faults in the sequential and combinatorial parts of the microprocessor. The test vectors developed by a programmer working interactively with the tester were applied through the tester to the fault simulator, and the percent of faults detected was measured. The vectors were developed and optimized for the 1802 microprocessor, with the objective of detecting 100% of the single stuck faults with a minimum set of vectors. Experimental results show that 99.7% of the single stuck faults are being detected with approximately 14,000 vectors.

Timoc, C. C.↗