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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records

Simplified microprocessor design for VLSI control applications

A design technique for microprocessors combining the simplicity of reduced instruction set computers (RISC's) with the richer instruction sets of complex instruction set computers (CISC's) is presented. They utilize the pipelined instruction decode and datapaths common to RISC's. Instruction invariant data processing sequences which transparently support complex addressing modes permit the formulation of simple control circuitry. Compact implementations are possible since neither complicated controllers nor large register sets are required.

Cameron, K.↗

Design guidelines for the testability of microprocessor based logic designs

This paper deals with the issue of designing microprocessor based systems with testability in mind. The ease of eventual testability should be a design consideration from the earliest design stage. Design guidelines with explicit examples for ease of testability are given. The issue of testing microprocessors as contrasted with testing random logic design is addressed, and procedures are delineated for the testability of microprocessors. Microprocessor testability design guidelines are discussed both at the design stage of the microprocessor itself as well as at the stage where the processor is imbedded as a component in a larger system. Specific instances and examples of a collection of design do's and don'ts are provided.

Mathur, F. P.↗

TIMED Doppler Interferometer

The Timed Doppler Interferometer (TIDI) will accurately and precisely determine the global vector MLTI (Mesosphere and Lower Thermosphere) wind, temperature, and density profiles. It will measure characteristics of the gravity wave and planetary wave spectra. The tidal characteristics of temperature, density, and wind in the MLTI will be determined. The neutral and ion winds will be measured to characterize the electrodynamical behavior of the MLTI. Oxygen and O2 abundances and nocticulent cloud activity will be measured. This review goes into the calibration and error sources, optical design, mechanisms design, detector design, electronics design, microprocessor and flight software design, and quality assurance and parts.

Killeen, Timothy L.↗

Design of a microprocessor based packet switch

The design of a packet switch incorporating a minicomputer to control and process data packets in a communications system has been reported. This paper proposes a design which uses a 6500 series microprocessor to realize the functions of a message switch in order to evaluate the viability of microprocessors in this application. The proposed design realizes the functions of header analysis, packet security, error control and line prioritization. The system hardware and software are presented together with a brief description of operation.

Carville, D. E.↗

Experience with custom processors in space flight applications

The Applied Physics Laboratory (APL) has developed a magnetometer instrument for a swedish satellite named Freja with launch scheduled for August 1992 on a Chinese Long March rocket. The magnetometer controller utilized a custom microprocessor designed at APL with the Genesil silicon compiler. The processor evolved from our experience with an older bit-slice design and two prior single chip efforts. The architecture of our microprocessor greatly lowered software development costs because it was optimized to provide an interactive and extensible programming environment hosted by the target hardware. Radiation tolerance of the microprocessor was also tested and was adequate for Freja's mission -- 20 kRad(Si) total dose and very infrequent latch-up and single event upset events.

Fraeman, M. E.↗

Formal proof of the AVM-1 microprocessor using the concept of generic interpreters

A microprocessor designated AVM-1 was designed to demonstrate the use of generic interpreters in verifying hierarchically decomposed microprocessor specifications. This report is intended to document the high-order language (HOL) code verifying AVM-1. The organization of the proof is discussed and some technical details concerning the execution of the proof scripts in HOL are presented. The proof scripts used to verify AVM-1 are also presented.

Windley, P.↗

Mongoose: Creation of a Rad-Hard MIPS R3000

This paper describes the development of a 32 Bit, full MIPS R3000 code-compatible Rad-Hard CPU, code named Mongoose. Mongoose progressed from contract award, through the design cycle, to operational silicon in 12 months to meet a space mission for NASA. The goal was the creation of a fully static device capable of operation to the maximum Mil-883 derated speed, worst-case post-rad exposure with full operational integrity. This included consideration of features for functional enhancements relating to mission compatibility and removal of commercial practices not supported by Rad-Hard technology. 'Mongoose' developed from an evolution of LSI Logic's MIPS-I embedded processor, LR33000, code named Cobra, to its Rad-Hard 'equivalent', Mongoose. The term 'equivalent' is used to infer that the core of the processor is functionally identical, allowing the same use and optimizations of the MIPS-I Instruction Set software tool suite for compilation, software program trace, etc. This activity was started in September of 1991 under a contract from NASA-Goddard Space Flight Center (GSFC)-Flight Data Systems. The approach affected a teaming of NASA-GSFC for program development, LSI Logic for system and ASIC design coupled with the Rad-Hard process technology, and Harris (GASD) for Rad-Hard microprocessor design expertise. The program culminated with the generation of Rad-Hard Mongoose prototypes one year later.

Lincoln, Dan↗

Test and evaluation of the generalized gate logic system simulator

The results of the initial testing of the Generalized Gate Level Logic Simulator (GGLOSS) are discussed. The simulator is a special purpose fault simulator designed to assist in the analysis of the effects of random hardware failures on fault tolerant digital computer systems. The testing of the simulator covers two main areas. First, the simulation results are compared with data obtained by monitoring the behavior of hardware. The circuit used for these comparisons is an incomplete microprocessor design based upon the MIL-STD-1750A Instruction Set Architecture. In the second area of testing, current simulation results are compared with experimental data obtained using precursors of the current tool. In each case, a portion of the earlier experiment is confirmed. The new results are then viewed from a different perspective in order to evaluate the usefulness of this simulation strategy.

Miner, Paul S.↗

Definition and fabrication of an airborne scatterometer radar signal processor

A hardware/software system which incorporates a microprocessor design and software for the calculation of normalized radar cross section in real time was developed. Interface is provided to decommutate the NASA ADAS data stream for aircraft parameters used in processing and to provide output in the form of strip chart and pcm compatible data recording.

Source record↗

The sun-tracking control of solar collectors using high-performance step motors

Sun-tracking solar energy-focusing devices involving a central receiver, thermionic conversion, or a distributed solar thermal collector system are described. The Perkins solar collector uses a fixed focal point about which an 18 m-diameter parabolic dish moves on tracks. The elevation axis also moves on a circular track. A microprocessor manipulates sun sensor information and sun ephemeris data to ensure correct placement. Stepper motors are digital devices which provide direct interface with digital electronics and a wide dynamic range, and could easily be associated with the microprocessors. Design philosophy, performance criteria, wind load analysis, and control system requirements are also discussed.

Hughes, R. O.↗

The TEKLIB graphic library

TEKLIB is a library of procedures written in TI PASCAL to perform basic graphic tasks. TEKLIB was written to provide an interface between a graphics terminal and the TI 990. The TI 990 is used as a controller for the Finite Element Machine which is an array of microprocessors designed to solve problems by finite element methods in parallel. The use of TEKLIB provides a means of inputting data graphically and displaying output.

Bostic, S. W.↗

Automatic Guidance for Remote Manipulator

Position sensor and mirror guides manipulator toward object. Grasping becomes automatic when sensor begins to receive signal from reflector on object to be manipulated. Light-emitting diodes on manipulator produce light signals for reflector, which is composite of plane and corner reflectors. Proposed scheme especially useful when manipulator arm tends to flex or when object is moving. Sensor and microprocessor designed to compensate for manipulatorarm oscillation.

Johnston, A. R.↗

Data-Acquisition Board For IBM PS/2 Computer

Circuit board containing microprocessors designed to control acquisition of data by IBM PS/2 computer. Plugged into one of 16-bit slots on mother board of computer. Controls transfer of data from as many as 48 discrete channels to Micro Channel Interface. With expansion of software, board recognizes and filters specified kinds of signal patterns, possibly to detect errors.

Hoang, Phuong-Dung T.↗

Analog-digital simulation of transient-induced logic errors and upset susceptibility of an advanced control system

A simulation study is described which predicts the susceptibility of an advanced control system to electrical transients resulting in logic errors, latched errors, error propagation, and digital upset. The system is based on a custom-designed microprocessor and it incorporates fault-tolerant techniques. The system under test and the method to perform the transient injection experiment are described. Results for 2100 transient injections are analyzed and classified according to charge level, type of error, and location of injection.

Carreno, Victor A.↗

Formal Verification of the AAMP-FV Microcode

This report describes the experiences of Collins Avionics & Communications and SRI International in formally specifying and verifying the microcode in a Rockwell proprietary microprocessor, the AAMP-FV, using the PVS verification system. This project built extensively on earlier experiences using PVS to verify the microcode in the AAMP5, a complex, pipelined microprocessor designed for use in avionics displays and global positioning systems. While the AAMP5 experiment demonstrated the technical feasibility of formal verification of microcode, the steep learning curve encountered left unanswered the question of whether it could be performed at reasonable cost. The AAMP-FV project was conducted to determine whether the experience gained on the AAMP5 project could be used to make formal verification of microcode cost effective for safety-critical and high volume devices.

Miller, Steven P.↗

A fast microprocessor communication network design for interprocessor communications for an integrated flight control system

A node design with connectivity four is presented whose communication processor handles data at four million bits/sec on each of the four channels into the node, and on each of the four channels out of the node, for a total node capacity of 32 million bits/sec. An integrated flight control system real-time application of this communication network design is discussed. It is shown that such high speed node communication hardware, arranged in the topological configuration of a minimum diameter graph with connectivity four and all links active, has good potential for real time control applications requiring reliability, availability, and survivability characteristics.

Kelly, G. L.↗

Design approach for a microprocessor-based GPS time transfer receiver

The design concept and characteristics of a self-contained microprocessor-based Global Positioning System time transfer receiver is described. A prototype of this unit is currently in the test phase. It employs two-bit digital baseband correlation rather than analog IF correlation of the signals with the reference code. The correlator, numerically controlled oscillators and code generator are implemented in a special-purpose digital signal processor. The time is recovered in the digital code tracking loop, and final corrections are applied in the control processor. Other features of this design are: (1) drift-free digital mechanization; (2) high reliability of digital circuits; (3) flexible control capability of the microprocessor; and (4) potential for a high degree of digital VLSI chip development leading to compact, low-cost units.

Ould, P. C.↗