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At least 19 records

The MSFC complementary metal oxide semiconductor (including multilevel interconnect metallization) process handbook

The fabrication techniques for creation of complementary metal oxide semiconductor integrated circuits at George C. Marshall Space Flight Center are described. Examples of C-MOS integrated circuits manufactured at MSFC are presented with functional descriptions of each. Typical electrical characteristics of both p-channel metal oxide semiconductor and n-channel metal oxide semiconductor discrete devices under given conditions are provided. Procedures design, mask making, packaging, and testing are included.

Bouldin, D. L.↗

Multilevel metallization method for fabricating a metal oxide semiconductor device

An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

Hollis, B. R., Jr.↗

Interface states and internal photoemission in p-type GaAs metal-oxide-semiconductor surfaces

An interface photodischarge study of p-type GaAs metal-oxide-semiconductor (MOS) structures revealed the presence of deep interface states and shallow donors and acceptors which were previously observed in n-type GaAs MOS through sub-band-gap photoionization transitions. For higher photon energies, internal photoemission was observed, i.e., injection of electrons to the conduction band of the oxide from either the metal (Au) or from the GaAs valence band; the threshold energies were found to be 3.25 and 3.7 + or - 0.1 eV, respectively. The measured photoemission current exhibited a thermal activation energy of about 0.06 eV, which is consistent with a hopping mechanism of electron transport in the oxide.

Kashkarov, P. K.↗

Nanoscale Metal Oxide Semiconductors for Gas Sensing

A report describes the fabrication and testing of nanoscale metal oxide semiconductors (MOSs) for gas and chemical sensing. This document examines the relationship between processing approaches and resulting sensor behavior. This is a core question related to a range of applications of nanotechnology and a number of different synthesis methods are discussed: thermal evaporation- condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed, providing a processing overview to developers of nanotechnology- based systems. The results of a significant amount of testing and comparison are also described. A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. The TECsynthesized single-crystal nanowires offer uniform crystal surfaces, resistance to sintering, and their synthesis may be done apart from the substrate. The TECproduced nanowire response is very low, even at the operating temperature of 200 C. In contrast, the electrospun polycrystalline nanofiber response is high, suggesting that junction potentials are superior to a continuous surface depletion layer as a transduction mechanism for chemisorption. Using a catalyst deposited upon the surface in the form of nanoparticles yields dramatic gains in sensitivity for both nanostructured, one-dimensional forms. For the nanowire materials, the response magnitude and response rate uniformly increase with increasing operating temperature. Such changes are interpreted in terms of accelerated surface diffusional processes, yielding greater access to chemisorbed oxygen species and faster dissociative chemisorption, respectively. Regardless of operating temperature, sensitivity of the nanofibers is a factor of 10 to 100 greater than that of nanowires with the same catalyst for the same test condition. In summary, nanostructure appears critical to governing the reactivity, as measured by electrical resistance of these SnO2 nanomaterials towards reducing gases. With regard to the sensitivity of the different nascent nanostructures, the electrospun nanofibers appear preferable

Hunter, Gary W.↗

A 15% efficient antireflection-coated metal-oxide-semiconductor solar cell

A new effect is being developed which significantly improves the conversion efficiency of antireflection-coated metal-oxide-semiconductor (AMOS) solar cells. The effect, a marked increase in the open-circuit voltage, is produced by the addition of an oxide layer to the semiconductor. Cells using gold on n-type gallium arsenide have been made with efficiencies up to 15% in terrestrial sunlight. All processing steps are amenable to the use of low-cost polycrystalline films of GaAs in place of the single crystals now used.

Stirn, R. J.↗

High-temperature Complementary Metal Oxide Semiconductors (CMOS)

The results of an investigation into the possibility of using complementary metal oxide semiconductor (CMOS) technology for high temperature electronics are presented. A CMOS test chip was specifically developed as the test bed. This test chip incorporates CMOS transistors that have no gate protection diodes; these diodes are the major cause of leakage in commercial devices.

Mcbrayer, J. D.↗

Models of second-order effects in metal-oxide-semiconductor field-effect transistors for computer applications

Second-order effects in metal-oxide-semiconductor field-effect transistors (MOSFETs) are important for devices with dimensions of 2 microns or less. The short and narrow channel effects and drain-induced barrier lowering primarily affect threshold voltage, but formulas for drain current must also take these effects into account. In addition, the drain current is sensitive to channel length modulation due to pinch-off or velocity saturation and is diminished by electron mobility degradation due to normal and lateral electric fields in the channel. A model of a MOSFET including these considerations and emphasizing charge conservation is discussed.

Benumof, Reuben↗

Total dose effect on soft error rate for dynamic metal-oxide-semiconductor memory cells

A simple model for the soft error rate for dynamic metal-oxide-semiconductor random access memories due to normal galactic radiation was devised and then used to calculate the rate of decrease of the single-event-upset rate with total radiation dose. The computation shows that the decrease in the soft error rate is less than 10 percent per day if the shielding is 0.5 g/sq cm and the spacecraft is in a geosynchronous orbit. The decrease is considerably less in a polar orbiting device.

Benumof, Reuben↗

Measurement of n-type Dry Thermally Oxidized 6H-SiC Metal-oxide Semiconductor Diodes by Quasistatic and High-Frequency Capacitance Versus Voltage and Capacitance Transient Techniques

Dry-oxidized n-type 6H-SiC metal-oxide-semiconductor capacitors are investigated using quasistatic capacitance versus voltage (C-V), high-frequency C-V, and pulsed high-frequency capacitance transient (C-t) analysis over the temperature range from 297 to 573 K. The quasistatic C - V characteristics presented are the first reported for 6H-SiC MOS capacitors, and exhibit startling nonidealities due to nonequilibrium conditions that arise from the fact that the recombination/generation process in 6H-SiC is extraordinarily slow even at the highest measurement temperature employed. The high-frequency dark C-V characteristics all showed deep depletion with no observable hysteresis. The recovery of the high-frequency capacitance from deep depletion to inversion was used to characterize the minority-carrier generation process as a function of temperature. Zerbst analysis conducted on the resulting C-t transients, which were longer than 1000 s at 573 K, showed a generation lifetime thermal activation energy of 0.49 eV.

Neudeck, P.↗

Integrated photo-responsive metal oxide semiconductor circuit

An infrared photoresponsive element (RD) is monolithically integrated into a source follower circuit of a metal oxide semiconductor device by depositing a layer of a lead chalcogenide as a photoresistive element forming an ohmic bridge between two metallization strips serving as electrodes of the circuit. Voltage from the circuit varies in response to illumination of the layer by infrared radiation.

Jhabvala, Murzban D.↗

High and low threshold P-channel metal oxide semiconductor process and description of microelectronics facility

The fabrication techniques and detail procedures for creating P-channel Metal-Oxide-Semiconductor (P-MOS) integrated circuits at George C. Marshall Space Flight Center (MSFC) are described. Examples of P-MOS integrated circuits fabricated at MSFC together with functional descriptions of each are given. Typical electrical characteristics of high and low threshold P-MOS discrete devices under given conditions are provided. A general description of MSFC design, mask making, packaging, and testing procedures is included. The capabilities described in this report are being utilized in: (1) research and development of new technology, (2) education of individuals in the various disciplines and technologies of the field of microelectronics, and (3) fabrication of many types of specially designed integrated circuits which are not commercially feasible in small quantities for in-house research and development programs.

Bouldin, D. L.↗

Response of a metal-oxide-semiconductor field-effect transistor to a cosmic-ray ion track

A cosmic-ray ion track passing perpendicularly through the oxide layer of an enhancement-mode metal-oxide-semiconductor field-effect transistor (MOSFET) forms a conducting path, the resistance of which is proportional to the stopping power of the cosmic ion and independent of the cross-sectional area of the ion track. The voltage across the oxide capacitance may drop below the threshold voltage if the gate bias is sufficiently low or if the external resistance in the gate-source circuit is sufficiently high. The first of a pair of MOSFETs forming a flip-flop circuit may thus be turned off, and the second transitor may turn on, providing it has a sufficiently short delay time, thereby completing a single-event upset.

Benumof, Reuben↗

Optimum antireflection coating for Antireflection-coated Metal-Oxide-Semiconductor /AMOS/ solar cells

Consideration is given to the design of a single-layer optimum antireflection coating for AMOS (antireflection-coated metal-oxide-semiconductor) solar cells to match the entire sunlight spectrum. The energy conversion efficiency is maximized by maximizing the open-circuit voltage and the short-circuit current. The former is maximized by oxidation techniques and the latter is maximized by the light-coupling into the solar cell. With reference to the effective index of refraction as obtained by ellipsometry, examples of optimum antireflection coatings for 60-A Au-GaAs solar cells are presented.

Yeh, Y. C. M.↗

Photovoltage response to temperature change at oxide semiconductor electrodes

A study has been carried out on single crystal electrodes of TiO2, SrTiO3, and alpha-Fe2O3 and polycrystalline WO3 to investigate the effect of cell temperature on the onset potential of n-type oxide semiconductor electrodes. It is found that the change of the onset potential with temperature is due to the potential change across the Helmholtz layer. The amount of this change depends on the point of zero zeta potential (pzzp) of the semiconductor electrode. The possibility of increasing the solar-to-chemical energy conversion efficiency of a photochemical cell by increasing the cell temperature is discussed.

Reichman, B.↗