Search NASA⌕ Search

SEARCH · Search NASA

Results for “pinhole”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Characterization of Engineered Pinholes in Dielectric Stacks of High-Performance Poly-Silicon Passivating Contacts

Passivating contact structures are expected to be implemented in > 50 % of industrially manufactured silicon photovoltaics produced over the next decade. One type of passivating contact utilizes a c-Si/dielectric/doped poly-Si layer stack. In cases where the dielectric layer/s are thick enough to impede tunneling of charge carriers, it was shown that disruptions (pinholes) in the dielectric are required to facilitate transport.[1] Pinholes in SiOx layers have typically been formed via high temperature annealing that allows localized breakup of this layer. This approach has drawbacks; 1) high temperature annealing increases cost and 2) pinhole formation is sensitive to both the SiOx thickness and wafer surface morphology making control of density and dimensions difficult. Recently, an alternative method of pinhole formation relying on metal assisted chemical etching (MACE) was shown to allow control over pinhole areal densities.[2] Such control is critical as both the density and dimensions of the pinholes determine saturation current density and contact resistivity. The contacts formed with the MACE process are known as polysilicon on locally etched oxide or PLEO and also result in low saturation current densities and low contact resistivity due to SiOx passivation and engineered pinhole enabled charge carrier transport, respectively. Photovoltaic devices with efficiencies greater than 20 % have recently been produced with these contacts, demonstrating the viability of contacts with engineered pinholes. Experimentally, preferential local collection of excess charge carriers has been observed and definitively connected to thermally induced pinholes in thick SiOx layers within c-Si/SiOx/poly-Si contact structures.[3] Recent work has shown that enhanced local collection of excess carriers can result from enhanced diffusion of dopants through pinholes in SiOx layers.[4] This study was restricted to simulation and characterization of poly-Si with the same dopant type as the c-Si substrates. In this work we focus our analysis on boron doped poly-Si with different stacks of dielectric layers (PLEO and PLENO where the N refers to a SiNy layer on top of the SiOx) on n-type crystalline silicon. This provides insight into how engineered pinholes affect charge collection across the p-n junction. Like previous observations of locally enhanced carrier transport through thermally induced pinholes, the EBIC images in Figure 1 shows that engineered pinholes in PLENO (1a) and PLEO (1b) also exhibit locally enhanced carrier transport at pinhole locations (bright spots in the images). We will also present detailed correlative nanoscale structural and chemical analysis using TEM imaging and EELS analysis with sample preparation guided by EBIC imaging. This allows us to connect the density and dimensions of engineered pinholes with charge carrier transport and measured photovoltaic device parameters. Our findings will accelerate the adoption of PLEO and PLENO contacts in industrially manufactured photovoltaic devices.

EBIC↗
DOE OSTI2023

The impacts of membrane pinholes on PEM water electrolysis

Polymer electrolyte membrane (PEM) water electrolysis is a promising technology to efficiently produce green hydrogen. Irregularities in membrane electrode assembly (MEA) component materials caused by manufacturing, processing, handling, or operation can lead to performance loss and failure. One example is the presence of pinholes in the membrane, which can cause increased gas transport (crossover) and lead to electrical shorting. This work investigates the effects of intentionally introduced pinholes with various sizes up to 350μm in diameter. The presence of the pinholes resulted in minimal impacts on the cell voltage (±30 mV at 4Acm -2 ). However, the pinholes significantly increased H 2 crossover, which decreased hydrogen production efficiency and increased the minimum current density for safe operation. The impacts of the pinhole on the H 2 crossover and efficiency are more severe for open pinhole features than tear-like pinhole features. In conclusion, this research demonstrates that even small pinholes cannot be disregarded from a safety, efficiency, and operating strategy perspective.

08 HYDROGEN↗
DOE OSTI2022

Controlling Pinhole Radius and Areal Density in a-Si/SiOx Using Metal-Assisted Chemical Etching

Polysilicon on silicon oxide (poly-Si/SiOx) passivating contacts with predominant charge-carrier transport via pinholes are currently prepared via a>1000 degrees C thermal step to induce oxide break-up. Herein, we develop the precursor of a pinhole-enabled poly-Si/SiOx contact utilizing room temperature metal-assisted chemical etching (MACE) to form pinholes in the SiOx. The pinholes were created via electroless Ag nanoparticle (Ag NP) deposition followed by the MACE of intrinsic amorphous hydrogenated silicon (a-Si:H) on SiOx, creating isolated mesopores through the film stack. By varying the MACE etching solution (HF:H2O2) concentration, we were able to vary the pinhole areal density over four orders of magnitude (104-107 cm-2). We observed the Ostwald ripening of the Ag NP to enable control over the pinhole radii. Our work demonstrates proof-of-concept for a-Si:H/SiOx with mesopores across the film stack, which may serve as precursor for the development of poly-Si/SiOx passivating contacts of both polarities.

MATERIALS SCIENCE,SOLAR ENERGY↗
DOE OSTI2023

Controlled Dielectric Breakdown to Form Pinhole Passivating Contacts

This contribution explores an alternate route to forming pinhole-based poly-Si/dielectric/c-Si passivating contacts. The method utilizes controlled dielectric breakdown or electroforming to produce nanoscale pinholes in a thick (non-tunnelling) dielectric which, when annealed, allows dopant atoms to pass from doped poly-Si through the pinholes and into the c-Si wafer, forming conductive pathways. We show that the pinholes lose passivation after electroforming but can be repassivated with a forming gas anneal. N-type contacts show contact resistivities of ~20 mOhm-cm2, but p-type contacts are ~100 mOhm-cm2. Devices show a distinct kink in the J-V curve indicative of a barrier to transport. The method can be expanded to optimized dielectric passivation stacks (not just thin, single layers) and can be formed in parallel over the faces of the wafer in selected areas (pinholes only under the grid lines).

CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SU↗
DOE OSTI2020

Effect of Surface Texture on Pinhole Formation in SiO x -Based Passivated Contacts for High-Performance Silicon Solar Cells

High-efficiency silicon solar cells rely on some form of passivating contact structure to reduce recombination losses at the crystalline silicon surface and losses at the metal/Si contact interface. One such structure is polycrystalline silicon (poly-Si) on oxide, where heavily doped poly-Si is deposited on a SiO x layer grown directly on the crystalline silicon (c-Si) wafer. Depending on the thickness of the SiO x layer, the charge carriers can cross this layer by tunneling (<2 nm SiO x thickness) or by direct conduction through disruptions in the SiOx, often referred to as pinholes, in thicker SiO x layers (>2 nm). In this work, we study structures with tunneling- or pinhole-like SiO x contacts grown on pyramidally textured c-Si wafers and expose variations in the SiOx layer properties related to surface morphology using electron-beam-induced current (EBIC) imaging. Using EBIC, we identify and mark regions with potential pinholes in the SiO x layer. We further perform high-resolution transmission electron microscopy on the same areas, thus allowing us to directly correlate locally enhanced carrier collection with variations in the structure of the SiO x layer. Our results show that the pinholes in the SiO x layer preferentially form in different locations based on the annealing conditions used to form the device. With greater understanding of these processes and by controlling the surface texture geometry, there is potential to control the size and spatial distribution of oxide disruptions in silicon solar cells with poly-Si on oxide-type contacts; usually, this is a random phenomenon on polished or planar surfaces. Such control will enable us to consistently produce high-efficiency devices with low recombination currents and low junction resistances using this contact structure.

14 SOLAR ENERGY↗
DOE OSTI2021

Pinhole Formation in Poly-Si/SiOx Passivating Contacts on Si(111)-Oriented Textures

Poly-Si/SiOx passivating contacts were grown on inverted pyramid and random pyramid textured wafers to investigate the hypothesis that pinhole formation is most susceptible at the valleys and edges of a textured surface. Tetramethylammonium hydroxide (TMAH) etching and electron beam induced current (EBIC) were used to assess pinhole formation and charge-carrier transport. Scanning electron microscopy revealed that TMAH etching can expose pinhole locations on textured surfaces. We show that pinholes may preferentially form at the vertices of inverted pyramids. Our TMAH and EBIC analyses on random pyramids show no preferential oxide breakup at the pyramid valleys.

41 EE - Solar Energy Technologies Office (EE-4S)↗
DOE OSTI2026

Silicon pinhole strip defects and their impact on ATLAS Inner Tracker HV current measurement

In preparation for the High-Luminsity LHC (HL-LHC) [1], the ATLAS detector will undergo major detector upgrades, including the replacement of the current Inner Detector with the new all-silicon Inner Tracker (ITk) [2]. The ITk consists of a pixel detector close to the beamline surrounded by a large-area strip detector. During detector production, the electrical properties of silicon sensors and readout electronics must be characterized through a series of quality control (QC) and quality assurance tests. These tests ensure any defect is captured at the earliest possible stage. One such defect, callled a pinhole, occurs when the strip implant and the metal readout electrode are shorted through the intermediary dielectric layer. Notably, the introduction of pinholes during module assembly and pinhole effects on completed modules, especially on leakage current measurement circuitry, have never been studied. In this paper, we investigate the effect of such connections on the sensor leakage current measurements of completed modules and introduce new ways to locate pinholed strips. Here, with minor modifications to testing procedures, such defects are shown not to impede module testing or performance.

FOS: Physical sciences↗
DOE OSTI2025

Optimizing 4d Emittance Measurements Using the Pinhole Scan Technique

Accurate measurement of electron beam emittance is essential for optimizing high-brightness electron sources. The Pinhole Scan Technique measures the 4D phase space and hence the emittance by measuring the beam profile after clipping the beam using a pinhole followed by a drift section and then scanning the beam over the pinhole. This technique has been implemented in low energy (< 200 keV) beamlines at both Cornell University and Arizona State University. However, the technique poses several practical challenges. In this work, we analyze and address key issues affecting the 4D phase space and emittance measurements using this technique. We identify and investigate sources of inaccuracies like the pinhole aspect ratio, beam divergence, position-momentum correlations in the phase space, and the point-spread-function of the detector and suggest techniques to minimize them. Our findings offer a pathway to more accurate 4D phase space characterization in advanced electron beam systems.

42 ENGINEERING↗
DOE OSTI2023

Pinhole electrical conductivity in polycrystalline Si on locally etched SiN$_y$/SiO$_x$ passivating contacts for Si solar cells

State-of-the-art monocrystalline Si (c-Si) solar cells require passivating contacts to achieve a high degree of charge-carrier separation and collection. In this work, we focus on boron-doped polycrystalline Si on locally etched silicon nitride/silicon oxide (PLENO) passivating contacts. In PLENO contacts, excellent surface passivation is provided by the ~10 nm dielectric bilayer, while pinholes in the dielectric bilayer, that are filled with doped polycrystalline Si, provide charge-carrier selectivity and transport. During PLENO fabrication, etch undercut in the dielectric bilayer occurs. Here, using electrical characterization and microscopies, we show that undercut causes pinholes to be electrically resistive in PLENO. A processing sequence that eliminates the undercut in the final PLENO structure results in electrically conductive pinholes with low contact resistivity.

14 SOLAR ENERGY↗
DOE OSTI2022

Controlled Dielectric Breakdown to Form Pinhole Passivated Contacts

This contribution explores a low-temperature route to forming dielectric pinholes to form poly-Si/dielectric/c-Si passivated contacts. The method utilizes controlled dielectric breakdown to form nanoscale pinholes in a thick (non-tunnelling) dielectric which, when annealed, allows dopant atoms to pass from doped poly-Si through the dielectric and into the c-Si wafer forming conductive pathways. We show that the pinholes can be repassivated with dopants and H diffusion which results in increased PL signals after processing. The method can be expanded to optimized dielectric passivation stacks (not just a single layer) and can be formed in parallel over the faces of the wafer in selected areas (only under the grid).

controlled dielectric breakdown↗
DOE OSTI2022

Controlling the Balance between Remote, Pinhole, and van der Waals Epitaxy of Heusler Films on Graphene/Sapphire

Remote epitaxy is promising for the synthesis of lattice-mismatched materials, exfoliation of membranes, and reuse of expensive substrates. However, clear experimental evidence of a remote mechanism remains elusive. Alternative mechanisms such as pinhole-seeded epitaxy or van der Waals epitaxy can often explain the resulting films. Here, in this study, we show that growth of the Heusler compound GdPtSb on clean graphene/sapphire produces a 30° rotated (R30) superstructure that cannot be explained by pinhole epitaxy. With decreasing temperature, the fraction of this R30 domain increases, compared to the direct epitaxial R0 domain, which can be explained by a competition between remote versus pinhole epitaxy. Careful graphene/substrate annealing and consideration of the relative lattice mismatches are required to obtain epitaxy to the underlying substrate across a series of other Heusler films, including LaPtSb and GdAuGe. The R30 superstructure provides a possible experimental fingerprint of remote epitaxy, since it is inconsistent with the leading alternative mechanisms.

36 MATERIALS SCIENCE↗
DOE OSTI2025

High-energy transient gas pinholes via saturated absorption

This Letter presents a spatial filter based on saturated absorption in gas as an alternative to the solid pinhole in a lens–pinhole–lens filtering system. We develop an analytic model that describes this process and demonstrate spatial filtering with simulations and experiments. We show that an ultraviolet laser pulse focused through ozone will have its spatial profile cleaned if its peak fluence rises above the ozone saturation fluence. Specifically, we demonstrate that a 5 ns 266 nm beam with 4.2 mJ of the initial energy can be effectively cleaned by focusing through a 1.4% ozone–oxygen mixture, with about 76% of the main beam energy transmitted and 89% of the sidelobe energy absorbed. In conclusion, this process can be adapted to other gases and laser wavelengths, providing alignment-insensitive and damage-resistant pinholes for high-repetition-rate high-energy lasers.

Ou, K. [Stanford Univ., CA (United States)] (ORCID↗
DOE OSTI2025

How non-ohmic contact-layer diodes in perovskite pinholes affect abrupt low-voltage reverse-bias breakdown and destruction of solar cells

Perovskite solar cells (PSCs) rapidly degrade under reverse bias, a condition that may occur during partial shading. Here, in this study, we use electrical measurements, electron microscopy, and optical and thermal imaging to investigate abrupt breakdown and hotspotting under low reverse potentials (<|-2| V). We show that microscopic pinholes in the perovskite layer cause rapid, destructive breakdown under reverse bias despite minimally reducing power conversion efficiencies. Measurements on miniature (200-micrometer diameter) PSCs and perovskite-free transport-layer diodes indicate that abrupt, low-voltage breakdown occurs in nanoscale to micrometer-scale defects and that metal migration and filamentation are unlikely causes. Reverse-bias stability substantially improves when pinholes in the perovskite and transport layers are eliminated. Atomic layer deposition of tin oxide prevents abrupt breakdown by ensuring physical separation between electrodes-not by blocking metal ion migration. Perovskite researchers should adopt cleaner, more uniform deposition techniques to enable robust PSCs for further research and commercial applications.

14 SOLAR ENERGY↗
DOE OSTI2022

Pinhole‐Free Ultrathin Silicon Oxide Layer by Ozone‐Dissolved Deionized Water

The pinhole‐free silicon oxide (SiO x ) layer grown using dissolved ozone in deionized water (DI‐O 3 ) is demonstrated. An ultrathin SiO x layer of thickness 1.53 nm ± 1.5% is grown on silicon wafer using 7 ppm DI‐O 3 . A four‐step methodology, including 25 wt% aq. tetramethylammonium hydroxide (TMAH) solution at 80 °C, is employed to magnify the pinhole signatures in the underlying silicon and visualized with dark‐field optical microscopy (DFOM) and scanning electron microscopy (SEM). The DFOM images show spots on the surface of wafer that originate from airborne particles, contamination, etc. SEM images reveal the absence of etch pits in silicon even after etching of SiO x /silicon in TMAH for 300 s. The minority carrier lifetime and interface states density in AlO x ‐capped SiO x /Si structure are ≥2 ms at carrier density of 1 × 10 15 cm −3 and less than 2 × 10 11 cm −2 eV −1 , respectively.

42 ENGINEERING↗
DOE OSTI2022

Effect of pinholes in Nb 4 C 3 MXene sheets on its electrochemical behavior in aqueous electrolytes

Two-dimensional (2D) niobium carbide, Nb 4 C 3 T x (T x : O, OH, and F), a representative member of the 43 MXene structural motif, has shown promising electrochemical performance in acidic electrolytes. The capacitive performance of Nb 4 C 3 T x in neutral aqueous electrolytes has been reported as moderate, but little effort has been made to improve it. In this paper, we report a method to introduce nanopores (pinholes) in Nb 4 C 3 T x MXene flakes by adjusting the etching time. The pinholes generated during the etching process improve ion diffusion pathways, which are otherwise hindered by the restacking of the 2D flakes. The “holey Nb 4 C 3 T x ” shows a 50 % improved rate capability at charge/discharge time scales of 1–2 s in 1 M Li 2 SO 4 , Na 2 SO 4 , and (NH 4 ) 2 SO 4 electrolytes. Our strategy of controlling the permeability of Nb 4 C 3 T x sheets can potentially be applied to other MXenes, providing guidance for improving the capacitance and rate capability of 2D materials.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2022

Pinhole-seeded lateral epitaxy and exfoliation of GaSb films on graphene-terminated surfaces

Abstract Remote epitaxy is a promising approach for synthesizing exfoliatable crystalline membranes and enabling epitaxy of materials with large lattice mismatch. However, the atomic scale mechanisms for remote epitaxy remain unclear. Here we experimentally demonstrate that GaSb films grow on graphene-terminated GaSb (001) via a seeded lateral epitaxy mechanism, in which pinhole defects in the graphene serve as selective nucleation sites, followed by lateral epitaxy and coalescence into a continuous film. Remote interactions are not necessary in order to explain the growth. Importantly, the small size of the pinholes permits exfoliation of continuous, free-standing GaSb membranes. Due to the chemical similarity between GaSb and other III-V materials, we anticipate this mechanism to apply more generally to other materials. By combining molecular beam epitaxy with in-situ electron diffraction and photoemission, plus ex-situ atomic force microscopy and Raman spectroscopy, we track the graphene defect generation and GaSb growth evolution a few monolayers at a time. Our results show that the controlled introduction of nanoscale openings in graphene provides an alternative route towards tuning the growth and properties of 3D epitaxial films and membranes on 2D material masks.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Demonstration of nearly pinhole-free epitaxial aluminum thin films by sputter beam epitaxy

Superconducting resonators with high quality factors have been fabricated from aluminum films, suggesting potential applications in quantum computing. Improvement of thin film crystal quality and removal of void and pinhole defects will improve quality factor and functional yield. Epitaxial aluminum films with superb crystallinity, high surface smoothness, and interface sharpness were successfully grown on the c-plane of sapphire using sputter beam epitaxy. This study assesses the effects of varying substrate preparation conditions and growth and prebake temperatures on crystallinity and smoothness. X-ray diffraction and reflectivity measurements yield extensive Laue oscillations and Kiessig thickness fringes for films grown at 200 °C under 15 mTorr Ar, indicating excellent crystallinity and surface smoothness; moreover, an additional substrate preparation procedure which involves (1) a modified substrate cleaning procedure and (2) prebake at 700 °C in 20 mTorr O 2 is shown by atomic force microscopy to yield nearly pinhole-free film growth while maintaining epitaxy and high crystal quality. The modified cleaning procedure is environmentally friendly and eliminates the acid etch steps common to conventional sapphire preparation, suggesting potential industrial application both on standard epitaxial and patterned surface sapphire substrates.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2021

Measurements of electron temperature in high-energy-density plasmas using gated x-ray pinhole imaging

We present measurements of spatially and temporally resolved electron temperature in high-energy-density plasmas using gated x-ray pinhole imagers. A 2D image of bremsstrahlung x-ray self-emission from laser-driven plasma plumes is detected at the same time through two pinholes covered with different filter materials. By comparing the attenuated signal through each filter, a spatially resolved electron temperature as low as 0.1 keV can be estimated. Measurements of the plasma plume taken from different directions indicate that imaging through extended plasmas has a negligible effect on the temperature estimates. Methods for estimating the expected signal, selecting filters, and incorporating the response of the detector are discussed.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗