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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Increased Static Charge–Induced Threshold Voltage Shifts and Memristor Activity in Pentacene OFETs Comprising Polystyrene–Based Gate Dielectrics Containing Electroactive Small Molecule Crystallites

Top-contact bottom-gate pentacene OFETs are fabricated with single layer dielectrics comprised of either polystyrene (PS), poly(4-methylstyrene) (P4MS), or poly(4-tert-butylstyrene) (P4TBS). The polystyrenes are blended with varying concentrations of two different small molecules, dibenzotetrathiafulvalene (DBTTF) and 2,8-difluoro-5,11-bis(triethylsilylethynyl)anthradithiophene (diF-TES-ADT), to form small, separated crystallites contained throughout the polymer dielectric layer. The OFET characteristics of these devices are investigated and their threshold voltage shifts are measured after –70 V static charging for 5 min. Two-terminal measurements are conducted using multiple different gate biases in the range of –50 to +50 V to investigate memristor behavior in the devices. OFETs containing DBTTF exhibited ΔVth increases as large as 330% relative to control OFETs containing no DBTTF, while OFETs containing at least 7.5 wt.% DBTTF exhibited memristor activity, with currents ranging from 20 nA to 44 µA depending on the applied bias. Furthermore, this work demonstrates that including small, separated crystallites in polymer dielectrics enhances their charge storage ability and can be promising for creating nonbinary memory devices for data processing. Additionally, the observed memristor activity indicates the OFETs in this work can be used in development of neuromorphic systems that aim to mimic the synaptic behavior of the human nervous system.

25 ENERGY STORAGE↗
NASA NTRS1988

A CMOS matrix for extracting MOSFET parameters before and after irradiation

An addressable matrix of 16 n- and 16 p-MOSFETs was designed to extract the dc MOSFET parameters for all dc gate bias conditions before and after irradiation. The matrix contains four sets of MOSFETs, each with four different geometries that can be biased independently. Thus the worst-case bias scenarios can be determined. The MOSFET matrix was fabricated at a silicon foundry using a radiation-soft CMOS p-well LOCOS process. Co-60 irradiation results for the n-MOSFETs showed a threshold-voltage shift of -3 mV/krad(Si), whereas the p-MOSFETs showed a shift of 21 mV/krad(Si). The worst-case threshold-voltage shift occurred for the n-MOSFETs, with a gate bias of 5 V during the anneal. For the p-MOSFETs, biasing did not affect the shift in the threshold voltage. A parasitic MOSFET dominated the leakage of the n-MOSFET biased with 5 V on the gate during irradiation. Co-60 test results for other parameters are also presented.

Blaes, B. R.↗
DOE OSTI2025

Investigation of the Effect of Gate Oxide Screening with Adjustment Pulse on Commercial SiC Power MOSFETs

This paper presents a method to recover the negative threshold voltage shift during high field gate oxide screening of 1.2 kV 4H-SiC MOSFETs with an additional adjustment gate voltage pulse. To reduce field failure rates of the MOSFETs in operation, manufacturers perform a screening treatment to remove devices with extrinsic defects in the oxide. Current gate oxide screening procedures are limited to oxide fields at or below ~9 MV/cm for short durations (<1 s), which is not enough to remove all the devices with extrinsic defects. The results show that by implementing a lower field gate pulse, the threshold voltage shift can be partially recovered, and therefore the maximum screening field and time can be increased. However, both the initial screening pulse and the adjustment pulse require careful calibration to prevent significant degradation of the device threshold voltage, on-resistance, interface state density, or intrinsic lifetime. With a well calibrated set of pulses, higher screening fields can be utilized without significantly damaging the devices. This leads to an improvement in the overall screening efficiency of the process, reducing the number of devices with extrinsic oxide defects entering the field, and improving the reliability of the SiC MOSFETs in operation.

42 ENGINEERING↗
NASA NTRS1987

Propagation delay measurements from a timing sampler intended for use in space

A 3-micron CMOS timing sampler is described which is a test circuit designed into the Jet Propulsion Labs' CRRES chip to be flown on the Combined Release and Radiation Effects Satellite (CRRES). The timing sampler consists of 64 inverter-pair stages with sampling latches and decoder circuitry. The sampler is used to measure inverter-pair propagation delays, which are nominally 2.5 ns, with a resolution of 100 ps. A simple model was developed to explain the radiation-induced inverter-pair delay shifts in terms of radiation-induced MOSFET threshold-voltage shifts and effective modal capacitances. The magnitude of the shift in pair delay with radiation was estimated at the point where the n-MOSFET threshold voltage became zero. For a 0.7-V-threshold shift, the pair delay increased from its preradiation value by 360 ps for a rising step input and decreased by 190 ps for a falling step input.

Blaes, B. R.↗
NASA NTRS1995

Radiation Evaluation of an Advanced 64Mb 3.3V DRAM and Insights into the Effects of Scaling on Radiation Hardness

In this paper, total ionizing dose radiation evaluations of the Micron 64 Mb 3.3 V, fast page mode DRAM and the IBM LUNA-ES 16 Mb DRAM are presented. The effects of scaling on total ionizing dose radiation hardness are studied utilizing test structures and a series of 16 Mb DRAMs with different feature sizes from the same manufacturing line. General agreement was found between the threshold voltage shifts of 16 Mb DRAM test structures and the threshold voltage measured on complete circuits using retention time measurements. Retention time measurement data from early radiation doses are shown that allow internal failure modes to be distinguished.

Radiation Hardness↗
NASA NTRS1991

CRRES microelectronic test chip

The JPL CRRES chip was designed and fabricated in 1985 and included in the CRRES MEP. MOSFET Matrix results show the effect of shielding on radiation-induced MOSFET threshold voltage shifts and channel mobility degradation. Shielded (middle board) MOSFETs have a threshold-voltage damage factor that is approximately three orders of magnitude smaller than would be estimated from Co-60 ground tests. Unshielded (outer board) MOSFETs have a threshold-voltage damage factor that would be estimated from Co-60 ground tests. Temperature swings as large as 23 C with a 22.5 orbit periodicity affected the MOSFET data and were removed from the data in order to reveal the radiation effects. This experiment demonstrated the feasibility of characterizing MOSFETs in a matrix, thus reducing the complexity and mass of the experiment.

Lin, Y.-S.↗
DOE OSTI2025

Radiation Response of Ga 2 O 3 MOSFETs Probed via Focused Particle Beams

Gallium Oxide (Ga 2 O 3 ), particularly in its β-phase, is attracting lots of interest for high-power and high-voltage electronics due to its wide bandgap, high breakdown field, and thermal stability. This study investigates the radiation response of Ga 2 O 3 Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) under Total Ionizing Dose (TID) and Displacement Damage (DD) conditions, which are critical for applications in radiation environments. Utilizing a dual-beam Focused Ion Beam and Scanning Electron Microscope setup, microscale analysis of radiation effects on individual devices is performed. The findings reveal distinct behaviors under TID and DD + TID conditions, with TID leading to threshold voltage shifts due to trapped charges, while DD results in decreased drive current attributed to increased carrier scattering from lattice defects. Notably, it is demonstrated that the TID effect can be mitigated through dynamic threshold voltage adjustments and that the predicted TID from ions calculated by Monte Carlo simulations overestimates actual TID due to unaccounted charge yield effects. In conclusion, this research enhances the understanding of Ga2O3 MOSFETs' performance in harsh radiation environments, providing insights for the design of robust electronic devices for space and nuclear applications.

MOSFET↗
NASA NTRS1987

A study of charged particles/radiation damage to VLSI device materials

Future spacecraft systems such as the manned space station will be subjected to low-dose long term radiation particles. Most electronic systems are affected by such particles. There is therefore a great need to understand device physics and failure mechanisms affected by radiation and to design circuits that would be less susceptible to radiation. Using 2 MeV electron radiation and bias temperature aging, it was found that MOS capacitors that were prepositively biased have lower flatband voltage shift and lesser increase in density of surface state charge than those that were not prepositively biased. In addition, it was shown that there is continued recovery of flatband voltage and density of state charge in irradiated capacitors during both room temperature anneal and 137 degree anneal. When nMOS transistors were subjected to 1 MeV proton radiation, charge pumping and current versus voltage measurements indicated that transconductance degradation, threshold voltage shifts and changes in interface states density may be the primary cause of nMOS transistor failure after radiation. Simulation studies using SPICE were performed on CMOS SRAM cells of various transistor sizes. It is shown that transistor sizing affects the noise margins of CMOS SRAM cells, and that as the beta ratio of the transistors of the CMOS SRAM cell decreases, the effective noise margin of the SRAM cell increases. Some suggestions were made in connection with the design of CMOS SRAMS that are hardened against single event upsets.

Okyere, John G.↗
NASA NTRS2001

2D Quantum Transport Modeling in Nanoscale MOSFETs

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density- gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions, oxide tunneling and phase-breaking scattering are treated on equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Quantum simulations are focused on MIT 25, 50 and 90 nm "well- tempered" MOSFETs and compared to classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. These results are quantitatively consistent with I D Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and sub-threshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

Svizhenko, Alexei↗
NASA NTRS2000

2D Quantum Mechanical Study of Nanoscale MOSFETs

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density-gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions and oxide tunneling are treated on an equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. We present the results of our simulations of MIT 25, 50 and 90 nm "well-tempered" MOSFETs and compare them to those of classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. Surprisingly, the self-consistent potential profile shows lower injection barrier in the channel in quantum case. These results are qualitatively consistent with ID Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and subthreshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

Svizhenko, Alexei↗
NASA NTRS2005

Single Particle Damage Events in Candidate Star Camera Sensors

Si charge coupled devices (CCDs) are currently the preeminent detector in star cameras as well as in the near ultraviolet (uv) to visible wavelength region for astronomical observations in space and in earth-observing space missions. Unfortunately, the performance of CCDs is permanently degraded by total ionizing dose (TID) and displacement damage effects. TID produces threshold voltage shifts on the CCD gates and displacement damage reduces the charge transfer efficiency (CTE), increases the dark current, produces dark current nonuniformities and creates random telegraph noise in individual pixels. In addition to these long term effects, cosmic ray and trapped proton transients also interfere with device operation on orbit. In the present paper, we investigate the dark current behavior of CCDs - in particular the formation and annealing of hot pixels. Such pixels degrade the ability of a CCD to perform science and also can present problems to the performance of star camera functions (especially if their numbers are not correctly anticipated). To date, most dark current radiation studies have been performed by irradiating the CCDs at room temperature but this can result in a significantly optimistic picture of the hot pixel count. We know from the Hubble Space Telescope (HST) that high dark current pixels (so-called hot pixels or hot spikes) accumulate as a function of time on orbit. For example, the HST Advanced Camera for Surveys/Wide Field Camera instrument performs monthly anneals despite the loss of observational time, in order to partially anneal the hot pixels. Note that the fact that significant reduction in hot pixel populations occurs for room temperature anneals is not presently understood since none of the commonly expected defects in Si (e.g. divacancy, E center, and A-center) anneal at such a low temperature. A HST Wide Field Camera 3 (WFC3) CCD manufactured by E2V was irradiated while operating at -83C and the dark current studied as a function of temperature while the CCD was warmed to a sequence of temperatures up to a maximum of +30C. The device was then cooled back down to -83 and re-measured. Hot pixel populations were tracked during the warm-up and cool-down. Hot pixel annealing began below 40C and the anneal process was largely completed before the detector reached +3OC. There was no apparent sharp temperature dependence in the annealing. Although a large fraction of the hot pixels fell below the threshold to be counted as a hot pixel, they nevertheless remained warmer than the remaining population. The details of the mechanism for the formation and annealing of hot pixels is not presently understood, but it appears likely that hot pixels are associated with displacement damage occurring in high electric field regions.

Marshall, Paul↗
DOE OSTI2025

Characterization of proton-induced damage in thick, p-channel skipper-CCDs

Here, in this work, we characterize the radiation-induced damage in two thick, p-channel skipper-CCDs irradiated unbiased and at room temperature with 217-MeV protons. We evaluate the overall performance of the sensors and demonstrate their single-electron/single-photon sensitivity after receiving a fluence on the order of 10 10 protons/cm 2 . Using the pocket-pumping technique, we quantify and characterize the proton-induced defects from displacement damage. We report an overall trap density of 0.134 traps/pixel for a displacement damage dose of 2.3 × 10 7 MeV/g. Three main proton-induced trap species were identified, V 2 , C i O i and V n O m , and their characteristic trap energies and cross sections were extracted. We found that while divacancies are the most common proton-induced defects, C i O i defects have a greater impact on charge integrity at typical operating temperatures because their emission-time constants are comparable or larger than typical readout times. To estimate ionization damage, we measure the characteristic output transistor curves. We found no threshold voltage shifts after irradiation. Our results highlight the potential of skipper-CCDs for applications requiring high-radiation tolerance and can be used to find the operating conditions in which effects of radiation-induced damage are mitigated.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

Interfacial oxide and other species in trimethylaluminum-pretreated atomic layer deposition-Al 2 O 3 /GaN characterized by sputter-assisted ToF-SIMS

Deposition techniques, like atomic layer deposition (ALD), are used to form high-quality dielectrics for GaN-based metal–oxide–semiconductor (MOS) gate structures due to the lack of a reliable thermal oxide in GaN. Moreover, interfacial GaO x from pre-existing native oxides is thought to adversely impact channel carrier dynamics and induce undesired threshold voltage shifts in GaN-based MOS gate structures. Exposure of the GaN surface to the trimethylaluminum (TMA) precursor prior to standard alumina ALD decreases the native oxide layer on GaN, but the extent of chemical modification has not been well studied in the context of interface composition in a MOS gate structure. Herein, we compare annealed 55 nm Al 2 O 3 dielectric films on GaN grown using either a water-first ALD process or a process including sequential pulses of TMA immediately before the initiation of Al 2 O 3 ALD. Time-of-Flight Secondary Ion Mass Spectrometry measures differences in the interfacial GaO x content between each ALD film. Here, it also detects surface contaminant species like Si, F, S, and C. Furthermore, we report the formation of an AlN species at the Al 2 O 3 /GaN interface, which is more prominent for the film grown using the TMA pre-pulse step. In general, this work demonstrates that the TMA pre-pulse step is an effective strategy for cleaning substrate surfaces prior to ALD.

Atomic layer deposition↗
NASA NTRS1975

Effects of ionizing radiation on CCD's

The effects of 1.2 MeV gamma radiation and 20 MeV electrons on the operational characteristics of CCDs are studied. The effects of ionizing radiation on the charge transfer efficiency, dark current, and input/output circuitry are described. The improved radiation hardness of buried channel CCDs is compared to surface channel results. Both ion implanted and epitaxial layer buried channel device results are included. The advantages of using a single thickness SiO2 gate dielectric are described. The threshold voltage shifts and surface state density changes of dry, steam, and HCl doped oxides are discussed. Recent results on the recovery times and total dose effects of high dose rate pulses of 20 MeV electrons are reported.

Hartsell, G. A.↗
NASA NTRS1984

Total-dose and dose-rate dependence of proton damage in MOS devices during and after irradiation

Rad-hard CMOS/bulk inverters with input gates high and low were irradiated by protons with a nominal energy of 8 MeV in an effort to determine the total-dose and dose-rate dependence of threshold voltage shifts, both during and immediately after irradiation and over extended periods of time thereafter. It is shown that the effects in rad-hard MOS devices which are produced by specific proton and electron energies in the space environment could be simulated by cobalt-60 induced effects through careful and proper selection of total does and dose rates. This selection must be based on an experimentally established relationship of Co-60 to electron or proton damage. It is demonstrated that the simulation can be accomplished both during and after irradiation, in the long-term postirradiation period, as well as in the damage state immediately after bombardment.

Stassinopoulos, E. G.↗
NASA NTRS1984

MOSFET and MOS capacitor responses to ionizing radiation

The ionizing radiation responses of metal oxide semiconductor (MOS) field-effect transistors (FETs) and MOS capacitors are compared. It is shown that the radiation-induced threshold voltage shift correlates closely with the shift in the MOS capacitor inversion voltage. The radiation-induced interface-state density of the MOSFETs and MOS capacitors was determined by several techniques. It is shown that the presence of 'slow' states can interfere with the interface-state measurements.

Benedetto, J. M.↗
NASA NTRS1986

Characterization of InGaAs/AlGaAs pseudomorphic modulation-doped field-effect transistors

High-performance pseudomorphic In(y)Ga(1-y)As/Al0.15-Ga0.85As y = 0.05-0.2 MODFET's grown by MBE have been characterized at dc (300 and 77 K) and RF frequencies. Transconductances as high 310 and 380 mS/mm and drain currents as high as 290 and 310 mA/mm were obtained at 300 and 77 K, respectively, for 1-micron gate lengths and 3-micron source-drain spacing devices. Lack of persistent trapping effects, I-V collapse, and threshold voltage shifts observed with these devices are attributed to the use of low mole fraction Al(x)Ga(1-x)As while still maintaining two-dimensional electron gas concentrations of about 1.3 x to the 12th per sq cm. Detailed microwave S-parameter measurements indicate a current gain cut-off frequency of 24.5 GHz when y = 0.20, which is as much as 100 percent better than similar GaAs/AlGaAs MODFET structures, and a maximum frequency of oscillation of 40 GHz.

Ketterson, Andrew A.↗
NASA NTRS1992

CRRES microelectronic test chip orbital data. II

Data from a MOSFET matrix on two JPL (CIT Jet Propulsion Laboratory) CRRES (Combined Release and Radiation Effects Satellite) chips, each behind different amounts of shielding, are presented. Space damage factors are nearly identical to ground test values for pMOSFETs. The results from neighboring rows of MOSFETs show similar radiation degradation. The SRD (Space Radiation Dosimeter) is used to measure the total dose accumulated by the JPL chips. A parameter extraction algorithm that does not underestimate threshold voltage shifts is used. Temperature effects are removed from the MOSFET data.

Soli, G. A.↗