SEARCH · Search NASA

Results for “upsets,”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

SourceResearch connectionFrom yearThrough year

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records

All sources NASA NTRS DOE OSTI

NASA NTRS2017

Analyzing System on A Chip Single Event Upset Responses using Single Event Upset Data, Classical Reliability Models, and Space Environment Data

We are investigating the application of classical reliability performance metrics combined with standard single event upset (SEU) analysis data. We expect to relate SEU behavior to system performance requirements. Our proposed methodology will provide better prediction of SEU responses in harsh radiation environments with confidence metrics. single event upset (SEU), single event effect (SEE), field programmable gate array devises (FPGAs)

single event effect (SEE)↗

NASA NTRS2002

Airplane Upset Training Evaluation Report

Airplane upset accidents are a leading factor in hull losses and fatalities. This study compared five types of airplane-upset training. Each group was composed of eight, non-military pilots flying in their probationary year for airlines operating in the United States. The first group, 'No aero / no upset,' was made up of pilots without any airplane upset training or aerobatic flight experience; the second group, 'Aero/no upset,' of pilots without any airplane-upset training but with aerobatic experience; the third group, 'No aero/upset,' of pilots who had received airplane-upset training in both ground school and in the simulator; the fourth group, 'Aero/upset,' received the same training as Group Three but in addition had aerobatic flight experience; and the fifth group, 'In-flight' received in-flight airplane upset training using an instrumented in-flight simulator. Recovery performance indicated that clearly training works - specifically, all 40 pilots recovered from the windshear upset. However few pilots were trained or understood the use of bank to change the direction of the lift vector to recover from nose high upsets. Further, very few thought of, or used differential thrust to recover from rudder or aileron induced roll upsets. In addition, recovery from icing-induced stalls was inadequate.

Gawron, Valerie J.↗

NASA NTRS1983

Digital system upset. The effects of simulated lightning-induced transients on a general-purpose microprocessor

Flight critical computer based control systems designed for advanced aircraft must exhibit ultrareliable performance in lightning charged environments. Digital system upset can occur as a result of lightning induced electrical transients, and a methodology was developed to test specific digital systems for upset susceptibility. Initial upset data indicates that there are several distinct upset modes and that the occurrence of upset is related to the relative synchronization of the transient input with the processing sate of the digital system. A large upset test data base will aid in the formulation and verification of analytical upset reliability modeling techniques which are being developed.

Belcastro, C. M.↗

NASA NTRS1984

Data and results of a laboratory investigation of microprocessor upset caused by simulated lightning-induced analog transients

A methodology was developed a assess the upset susceptibility/reliability of a computer system onboard an aircraft flying through a lightning environment. Upset error modes in a general purpose microprocessor were studied. The upset tests involved the random input of analog transients which model lightning induced signals onto interface lines of an 8080 based microcomputer from which upset error data was recorded. The program code on the microprocessor during tests is designed to exercise all of the machine cycles and memory addressing techniques implemented in the 8080 central processing unit. A statistical analysis is presented in which possible correlations are established between the probability of upset occurrence and transient signal inputs during specific processing states and operations. A stochastic upset susceptibility model for the 8080 microprocessor is presented. The susceptibility of this microprocessor to upset, once analog transients have entered the system, is determined analytically by calculating the state probabilities of the stochastic model.

Belcastro, C. M.↗

NASA NTRS1998

RH1020 Single Event Clock Upset Summary Report

This report summarizes the testing and analysis of "single event clock upset' in the RH1020. Also included are SEU-rate predictions and design recommendations for risk analysis and reduction. The subject of "upsets" in the RH1020 is best understood by using a model consisting of a global clock buffer and a D-type flip-flop as the basic memory unit. The RH1020 is built on the ACT 1 family architecture. As such, it has one low-skew global clock buffer with a TTL-level input threshold that is accessed via a single dedicated pin. The clock signal is driven to full CMOS levels, buffered, and sent to individual row buffers with one buffer per channel. For low-skew performance, the outputs of all of the RH1020 row buffers are shorted together via metal lines, as is done in the A1020B. All storage in the RH1020 consists of routed flip-flops, constructed with multiplexors and feedback through the routing segments. A simple latch can be constructed from a single (combinatorial or C) module; an edge-triggered flip-flop is constructed using two concatenated latches. There is no storage in the I/O modules. The front end of the clock buffering circuitry, at a common point relative to the row buffer, is a sub-circuit that was determined to be the most susceptible to heavy ions. This is due, in part, to its smaller transistors compared to the rest of the circuitry. This conclusion is also supported by SPICE simulations and an analysis of the heavy ion data, described in this report. The edge triggered D flip-flop has two single-event-upset modes. Mode one, called C-module upset, is caused by a heavy ion striking the C-module's sensitive area on the silicon and produces a soft single bit error at the output of the flip-flop. Mode two, called clock upset, is caused by a heavy ion strike on the clock buffer, generating a runt pulse interpreted as a false clock signal and consequently producing errors at the flip-flop outputs. C-module upset sensitivity in the RH1020 is essentially the same as that of its ACT 1 siblings (A1020, A1020A and A1020B), which were well tested, analyzed, and documented in the literature.

Katz, Richard B.↗

NASA NTRS2000

Angular and Energy Dependence of Proton Upset in Optocouplers

Proton upset effects in optocouplers were reported by LaBel, et al. that showed an unexpected increase in cross section for incident angles above 80 degrees. Although it appeared that the angular dependence was related to direct ionization from protons, the angular dependence was weaker than expected from basic geometrical arguments using a shallow charge collection depth. Later work showed that the angular dependence of proton upset observed in the earlier studies at a single energy could be explained by considering the distribution of proton recoil energies along with the assumption of a deeper charge collection depth, which was consistent with upset tests from heavy ions. However, an experimental test of the underlying assumptions in the latter work has yet to be done. Protons in space not only arrive over a wide range of incident angles, but also involve a distribution of proton energies. It is necessary to understand both the angular dependence and the dependence of proton upset on energy in order to determine how optocouplers will respond in space. If the angular dependence only occurs for extreme angles of incidence, it will have little impact on the overall cross section because of the narrow acceptance angle. The present work examines mechanisms for proton upset in optocouplers in more detail, investigating the energy dependence and the effects of different load conditions. A model for proton upset is developed, along with a laboratory screening method to determine whether direct ionization is significant for specific device types.

Johnston, A. H.↗

NASA NTRS1984

Data and results of a laboratory investigation of microprocessor upset caused by simulated lightning-induced analog transients

Advanced composite aircraft designs include fault-tolerant computer-based digital control systems with thigh reliability requirements for adverse as well as optimum operating environments. Since aircraft penetrate intense electromagnetic fields during thunderstorms, onboard computer systems maya be subjected to field-induced transient voltages and currents resulting in functional error modes which are collectively referred to as digital system upset. A methodology was developed for assessing the upset susceptibility of a computer system onboard an aircraft flying through a lightning environment. Upset error modes in a general-purpose microprocessor were studied via tests which involved the random input of analog transients which model lightning-induced signals onto interface lines of an 8080-based microcomputer from which upset error data were recorded. The application of Markov modeling to upset susceptibility estimation is discussed and a stochastic model development.

Belcastro, C. M.↗

NASA NTRS1987

Performance analysis of a generalized upset detection procedure

A general procedure for upset detection in complex systems, called the data block capture and analysis upset monitoring process is described and analyzed. The process consists of repeatedly recording a fixed amount of data from a set of predetermined observation lines of the system being monitored (i.e., capturing a block of data), and then analyzing the captured block in an attempt to determine whether the system is functioning correctly. The algorithm which analyzes the data blocks can be characterized in terms of the amount of time it requires to examine a given length data block to ascertain the existence of features/conditions that have been predetermined to characterize the upset-free behavior of the system. The performance of linear, quadratic, and logarithmic data analysis algorithms is rigorously characterized in terms of three performance measures: (1) the probability of correctly detecting an upset; (2) the expected number of false alarms; and (3) the expected latency in detecting upsets.

Blough, Douglas M.↗

NASA NTRS1986

An analytical method for predicting CMOS SRAM upsets with application to asymmetrical memory cells

An analytical method was developed to predict the heavy-ion-induced upset rate of static random access memory (SRAM) cells. The method was applied to the design of a memory with asymmetrical cells where the goal was to increase the upset rate in order to increase the number of observed upsets in a space environment. The asymmetry is achieved by increasing the drain area of selected transistors in the cell. Results from the analytical model for a space environment indicate the upset rate for the experimental asymmetrical cell (17.2 upsets/1 kbit-year) will be 4.7 times larger than the upset rate for the minimum-geometry balanced cell (3.6 upsets/1 kbit-year). The asymmetrical SRAM was designed into a test chip intended for the Combined Release and Radiation Effects Satellite (CRRES).

Buehler, Martin G.↗

NASA NTRS2016

Review of Research On Guidance for Recovery from Pitch Axis Upsets

A literature review was conducted to identify past efforts in providing control guidance for aircraft upset recovery including stall recovery. Because guidance is integrally linked to the intended function of aircraft attitude awareness and upset recognition, it is difficult, if not impossible, to consider these issues separately. This literature review covered the aspects of instrumentation and display symbologies for attitude awareness, aircraft upset recognition, upset and stall alerting, and control guidance. Many different forms of symbology have been investigated including, but not limited to, pitch scale depictions, attitude indicator icons, horizon symbology, attitude recovery arrows, and pitch trim indicators. Past research on different visual and alerting strategies that provide advisories, cautions, and warnings to pilots before entering an unusual attitude (UA) are also discussed. Finally, potential control guidance for recovery from upset or unusual attitudes, including approach-to-stall and stall conditions, are reviewed. Recommendations for future research are made.

Harrison, Stephanie J.↗

NASA NTRS2016

Heavy Ion Irradiation Fluence Dependence for Single-Event Upsets in a NAND Flash Memory

We investigated the single-event effect (SEE) susceptibility of the Micron 16 nm NAND flash, and found that the single-event upset (SEU) cross section varied inversely with cumulative fluence. We attribute the effect to the variable upset sensitivities of the memory cells. Furthermore, the effect impacts only single cell upsets in general. The rate of multiple-bit upsets remained relatively constant with fluence. The current test standards and procedures assume that SEU follow a Poisson process and do not take into account the variability in the error rate with fluence. Therefore, traditional SEE testing techniques may underestimate the on-orbit event rate for a device with variable upset sensitivity.

NAND flash memory↗

NASA NTRS2003

Single-event upset in advanced commercial power PC microprocessors

Single-event upset from heavy ions in measured for advanced commercial microprocessors, comparing upset sensitivity in registers and d-cache for several generations of devices. Multiple-bit upsets and asymmetry in registers upset cross sections are also discussed.

single-event upset advanced commercial power PC pr↗

NASA NTRS2006

Frequency Dependence of Single-Event Upset in Highly Advanced PowerPC Microprocessors

Single-event upset effects from heavy ions were measured for Motorola silicon-on-insulator (SOI) microprocessor with 90 nm feature sizes at three frequencies of 500, 1066 and 1600 MHz. Frequency dependence of single-event upsets is discussed. The results of our studies suggest the single-event upset in registers and D-Cache tend to increase with frequency. This might have important implications for the overall single-event upset trend as technology moves toward higher frequencies.

Cyclotron↗

NASA NTRS2004

Tradeoffs in Flight Design Upset Mitigation in State of the Art FPGAs: Hardened by Design vs. Design Level Hardening

This presentation compares and contrasts the effectiveness and the system/designer impacts of the two main approaches to upset hardening: the Actel approach (RTSX-S and RTAX-S) of low-level (inside each flip-flop) triplication and the Xilinx approach (Virtex and Virtex2) of design-level triplication of both functional blocks and voters. The effectiveness of these approaches is compared using measurements made in conjunction with each of the FPGAs' manufacturer: for Actel, published data [1] and for Xilinx, recent results from the Xilinx SEE Test Consortium (note that the author is an active and founding member). The impacts involve Actel advantages in the areas of transistor-utilization efficiency and minimizing designer involvement in the triplication while the Xilinx advantages relate to the ability to custom tailor upset hardness and the flexibility of re-configurability. Additionally, there are currently clear Xilinx advantages in available features such as the number of I/O's, logic cells, and RAM blocks as well as speed. However, the advantage of the Actel anti-fuses for configuration over the Xilinx SRAM cells is that the latter need additional functionality and external circuitry (PROMs and, at least a watchdog timer) for configuration and configuration scrubbing. Further, although effectively mitigated if done correctly, the proton upset-ability of the Xilinx FPGAs is a concern in severe proton-rich environments. Ultimately, both manufacturers' upset hardening is limited by SEFI (single-event functional interrupt) rates where it appears the Actel results are better although the Xilinx Virtex2-family result of about one SEFI in 65 device-years in solar-min GCR (the more intense part of the galactic cosmic-ray background) should be acceptable to most missions

radiation effects↗

NASA NTRS2017

Heavy Ion and Proton-Induced Single Event Upset Characteristics of a 3D NAND Flash Memory

We evaluated the effects of heavy ion and proton irradiation for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of identical density in the multiple-cell level (MLC) storage mode. The 3D NAND showed significantly reduced SEU susceptibility in single-level-cell (SLC) storage mode. Additionally, the 3D NAND showed less multiple-bit upset susceptibility than the planar NAND, with fewer number of upset bits per byte and smaller cross sections overall. However, the 3D architecture exhibited angular sensitivities for both base and face angles, reflecting the anisotropic nature of the SEU vulnerability in space. Furthermore, the SEU cross section decreased with increasing fluence for both the 3D NAND and the Micron 16 nm planar NAND, which suggests that typical heavy ion test fluences will underestimate the upset rate during a space mission. These unique characteristics introduce complexity to traditional ground irradiation test procedures.

3D NAND Flash memory; radiation susceptibility; si↗

NASA NTRS1982

Single event upset vulnerability of selected 4K and 16K CMOS static RAM's

Upset thresholds for bulk CMOS and CMOS/SOS RAMS were deduced after bombardment of the devices with 140 MeV Kr, 160 MeV Ar, and 33 MeV O beams in a cyclotron. The trials were performed to test prototype devices intended for space applications, to relate feature size to the critical upset charge, and to check the validity of computer simulation models. The tests were run on 4 and 1 K memory cells with 6 transistors, in either hardened or unhardened configurations. The upset cross sections were calculated to determine the critical charge for upset from the soft errors observed in the irradiated cells. Computer simulations of the critical charge were found to deviate from the experimentally observed variation of the critical charge as the square of the feature size. Modeled values of series resistors decoupling the inverter pairs of memory cells showed that above some minimum resistance value a small increase in resistance produces a large increase in the critical charge, which the experimental data showed to be of questionable validity unless the value is made dependent on the maximum allowed read-write time.

Kolasinski, W. A.↗

NASA NTRS1983

Single event upset (SEU) of semiconductor devices - A summary of JPL test data

The data summarized describe single event upset (bit-flips) for 60 device types having data storage elements. The data are from 15 acceleration tests with both protons and heavier ions. Tables are included summarizing the upset threshold data and listing the devices tested for heavy ion induced bit-flip and the devices tested with protons. With regard to the proton data, it is noted that the data are often limited to one proton energy, since the tests were usually motivated by the engineering requirement of comparing similar candidate devices for a system. It is noted that many of the devices exhibited no upset for the given test conditions (the maximum fluence and the maximum proton energy Ep are given for these cases). It is believed, however, that some possibility of upset usually exists because there is a slight chance that the recoil atom may receive up to 10 to 20 MeV of recoil energy (with more energy at higher Ep).

Nichols, D. K.↗

NASA NTRS1989

Real-time closed-loop simulation and upset evaluation of control systems in harsh electromagnetic environments

Digital control systems for applications such as aircraft avionics and multibody systems must maintain adequate control integrity in adverse as well as nominal operating conditions. For example, control systems for advanced aircraft, and especially those with relaxed static stability, will be critical to flight and will, therefore, have very high reliability specifications which must be met regardless of operating conditions. In addition, multibody systems such as robotic manipulators performing critical functions must have control systems capable of robust performance in any operating environment in order to complete the assigned task reliably. Severe operating conditions for electronic control systems can result from electromagnetic disturbances caused by lightning, high energy radio frequency (HERF) transmitters, and nuclear electromagnetic pulses (NEMP). For this reason, techniques must be developed to evaluate the integrity of the control system in adverse operating environments. The most difficult and illusive perturbations to computer-based control systems that can be caused by an electromagnetic environment (EME) are functional error modes that involve no component damage. These error modes are collectively known as upset, can occur simultaneously in all of the channels of a redundant control system, and are software dependent. Upset studies performed to date have not addressed the assessment of fault tolerant systems and do not involve the evaluation of a control system operating in a closed-loop with the plant. A methodology for performing a real-time simulation of the closed-loop dynamics of a fault tolerant control system with a simulated plant operating in an electromagnetically harsh environment is presented. In particular, considerations for performing upset tests on the controller are discussed. Some of these considerations are the generation and coupling of analog signals representative of electromagnetic disturbances to a control system under test, analog data acquisition, and digital data acquisition from fault tolerant systems. In addition, a case study of an upset test methodology for a fault tolerant electromagnetic aircraft engine control system is presented.

Belcastro, Celeste M.↗