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At least 181 records · Page 10

Laser scribing of silicon wafers

Laser scribing eliminates microcracking at scribe line intersections, minimizes or eliminates preparation of scribe channels, and increases yield during the breaking process. Rapid overlapping of spots in the form of a line permits scribing speeds of 1.5 to 2.5 in./sec at 50 pulses/sec.

Calihan, C.↗

Metallization of Large Silicon Wafers

A metallization scheme was developed which allows selective plating of silicon solar cell surfaces. The system is comprised of three layers. Palladium, through the formation of palladium silicide at 300 C in nitrogen, makes ohmic contact to the silicon surface. Nickel, plated on top of the palladium silicide layer, forms a solderable interface. Lead-tin solder on the nickel provides conductivity and allows a convenient means for interconnection of cells. To apply this metallization, three chemical plating baths are employed.

Pryor, R. A.↗

System for slicing silicon wafers

An improved system is described which has at least one endless band saw blade that is characterized by a continuously regenerated cutting edge and is unidirectionally driven along a pair of courses extended in mutual parallelism through a cutting station located near the midportion of the courses. The blade is supported at the cutting station by pairs of guides continuously rotated through less than 360 deg of angular displacement during each cutting operation in order to continuously regenerate the blade supporting surfaces of the guide. Blade wobble is thus substantially eliminated.

Collins, E. R.↗

Kinematical and mechanical aspects of wafer slicing

Some recently achieved results concerning the technological fundamentals of slurry sawing are presented. The specific material removal process and the related kinematic and geometric contact conditions between workpiece and saw blade are described. The result of a functional description of the slurry sawing process is presented, expressing the main process criteria, such as infeed per stroke, specific removal rate, specific tool wear, and vertical stroke intensity, in terms of the dominating process parameters, such as stroke length, width of workpiece, stroke frequency, specific cutting force and slurry specification.

Werner, P. G.↗

Wafering insight provided by the ODE method

The orientation-dependent etching method of slicing was investigated to see if it could be used to form more slices from high quality silicon crystals than can be achieved by mechanical slicing methods. Orientation-dependent slicing uses preferential etching down narrow slots in a silicon slab on form slices. The method has several possible advantages including high slicing yield (sq m/kg), plane parallel, thin slices, ready for processing and the chance of high throughput and low costs. There are limitations in the need for simple crystals, and in restricted depth of slicing.

Soclof, S. I.↗

Pre- and post-annealing of mechanical damage in silicon wafers

Basic properties of mechanical damage in silicon consisting of cracks and abrasion were studied using transmission electron microscopy. The crystallographic structure of mechanical damage was determined before and after high temperature annealing. The main findings include that stresses in silicon around crack tips are not plastically relieved at room temperature and that abrasion at room temperature introduces shear loops into the silicon. It was also found that cracks of micron size can be annealed out, specifically, if cleavage occurs on 111 planes. The healing products of such cracks are 60 deg and 90 deg dislocations. Submicron cracks transform into stacking faults during annealing. Likewise high concentrations of shear loops due abrasion were found to anneal into stacking faults. A one to one correlation between surface areas containing small cracks and stacking faults was made. Measurements of damage removal on silicon surfaces through chemical-mechanical etching techniques are presented. It is shown that silicon dioxide repolishes damaged silicon surfaces most effectively.

Schwottke, G. H.↗

Price estimates for the production of wafers from silicon ingots

The status of the inside-diameter sawing, (ID), multiblade sawing (MBS), and fixed-abrasive slicing technique (FAST) processes are discussed with respect to the estimated price each process adds on to the price of the final photovoltaic module. The expected improvements in each process, based on the knowledge of the current level of technology, are projected for the next two to five years and the expected add-on prices in 1983 and 1986 are estimated.

Mokashi, A. R.↗

High-Mobility Epitaxial Silicon Wafers

New technique produces high-mobility multilayer films suitable for use on silicon process line. New material is multilayer film of alternate layers of silicon and alloy of silicon and germanium. Films grown thus far have electron mobilities 50 percent greater than epitaxial silicon films grown previously.

Stermer, R. L., Jr↗

Nondestructive SEM for surface and subsurface wafer imaging

The scanning electron microscope (SEM) is considered as a tool for both failure analysis as well as device characterization. A survey is made of various operational SEM modes and their applicability to image processing methods on semiconductor devices.

Propst, Roy H.↗

Evaluation and ranking of candidate ceramic wafer engine seal materials

Modern engineered ceramics offer high temperature capabilities not found in even the best superalloy metals. The high temperature properties of several selected ceramics including aluminum oxide, silicon carbide, and silicon nitride are reviewed as they apply to hypersonic engine seal design. A ranking procedure is employed to objectively differentiate among four different monolithic ceramic materials considered, including: a cold-pressed and sintered aluminum oxide; a sintered alpha-phase silicon carbide; a hot-isostatically pressed silicon nitride; and a cold-pressed and sintered silicon nitride. This procedure is used to narrow the wide range of potential ceramics considered to an acceptable number for future detailed and costly analyses and tests. The materials are numerically scored according to their high temperature flexural strength; high temperature thermal conductivity; resistance to crack growth; resistance to high heating rates; fracture toughness; Weibull modulus; and finally according to their resistance to leakage flow, where materials having coefficients of thermal expansion closely matching the engine panel material resist leakage flow best. The cold-pressed and sintered material (Kyocera SN-251) ranked the highest in the overall ranking especially when implemented in engine panels made of low expansion rate materials being considered for the engine, including Incoloy and titanium alloys.

Steinetz, Bruce M.↗

Controlled growth of 3C-SiC and 6H-SiC films on low-tilt-angle vicinal (0001) 6H-SiC wafers

It has been found that, with proper pregrowth surface treatment, 6H-SiC single-crystal films can be grown by chemical vapor deposition (CVD) at 1450 C on vicinal (0001) 6H-SiC with tilt angles as small as 0.1 deg. Previously, tilt angles of greater than 1.5 deg were required to achieve 6H on 6H at this growth temperature. In addition, 3C-SiC could be induced to grow within selected regions on the 6H substrate. the 3C regions contained few (or zero) double-positioning boundaries and a low density of stacking faults. A new growth model is proposed to explain the control of SiC polytype in this epitaxial film growth process.

Powell, J. A.↗

Photoluminescence lifetime measurements in InP wafers

A simple apparatus to measure the minority carrier lifetime in InP has been developed. The technique stimulates the sample with a short pulse of light from a diode laser and measures the photoluminescence decay to extract the minority carrier lifetime. The photoluminescence lifetime in InP as a function of doping on both n- and p-type material is examined. The results also show a marked difference in the lifetime of n-type InP and p-type InP of similar doping levels. N-type InP shows a lifetime considerably longer than the expected radiative limited lifetime.

Landis, Geoffrey A.↗

On-wafer, cryogenic characterization of ultra-low noise HEMT devices

Significant advances in the development of high electron-mobility field-effect transistors (HEMT's) have resulted in cryogenic, low-noise amplifiers (LNA's) whose noise temperatures are within an order of magnitude of the quantum noise limit (hf/k). Further advances in HEMT technology at cryogenic temperatures may eventually lead to the replacement of maser and superconducting insulator superconducting front ends in the 1- to 100-GHz frequency band. Key to identification of the best HEMT's and optimization of cryogenic LNA's are accurate and repeatable device measurements at cryogenic temperatures. This article describes the design and operation of a cryogenic coplanar waveguide probe system for the characterization and modeling of advanced semiconductor transistors at cryogenic temperatures. Results on advanced HEMT devices are presented to illustrate the utility of the measurement system.

Bautista, J. J.↗

Apparatus and method for cold welding thin wafers to hard substrates

An apparatus for coating and bonding parts in a vacuum that includes a floating mount assembly holding one part and applying a bonding load to the parts is discussed. A pivoting mount assembly holds one part and is pivoted between a coating position and a bonding position. At least one coating source is provided for depositing a thin film of a metal onto a surface of each of the parts to improve the cold weld between the two parts. A restraining lever controls the application of the bonding load to the parts. The coating and bonding process occurs in a vacuum chamber with a single set-up.

Oeftering, Richard↗

Apparatus and Method for Cold Welding Thin Wafers to Hard Substrates

An apparatus for coating and bonding parts in a vacuum includes a floating mount assembly holding one part and applying a bonding load to the parts. A pivoting mount assembly holds one part and is pivoted between a coating position and a bonding position. At least one coating source is provided for depositing a thin film of a metal onto a surface of each of the parts to improve the cold weld between the two parts. A restraining lever controls the application of the bonding load to the parts. The coating and bonding process occurs in a vacuum chamber with a single set-up.

Oeftering, Richard C.↗

On-Wafer Characterization of Millimeter-Wave Antennas for Wireless Applications

The paper demonstrates a de-embedding technique and a direct on-substrate measurement technique for fast and inexpensive characterization of miniature antennas for wireless applications at millimeter-wave frequencies. The technique is demonstrated by measurements on a tapered slot antenna (TSA). The measured results at Ka-Band frequencies include input impedance, mutual coupling between two TSAs and absolute gain of TSA.

Simons, Rainee N.↗

Fabrication of Pop-up Detector Arrays on Si Wafers

High sensitivity is a basic requirement for a new generation of thermal detectors. To meet the requirement, close-packed, two-dimensional silicon detector arrays have been developed in NASA Goddard Space Flight Center. The goal of the task is to fabricate detector arrays configured with thermal detectors such as infrared bolometers and x-ray calorimeters to use in space fliGht missions. This paper focuses on the fabrication and the mechanical testing of detector arrays in a 0.2 mm pixel size, the smallest pop-up detectors being developed so far. These array structures, nicknamed "PUDS" for "Pop-Up Detectors", are fabricated on I pm thick, single-crystal, silicon membranes. Their designs have been refined so we can utilize the flexibility of thin silicon films by actually folding the silicon membranes to 90 degrees in order to obtain close-packed two-dimensional arrays. The PUD elements consist of a detector platform and two legs for mechanical support while also serving as electrical and thermal paths. Torsion bars and cantilevers connecting the detector platform to the legs provide additional flexures for strain relief. Using micro-electromechanical structure (MEMS) fabrication techniques, including photolithography, anisotropic chemical etching, reactive-ion etching, and laser dicing, we have fabricated PLTD detector arrays of fourteen designs with a variation of four parameters including cantilever length, torsion bar length and width, and leg length. Folding tests were conducted to test mechanical stress distribution for the array structures. We obtained folding yields and selected optimum design parameters to reach minimal stress levels. Computer simulation was also employed to verify mechanical behaviors of PUDs in the folding process. In addition, scanning electron microscopy was utilized to examine the flatness of detectors and the alignment of detector pixels in arrays. The fabrication of thermistors and heaters on the pop-up detectors is under way, preparing us for the next step of the experiment, the thermal test.

Li, Mary J.↗