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Assessing the SEU resistance of CMOS latches using alpha-particle sensitive test circuits
The importance of Cosmic Rays on the performance of integrated circuits (IC's) in a space environment is evident in the upset rate of the Tracking and Data Relay Satellite (TDRS) launched in Apr. 1983. This satellite experiences a single-event-upset (SEU) per day which must be corrected from the ground. Such experience caused a redesign of the Galileo spacecraft with SEU resistant IC's. The solution to the SEU problem continues to be important as the complexity of spacecraft grows, the feature size of IC's decreases, and as space systems are designed with circuits fabricated at non-radiation hardened foundries. This paper describes an approach for verifying the susceptibility of CMOS latches to heavy-ion induced state changes. The approach utilizes alpha particles to induce the upsets in test circuits. These test circuits are standard cells that have offset voltages which sensitize the circuits to upsets. These results are then used to calculate the upsetability at operating voltages. In this study results are presented for the alpha particle upset of a six-transistor static random access memory (SRAM) cell. Then a methodology is described for the analysis of a standard-cell inverter latch.
Results from the First Two Flights of the Static Computer Memory Integrity Testing Experiment
This paper details the scientific objectives, experiment design, data collection method, and post flight analysis following the first two flights of the Static Computer Memory Integrity Testing (SCMIT) experiment. SCMIT is designed to detect soft-event upsets in passive magnetic memory. A soft-event upset is a change in the logic state of active or passive forms of magnetic memory, commonly referred to as a "Bitflip". In its mildest form a soft-event upset can cause software exceptions, unexpected events, start spacecraft safeing (ending data collection) or corrupted fault protection and error recovery capabilities. In it's most severe form loss of mission or spacecraft can occur. Analysis after the first flight (in 1991 during STS-40) identified possible soft-event upsets to 25% of the experiment detectors. Post flight analysis after the second flight (in 1997 on STS-87) failed to find any evidence of soft-event upsets. The SCMIT experiment is currently scheduled for a third flight in December 1999 on STS-101.
Flight Simulator and Training Human Factors Validation
Loss of control has been identified as the leading cause of aircraft accidents in recent years. Efforts have been made to better equip pilots to deal with these types of events, commonly referred to as upsets. A major challenge in these endeavors has been recreating the motion environments found in flight as the majority of upsets take place well beyond the normal operating envelope of large aircraft. The Environmental Tectonics Corporation has developed a simulator motion base, called GYROLAB, that is capable of recreating the sustained accelerations, or G-forces, and motions of flight. A two part research study was accomplished that coupled NASA's Generic Transport Model with a GYROLAB device. The goal of the study was to characterize physiological effects of the upset environment and to demonstrate that a sustained motion based simulator can be an effective means for upset recovery training. Two groups of 25 Air Transport Pilots participated in the study. The results showed reliable signs of pilot arousal at specific stages of similar upsets. Further validation also demonstrated that sustained motion technology was successful in improving pilot performance during recovery following an extensive training program using GYROLAB technology.
Estimates of SEU rates from heavy ions in devices exhibiting dual-node susceptibility
A single-event effect (SEE) occurs when a single ionizing particle passing through an electronic device produces a detectable event in the device. The type of SEE most frequently discussed in the literature is a "single-node upset" problem in which an upset at a given node depends only on conditions seen by that node. In contrast, some devices are designed so that an upset becomes a "dual-node" problem in which a device upset depends on conditions simultaneously seen by two nodes. This report derives a method for estimating heavy-ion induced upset rates for the dual-node problem.
Simulator study of vortex encounters by a twin-engine, commercial, jet transport airplane
A simulator study of vortex encounters was conducted for a twin-engine, commercial, jet transport airplane encountering the vortex flow field of a heavy, four-engine, commercial, jet transport airplane in the final-approach configuration. The encounters were conducted with fixed controls and with a pilot using a state-of-the-art, manual-control system. Piloted encounters with the base-line vortex flow field out of ground effect (unattenuated) resulted in initial bank-angle excursions greater than 40 deg, coupled with initial sideslip-angle excursions greater than 10 deg. The severity of these initial upsets was significantly reduced when the vortex center was moved laterally or vertically away from the flight path of the encountering airplane. Smaller reductions occurred when the flow field was attenuated by the flight spoilers on the generating airplane. The largest reduction in the severity of the initial upsets, however, was from aging in ground effect. The severity of the initial upsets of the following airplane was relatively unaffected by the approach speed. Increasing the lift coefficient of the generating airplane resulted in an increase in the severity of the initial upsets.
Diagnosis of NMOS DRAM functional performance as affected by a picosecond dye laser
A picosec pulsed dye laser beam was at selected wavelengths successfully used to simulate heavy-ion single-event effects (SEEs) in negative channel NMOS DRAMs. A DRAM was used to develop the test technique because bit-mapping capability and previous heavy-ion upset data were available. The present analysis is the first to establish such a correlation between laser and heavy-ion data for devices, such as the NMOS DRAM, where charge collection is dominated by long-range diffusion, which is controlled by carrier density at remote distances from a depletion region. In the latter case, penetration depth is an important parameter and is included in the present analysis. A single-pulse picosecond dye laser beam (1.5 microns diameter) focused onto a single cell component can upset a single memory cell; clusters of memory cell upsets (multiple errors) were observed when the laser energy was increased above the threshold energy. The multiple errors were analyzed as a function of the bias voltage and total energy of a single pulse. A diffusion model to distinguish the multiple upsets from the laser-induced charge agreed well with previously reported heavy ion data.
An SEU immune logic family
A new logic family, which is immune to single event upsets, is described. Members of the logic family are capable of recovery, regardless of the shape of the upsetting event. Glitch propagation from an upset node is also blocked. Logic diagrams for an Inverter, Nor, Nand, and Complex Gates are provided. The logic family can be implemented in a standard, commercial CMOS process with no additional masks. DC, transient, static power, upset recovery and layout characteristics of the new family, based on a commercial 1 micron CMOS N-Well process, are described.
Determination Of LETs Of SRAMs By Use Of A Laser
Report describes experimental study of use of microelectronic advanced laser scanner (MEALS) to cause single-event upsets (SEUs) in integrated logic circuits. Basic concepts of SEU testing by use of MEALS described in "Laser Scanner Tests for Single-Event Upsets" (NPO-18216), "Single-Event-Upset Laser Scanner With Optical Bias" (NPO-18217), and "More About Laser Scanner Tests for Single-Event Upsets" (NPO-18494). Study part of continuing effort to study SEU effects of ionizing radiation on such circuits and to use MEALS as relatively inexpensive SEU-prescreening laboratory apparatus serving as alternative to heavy-ion acclerator.
Evaluation of the Radiation Susceptibility of a 3D NAND Flash Memory
We evaluated the heavy ion and proton-induced single-event effects (SEE) for a 3D NAND flash. The 3D NAND showed similar single-event upset (SEU) sensitivity to a planar NAND of similar density and performance in the multiple-cell level (MLC) storage mode. However, the single-level-cell (SLC) storage mode of the 3D NAND showed significantly reduced SEU susceptibility. Additionally, the 3D NAND showed less MBU susceptibility than the planar NAND, with reduced number of upset bits per byte and reduced cross sections overall. However, the 3D architecture exhibited angular sensitivities for both base and face angles, reflecting the anisotropic nature of the SEU vulnerability in space. Furthermore, the SEU cross section decreased with increasing fluence for both the 3D NAND and the latest generation planar NAND, indicating a variable upset rate for a space mission. These unique characteristics introduce complexity to traditional ground irradiation test procedures.
Flight-test experience of a helicopter encountering an airplane trailing vortex
This paper presents results of a flight-test experiment of a UH-1H helicopter encountering the vortex wake of a C-54 airplane. The helicopter was instrumented to record the pilot control inputs, determine the upset experience, and measure critical loads within the rotor system. During the flight-test program 132 penetrations of the vortex wake were made by the helicopter at separation distances from 3/8 to 6-1/2 nautical miles. Test results indicated that the helicopter upsets and the vortex induced blade loads experienced were minimal and well within safe limits. The upsets were very mild when compared to a typical response of a small airplane to the vortex wake of the C-54 airplane.
Development of a preprototype trace contaminant control system
The steady state contaminant load model based on shuttle equipment and material test programs, and on the current space station studies was revised. An emergency upset contaminant load model based on anticipated emergency upsets that could occur in an operational space station was defined. Control methods for the contaminants generated by the emergency upsets were established by test. Preliminary designs of both steady state and emergency contaminant control systems for the space station application are presented.
Annual Conference on Nuclear and Space Radiation Effects, 18th, University of Washington, Seattle, WA, July 21-24, 1981, Proceedings
Single event upset phenomena are discussed, taking into account cosmic ray induced errors in IIL microprocessors and logic devices, single event upsets in NMOS microprocessors, a prediction model for bipolar RAMs in a high energy ion/proton environment, the search for neutron-induced hard errors in VLSI structures, soft errors due to protons in the radiation belt, and the use of an ion microbeam to study single event upsets in microcircuits. Basic mechanisms in materials and devices are examined, giving attention to gamma induced noise in CCD's, the annealing of MOS capacitors, an analysis of photobleaching techniques for the radiation hardening of fiber optic data links, a hardened field insulator, the simulation of radiation damage in solids, and the manufacturing of radiation resistant optical fibers. Energy deposition and dosimetry is considered along with SGEMP/IEMP, radiation effects in devices, space radiation effects and spacecraft charging, EMP/SREMP, and aspects of fabrication, testing, and hardness assurance.
A prediction model for bipolar RAMs in a high energy ion/proton environment
A model has been developed which predicts the relative susceptibility of bipolar RAMs to heavy ion and proton upset. During the course of evaluating this model, physical and electrical variations were also evaluated indicating that the minimum internal signal level is the primary upset susceptibility indicator. Unfortunately, all of the physical and electrical variations expected during a normal product development cycle are in direct opposition to improved high-energy particle upset tolerance. Hence, a trade-off between highly susceptible, low power (medium speed) devices must be made against the less susceptible, higher power (high speed) equivalent device, taking into account the systems trade-off with respect to system power, software, error correction procedures and/or circuit redundancy.
Modeling "Soft" Errors in Bipolar Integrated Circuits
Mathematical models represent single-event upset in bipolar memory chips. Physics of single-event upset in integrated circuits discussed in theoretical paper. Pair of companion reports present mathematical models to predict critical charges for producing single-event upset in bipolar randomaccess memory (RAM) chips.
Predicting the Cosmic-Ray Environment Near Earth
Package of computer programs developed to predict cosmic-ray environment for spacecraft in orbit near Earth. Single cosmic-ray particle deposits enough electrical charge on sensitive area of individual circuit to change bit state. Single-event upsets may not cause permanent damage but upset functioning devices. Used to predict upset rate for space mission. Also calculates time-average cosmic-ray environment for multiple circular orbits, fragments of trajectories, and isolated points. Package written in HPL for interactive execution and implemented on HP 9825B desktop computer.
Cosmic ray simulation and testing program
Single event upset (SEU) and latchup vulnerabilities were determined for a number of parts of interest to NASA space programs. In cases where a threshold linear energy transfer (LET) for SEU could be measured, an upset rate in a low inclination Space Shuttle orbit was computed. The predicted upset rates are extremely low, except for the devices with LET thresholds below the geomagnetic cutoff for altitude and inclination of the Space Shuttle orbit. While some of the devices do exhibit latchup, the cross sections and threshold LETs are such that the risk associated with flying these devices in low, near equatorial orbits is small if not negligible.
Verification of a SEU model for advanced 1-micron CMOS structures using heavy ions
Modeling and test results are reported for 1 micron CMOS circuits. Analytical predictions are correlated with experimental data, and sensitivities to process and design variations are discussed. Unique features involved in predicting the SEU performance of these devices are described. The results show that the critical charge for upset exhibits a strong dependence on pulse width for very fast devices, and upset predictions must factor in the pulse shape. Acceptable SEU error rates can be achieved for a 1 micron bulk CMOS process. A thin retrograde well provides complete SEU immunity for N channel hits at normal incidence angle. Source interconnect resistance can be important parameter in determining upset rates, and Cf-252 testing can be a valuable tool for cost-effective SEU testing.