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Deep neural network can greatly improve tomography reconstruction with limited data. A recent effort of combining ptycho-tomography model with the 3D U-net demonstrated a significant reduction in both the number of projections and computation time, and showed its potential for integrated circuit imaging that requires high-resolution and fast measurement speed.
Arrays of CdZnTe photodetectors and associated electronic circuitry have been built and tested in a continuing effort to develop focal-plane image sensor systems for hard-x-ray telescopes. Each array contains 24 by 44 pixels at a pitch of 498 m. The detector designs are optimized to obtain low power demand with high spectral resolution in the photon- energy range of 5 to 100 keV. More precisely, each detector array is a hybrid of a CdZnTe photodetector array and an application-specific integrated circuit (ASIC) containing an array of amplifiers in the same pixel pattern as that of the detectors. The array is fabricated on a single crystal of CdZnTe having dimensions of 23.6 by 12.9 by 2 mm. The detector-array cathode is a monolithic platinum contact. On the anode plane, the contact metal is patterned into the aforementioned pixel array, surrounded by a guard ring that is 1 mm wide on three sides and is 0.1 mm wide on the fourth side so that two such detector arrays can be placed side-by-side to form a roughly square sensor area with minimal dead area between them. Figure 1 shows two anode patterns. One pattern features larger pixel anode contacts, with a 30-m gap between them. The other pattern features smaller pixel anode contacts plus a contact for a shaping electrode in the form of a grid that separates all the pixels. In operation, the grid is held at a potential intermediate between the cathode and anode potentials to steer electric charges toward the anode in order to reduce the loss of charges in the inter-anode gaps. The CdZnTe photodetector array is mechanically and electrically connected to the ASIC (see Figure 2), either by use of indium bump bonds or by use of conductive epoxy bumps on the CdZnTe array joined to gold bumps on the ASIC. Hence, the output of each pixel detector is fed to its own amplifier chain.
State-of-the-art (SoA) electronic readout for silicon photomultiplier (SiPM)-based scintillation detectors that demonstrate experimental limits in achievable coincidence time resolution (CTR) leverage low noise, high frequency signal processing to facilitate a single photon time response that is near the limit of the SiPMs architecture. This readout strategy can optimally exploit fast luminescence and prompt photon populations, and promising measurements show detector concepts employing this readout can greatly advance PET detector CTR, relative to SoA in clinical systems. However, the technique employs power hungry components which make the electronics chain impractical for channel-dense time-of-flight (TOF)-PET detectors. We have developed and tested a low noise and high frequency readout circuit which is performant at low power and consists of discrete elements with small footprints, making it feasible for integration into TOF-PET detector prototypes. A 3 × 3 mm 2 Broadcom SiPM with this readout chain exhibited sub-100 ps single photon time resolution at 10 mW of power consumption, with a relatively minor performance degradation to 120 ± 2 ps FWHM at 5 mW. CTR measurements with 3 × 3 × 20 mm 3 LYSO and fast LGSO scintillators demonstrated 127 ± 3 ps and 113 ± 2 ps FWHM at optimal power operation and 133 ± 2 ps and 121 ± 3 ps CTR at 5 mW. BGO crystals 3 × 3 × 20 mm 3 in size show 271 ± 5 ps FWHM CTR (1174 ± 14 ps full-width-at-tenth-maximum (FWTM)) at optimal power dissipation and 289 ± 8 ps (1296 ± 33 ps FWTM) at 5 mW. The compact and low power readout topology that achieves this performance thereby offers a platform to greatly advance PET system CTR and also opportunities to provide high performance TOF-PET at reduced material cost.
Progress towards the realization of quantum computers requires persistent advances in their constituent building blocks-qubits. Novel qubit platforms that simultaneously embody long coherence, fast operation and large scalability offer compelling advantages in the construction of quantum computers and many other quantum information systems 1-3 . Electrons, ubiquitous elementary particles of non-zero charge, spin and mass, have commonly been perceived as paradigmatic local quantum information carriers. Despite superior controllability and configurability, their practical performance as qubits through either motional or spin states depends critically on their material environment 3-5 . In this work, we report our experimental realization of a qubit platform based on isolated single electrons trapped on an ultraclean solid neon surface in vacuum 6-13 . By integrating an electron trap in a circuit quantum electrodynamics architecture 14-20 , we achieve strong coupling between the motional states of a single electron and a single microwave photon in an on-chip superconducting resonator. Qubit gate operations and dispersive readout are implemented to measure the energy relaxation time T 1 of 15 μs and phase coherence time T 2 over 200 ns. These results indicate that the electron-on-solid-neon qubit already performs near the state of the art for a charge qubit 21 .
Optoelectronic materials and devices are examined. Optoelectronic devices, which generate, detect, modulate, or switch electromagnetic radiation are being developed for a variety of space applications. The program includes spatial light modulators, solid state lasers, optoelectronic integrated circuits, nonlinear optical materials and devices, fiber optics, and optical networking photovoltaic technology and optical processing.
Here, we characterize a new x-ray Mixed-Mode Pixel Array Detector (MM-PAD-2.1) Application Specific Integrated Circuit (ASIC). Using an integrating pixel front-end with dynamic charge removal architecture, the MM-PAD-2.1 ASIC extends the maximum measurable x-ray signal (in 20 keV photon units) to > 10 7 x-rays/pixel/frame while maintaining a low read noise across the full dynamic range, all while imaging continuously at a frame rate of up to 10 kHz. The in-pixel dynamic charge removal mechanism prevents saturation of the input amplifier and proceeds in parallel with signal integration to achieve deadtime-less measurements with incident x-ray rates of > 10 10 x-rays/pixel/s. The ASIC format consists of 128 × 128 square pixels each 150 μm on a side and is designed to be 3-side buttable so large arrays can be effectively tiled. Here we use both laboratory x-ray sources and the Cornell High Energy Synchrotron Source (CHESS) to characterize two single ASIC prototype detectors for both low (single x-ray) and high incident flux detection. In the first detector the ASIC was solder bump-bonded to a 500 μm thick Si sensor for efficient detection of x-rays below 20 keV, whereas the second detector used a 750 μm thick CdTe sensor for x-rays above ~20 keV.
The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.
A proposed visible-light imaging spectrometer on a chip would be based on the concept of a heterostructure comprising multiple layers of silicon-based photodetectors interspersed with long-wavelength-pass optical filters. In a typical application, this heterostructure would be replicated in each pixel of an image-detecting integrated circuit of the active-pixel-sensor type (see figure). The design of the heterostructure would exploit the fact that within the visible portion of the spectrum, the characteristic depth of penetration of photons increases with wavelength. Proceeding from the front toward the back, each successive long-wavelength-pass filter would have a longer cutoff wavelength, and each successive photodetector would be made thicker to enable it to absorb a greater proportion of incident longer-wavelength photons. Incident light would pass through the first photodetector and encounter the first filter, which would reflect light having wavelengths shorter than its cutoff wavelength and pass light of longer wavelengths. A large portion of the incident and reflected shorter-wavelength light would be absorbed in the first photodetector. The light that had passed through the first photodetector/filter pair of layers would pass through the second photodetector and encounter the second filter, which would reflect light having wavelengths shorter than its cutoff wavelength while passing light of longer wavelengths. Thus, most of the light reflected by the second filter would lie in the wavelength band between the cutoff wavelengths of the first and second filters. Thus, further, most of the light absorbed in the second photodetector would lie in this wavelength band. In a similar manner, each successive photodetector would detect, predominantly, light in a successively longer wavelength band bounded by the shorter cutoff wavelength of the preceding filter and the longer cutoff wavelength of the following filter.
Fast optical circuit switching has great potential to solve scaling issues with traditional packet-switch based networks and improve bandwidth and power efficiency in datacenter and high-performance computing applications. One difficultly in utilizing a fast optical switch is that the optical signal must be rapidly reacquired after each switching event so as to not significantly impact the overall throughput of the system. In this work we present a system-level integration of a nanosecond-scale $2 \times 2$ silicon photonic switch with a 25-Gbps burst-mode receiver that can lock in 31 ns. A novel FPGA-based control plane was used to generate test data, control the silicon photonic switch and burst-mode receiver, and measure bit errors at 12.5 and 20 Gbps. Error-free links (BER $< 10^{-12}$ ) with system-level reconfiguration times below 60 ns (at 20 Gbps) and 90 ns (at 12.5 Gbps) including bit- and frame-synchronization are demonstrated.
Raytheon is developing NIR sensor chip assemblies (SCAs) for scanning and staring 3D LADAR systems. High sensitivity is obtained by integrating high performance detectors with gain i.e. APDs with very low noise Readout Integrated Circuits. Unique aspects of these designs include: independent acquisition (non-gated) of pulse returns, multiple pulse returns with both time and intensity reported to enable full 3D reconstruction of the image. Recent breakthrough in device design has resulted in HgCdTe APDs operating at 300K with essentially no excess noise to gains in excess of 100, low NEP <1nW and GHz bandwidths and have demonstrated linear mode photon counting. SCAs utilizing these high performance APDs have been integrated and demonstrated excellent spatial and range resolution enabling detailed 3D imagery both at short range and long ranges. In this presentation we will review progress in high resolution scanning, staring and ultra-high sensitivity photon counting LADAR sensors.
Abstract We demonstrate the generation of a cold-atom ensemble within a sub-millimeter diameter hole in a transparent membrane, a so-called “membrane MOT”. With a sub-Doppler cooling process, the atoms trapped by the membrane MOT are cooled down to 10 $$\upmu$$ μ K. The atom number inside the unbridged/bridged membrane hole is about $$10^4$$ 10 4 to $$10^5$$ 10 5 , and the $$1/e^2$$ 1 / e 2 -diameter of the MOT cloud is about 180 $$\upmu$$ μ m for a 400 $$\upmu$$ μ m-diameter membrane hole. Such a membrane device can, in principle, efficiently load cold atoms into the evanescent-field optical trap generated by the suspended membrane waveguide for strong atom-light interaction and provide the capability of sufficient heat dissipation at the waveguide. This represents a key step toward the photonic atom trap integrated platform (ATIP).
The integration of high quality, single crystal thin film gallium arsenide (GaAs) and indium phosphide (InP) based photonic and electronic materials and devices with host microstructures fabricated from materials such as silicon (Si), glass, and polymers will enable the fabrication of the next generation of micro-opto-mechanical systems (MOMS) and optoelectronic integrated circuits. Thin film semiconductor devices deposited onto arbitrary host substrates and structures create hybrid (more than one material) near-monolithic integrated systems which can be interconnected electrically using standard inexpensive microfabrication techniques such as vacuum metallization and photolithography. These integrated systems take advantage of the optical and electronic properties of compound semiconductor devices while still using host substrate materials such as silicon, polysilicon, glass and polymers in the microstructures. This type of materials optimization for specific tasks creates higher performance systems than those systems which must use trade-offs in device performance to integrate all of the function in a single material system. The low weight of these thin film devices also makes them attractive for integration with micromechanical devices which may have difficulty supporting and translating the full weight of a standard device. These thin film devices and integrated systems will be attractive for applications, however, only when the development of low cost, high yield fabrication and integration techniques makes their use economically feasible. In this paper, we discuss methods for alignment, selective deposition, and interconnection of thin film epitaxial GaAs and InP based devices onto host substrates and host microstructures.
We describe the Mu-Spec, an extremely compact high performance spectrometer for the submillimeter and millimeter spectral ranges. We have designed a fully integrated submillimeter spectrometer based on superconducting microstrip technology and fabricated its critical elements. Using low loss transmission lines, we can produce a fully integrated high resolution submillimeter spectrometer on a single four inch Si wafer. A resolution of 500 can readily be achieved with standard fabrication tolerance, higher with phase trimming. All functions of the spectrometer are integrated - light is coupled to the microstrip circuit with a planar antenna, the spectra discrimination is achieved using a synthetic grating, orders are separated using a built-in planar filter, and the light is detected using photon counting Microwave Kinetic Inductance Detectors (MKID). We will discus the design principle of the instrument, describe its technical advantages, and report the progress on the development of the instrument.
Raytheon is developing NIR sensor chip assemblies (SCAs) for scanning and staring 3D LADAR systems. High sensitivity is obtained by integrating high performance detectors with gain, i.e., APDs with very low noise Readout Integrated Circuits (ROICs). Unique aspects of these designs include: independent acquisition (non-gated) of pulse returns, multiple pulse returns with both time and intensity reported to enable full 3D reconstruction of the image. Recent breakthrough in device design has resulted in HgCdTe APDs operating at 300K with essentially no excess noise to gains in excess of 100, low NEP <1nW and GHz bandwidths and have demonstrated linear mode photon counting. SCAs utilizing these high performance APDs have been integrated and demonstrated excellent spatial and range resolution enabling detailed 3D imagery both at short range and long ranges. In the following we will review progress in real-time 3D LADAR imaging receiver products in three areas: (1) scanning 256 x 4 configuration for the Multi-Mode Sensor Seeker (MMSS) program and (2) staring 256 x 256 configuration for the Autonomous Landing and Hazard Avoidance Technology (ALHAT) lunar landing mission and (3) Photon-Counting SCAs which have demonstrated a dramatic reduction in dark count rate due to improved design, operation and processing.
Abstract Frequency-bin encoding furnishes a compelling pathway for quantum information processing systems compatible with established lightwave infrastructures based on fiber-optic transmission and wavelength-division multiplexing. Yet although significant progress has been realized in proof-of-principle tabletop demonstrations, ranging from arbitrary single-qubit gates to controllable multiphoton interference, challenges in scaling frequency-bin processors to larger systems remain. In this Perspective, we highlight recent advances at the intersection of frequency-bin encoding and integrated photonics that are fundamentally transforming the outlook for scalable frequency-based quantum information. Focusing specifically on results on sources, state manipulation, and hyperentanglement, we envision a possible future in which on-chip frequency-bin circuits fulfill critical roles in quantum information processing, particularly in communications and networking.
We describe the micro-Spec, an extremely compact high performance spectrometer for the submillimeter and millimeter spectral ranges. We have designed a fully integrated submillimeter spectrometer based on superconducting microstrip technology and fabricated its critical elements. Using low loss transmission lines, we can produce a fully integrated high resolution submillimeter spectrometer on a single four inch Si wafer. A resolution of 500 can readily be achieved with standard fabrication tolerance, higher with phase trimming. All functions of the spectrometer are integrated - light is coupled to the micro strip circuit with a planar antenna, the spectra discrimination is achieved using a synthetic grating, orders are separated using a built-in planar filter, and the light is detected using photon counting Microwave Kinetic Inductance Detectors (MKID). We will discus the design principle of the instrument, describe its technical advantages, and report the progress on the development of the instrument.
A multi-element HgCdTe electron initiated avalanche photodiode (e-APD) array has been developed for space lidar applications. The detector array was fabricated with 4.3-μm cutoff HgCdTe which covered a spectral response from 0.4 to 4.3 μm. We have characterized a 4x4 detector array with 80 μm square elements and an integrated custom cryogenic silicon read-out integrated circuit (ROIC). The device operated at 77K inside a small closed-cycle Dewar. Measurements showed a unity gain quantum efficiency of about 90% at 1.55 μm. The bulk dark current of the HgCdTe e-APD at 77K was less than 50,000 input referred electrons/s at 12 V APD bias where the APD gain was 620 and the measured noise equivalent power (NEP) was 0.4 fW/Hz1/2. The electrical bandwidth of the ROIC was about 6 MHz, which was chosen to match the laser pulse width of our CO2 lidar. Even with the relatively low bandwidth, the high APD gain and low dark current enabled the device to detect single photon events. Because the APD was biased below the break-down voltage, the detector output was linear with the input optical signal and there was no dead-time and afterpulsing. A new series of HgCdTe e-APDs are being developed with a much wider bandwidth ROIC and higher gain HgCdTe e-APD array, which is expected to give a much better performance in linear mode photon counting applications.
Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specific integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifiers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verified using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.