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At least 217 records · Page 12

Fixed charge in Cr-metallized MOS capacitors

It is pointed out that the reported measurements are useful in a study of interface charge distributions. Measurements of surface-state density at the SiO2 interface given information concerning the effect of the layer thickness on the flat-band interface charge. Other measurements provide data for a determination of the silicon-silica flat-band interface charge, the metal-silica interface charge, and the difference in barrier energies at the interfaces. Measurements of Fowler-Nordheim currents as a function of oxide thickness can be used for the determination of charge distribution in the area next to the metal-silica interface. The investigation shows that the silicon-silica interface is independent of thickness down to thicknesses as low as 40 A.

Lewicki, G.↗

Fast measurement of MOS capacitors

Method allows flatband voltage measurement of capacitors to be taken quickly and precisely while capacitor is subject to desired conditions.

Bates, E. T., Jr.↗

An assembler for the MOS Technology 6502 microprocessor as implemented in jolt (TM) and KIM-1 (TM)

Design of low-cost, microcomputer-based navigation receivers, and the assembler are described. The development of computer software for microprocessors is materially aided by the assembler program using mnemonic variable names. The flexibility of the environment provided by the IBM's Virtual Machine Facility and the Conversational Monitor System, make possible the convenient assembler access. The implementation of the assembler for the microprocessor chip serves a part of the present need and forms a model for support of other microprocessors.

Lilley, R. W.↗

A complementary MOS process

The complete sequence used to manufacture complementary metal oxide semiconductor (CMOS) integrated circuits is described. The fixed-gate array concept is presented as a means of obtaining CMOS integrated circuits in a fast and reliable fashion. Examples of CMOS circuits fabricated by both the conventional method and the fixed-gate array method are included. The electrical parameter specifications and characteristics are given along with typical values used to produce CMOS circuits. Temperature-bias stressing data illustrating the thermal stability of devices manufactured by this process are presented. Results of a preliminary study on the radiation sensitivity of circuits manufactured by this process are discussed. Some process modifications are given which have improved the radiation hardness of our CMOS devices. A formula description of the chemicals and gases along with the gas flow rates is also included.

Jhabvala, M. D.↗

C-MOS bulk metal design handbook

The LSI standard cell array technique was used in the fabrication of more than 20 CMOS custom arrays. This technique consists of a series of computer programs and design automation techniques referred to as the Computer Aided Design And Test (CADAT) system that automatically translate a partitioned logic diagram into a set of instructions for driving an automatic plotter which generates precision mask artwork for complex LSI arrays of CMOS standard cells. The standard cell concept for producing LSI arrays begins with the design, layout, and validation of a group of custom circuits called standard cells. Once validated, these cells are given identification or pattern numbers and are permanently stored. To use one of these cells in a logic design, the user calls for the desired cell by pattern number. The Place, Route in Two Dimension (PR2D) computer program is then used to automatically generate the metalization and/or tunnels to interconnect the standard cells into the required function. Data sheets that describe the function, artwork, and performance of each of the standard cells, the general procedure for implementation of logic in CMOS standard cells, and additional detailed design information are presented.

Edge, T. M.↗

Trapping effects in irradiated and avalanche-injected MOS capacitors

The trapping parameters for holes, and for electrons in the presence of trapped holes, have been measured from a set of wafers with different oxide thickness processed under controlled conditions. The trap cross-sections and densities indicate at least three trap species, including an interfacial species, a dominant bulk species which is determined to tail off from the silicon interface, and a third, lower density bulk species that is distributed throughout the oxide.

Bakowski, M.↗

Measuring radiation effects on MOS capacitors

Electron injection technique serves as powerful probe of trapped hole distribution after irradiation because it was determined that electrons only annihilate trapped holes. Other effects, such as other electron traps and interface state generation, are negligible in injection range used. Trap cross sections and densities indicate at least three trap species; interfacial species, dominant bulk species determined to tail off from silicon interface, and lower density and cross section species that may be distributed throughout bulk of oxide.

Bakowski, M.↗

Tribological properties of sputtered MoS sub 2 films in relation to film morphology

Thin sputter deposited MoS2 films in the 2000 to 6000 A thickness range have shown excellent lubricating properties, when sputtering parameters and substrate conditions are properly selected and precisely controlled. The lubricating properties of sputtered MoS2 films are strongly influenced by their crystalline-amorphous structure, morphology and composition. The coefficient of friction can range from 0.04 which is effective lubrication to 0.4 which reflects an absence of lubricating properties. Visual screening and slight wiping of the as-sputtered MoS2 film can identify the integrity of the film. An acceptable film displays a black-sooty surface appearance whereas an unacceptable film has a highly reflective, gray surface and the film is hard and brittle.

Spalvins, T.↗

Infrared-Responsive Monolithic MOS Circuit

Lead chalcogenide photoresistors integrated with FET amplifiers. Circuit combines voltage divider containing lead chalcogenide photoresistor with FET source follower. Source and drain of FET p-doped regions in underlying n-type silicon wafer. All other structures formed at or deposited above original surface plane of wafer.

Jhabvala, Muzban D.↗

Si MOS devices at low temperatures

Low temperature operation of micron and submicron size Si MOSFETs (metal-oxide-semiconductor field-effect-transistors) results in their improved device characteristics. Various low temperature device properties such as increase in mobility, shift in the theshold voltage, increased reliability, etc., were considered. Other device characteristics such as the subthreshold behavior, delay times and miniaturization at low temperatures are discussed. Discussion includes presenting experimental results along with physical models explaining the observed effects.

Kamgar, A.↗

Analog MOS integrated circuits

The goal was to design single-chip lowpass filters with constant group delay in the pass band and 60 dB minimum attenuation in the stop band. The desired 3 dB frequencies are (in Hertz) 2.5, 5, 10, 20, 40, 80, 160, and 320. A filter class that satisfies the constant delay (linear phase) requirement while providing quite a narrow transition band is the Bessel-Chebyshev filters. It was found that the 7th order Bessel-Chebyshev response satisfied the requirement of the filter.

Temes, Gabor C.↗

Computer modeling of inversion layer MOS solar cells and arrays

A two dimensional numerical model of the inversion layer metal insulator semiconductor (IL/MIS) solar cell is proposed by using the finite element method. The two-dimensional current flow in the device is taken into account in this model. The electrostatic potential distribution, the electron concentration distribution, and the hole concentration distribution for different terminal voltages are simulated. The results of simple calculation are presented. The existing problems for this model are addressed. Future work is proposed. The MIS structures are studied and some of the results are reported.

Ho, Fat Duen↗

Observation of radiation induced changes in stress and electrical properties in MOS devices

Strain measurements using X-ray diffraction were performed on irradiated commercial and radiation-hardened metal gate CMOS devices in addition to polysilicon gate NMOS devices. I-V curves were taken and V(ot) and V(it) were separated using the subthreshold slope method for all devices. A correlation has been shown to exist between physical strain relaxation and the electrical properties as a function of radiation dose and recovery. Data shown suggest that the physical response (strain relaxation) in the silicon at the oxide interface is a measure of the type of damage induced and the recovery mechanism. Postradiation measurements of Delta V(it) and Delta V(ot) taken immediately after irradiation support the conclusions of V. Zekeriya and T.-P. Ma (1983) and K. Kasama et al. (1986, 1987); compressive stress at the silicon/SiO2 interface does reduce radiation damage in the device.

Shaw, D. C.↗

The EPIC-MOS Particle-Induced Background Spectra

In order to analyse diffuse emission that fills the field of view, one must accurately characterize the instrumental backgrounds. For the XMM-Newton EPIC instrument these backgrounds include a temporally variable "quiescent" component. as well as the strongly variable soft proton contamination. We have characterized the spectral and spatial response of the EPIC detectors to these background components and have developed tools to remove these backgrounds from observations. The "quiescent" component was characterized using a combination of the filter-wheel-closed data and a database of unexposed-region data. The soft proton contamination was characterized by differencing images and spectra taken during flared and flare-free intervals. After application of our modeled backgrounds, the differences between independent observations of the same region of "blank sky" are consistent with the statistical uncertainties except when there is clear spectral evidence of solar wind charge exchange emission. Using a large sample of blank sky data, we show that strong magnetospheric SWCX emission requires elevated solar wind fluxes; observations through the densest part of the magnetosheath are not necessarily strongly contaminated with SWCX emission.

Kuntz, K. D.↗