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At least 235 records · Page 13

Mitigating coherent loss in superconducting circuits using molecular self-assembled monolayers

In planar superconducting circuits, decoherence due to materials imperfections, especially two-level-system (TLS) defects at different interfaces, is a primary hurdle for advancing quantum computing and sensing applications. Traditional methods for mitigating TLS loss, such as etching oxide layers at metal and substrate interfaces, have proven to be inadequate due to the persistent challenge of oxide regrowth. In this work, we introduce a novel approach that employs molecular self-assembled monolayers (SAMs) to chemically bind at different interfaces of superconducting circuits. This technique is specifically tested here on coplanar waveguide (CPW) resonators, in which this method not only impedes oxide regrowth after surface etching but can also tailors the dielectric properties at different resonators interfaces. The deployment of SAMs results in a consistent improvement in the measured quality factors across multiple resonators, surpassing those with only oxide-etched resonators. The efficiency of our approach is supported by microwave measurements of multiple devices conducted at millikelvin temperatures and correlated with detailed X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy (TEM) characterizations of SAM-passivated resonators. The compatibility of SAMs materials with the established fabrication techniques offers a promising route to improve the performance of superconducting quantum devices.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND

Literature survey on oxidations and fatigue lives at elevated temperatures

Nickel-base superalloys are the most complex and the most widely used for high temperature applications such as aircraft engine components. The desirable properties of nickel-base superalloys at high temperatures are tensile strength, thermomechanical fatigue resistance, low thermal expansion, as well as oxidation resistance. At elevated temperature, fatigue cracks are often initiated by grain boundary oxidation, and fatigue cracks often propagate along grain boundaries, where the oxidation rate is higher. Oxidation takes place at the interface between metal and gas. Properties of the metal substrate, the gaseous environment, as well as the oxides formed all interact to make the oxidation behavior of nickel-base superalloys extremely complicated. The important topics include general oxidation, selective oxidation, internal oxidation, grain boundary oxidation, multilayer oxide structure, accelerated oxidation under stress, stress-generation during oxidation, composition and substrate microstructural changes due to prolonged oxidation, fatigue crack initiation at oxidized grain boundaries and the oxidation accelerated fatigue crack propagation along grain boundaries.

Liu, H. W.

Design of Sodium Chalcohalide Solid Electrolytes with Mixed Anions for All‐Solid‐State Sodium‐Ion Batteries

Solid-state sodium-ion batteries (SSNIBs) have emerged as a promising alternative to lithium-ion systems for grid-scale energy storage, owing to sodium's abundance and the improved safety of solid-state designs. Among various solid-state electrolytes (SSEs), halide-based Na + SSEs offer high electrochemical stability but are limited by low ionic conductivity and poor thermal stability. Herein, a novel class of sodium hafnium chalcohalide SSEs is reported with a dual-anion (S 2− /Cl − ) framework, with a high ionic conductivity of 4.5 × 10 −4 S cm −1 . The incorporation of sulfur enhances Na⁺ mobility by reducing the migration barrier through increased anion polarizability and expanded diffusion pathways. Additionally, S 2− contributes to stronger interatomic bonding, leading to higher cohesive energy density, improved thermal stability, and mechanical robustness. These SSEs exhibit minimal sulfur oxidation and excellent chemical/electrochemical interface stability with different cathode materials, such as O3-layered NaNi 1/3 Fe 1/3 Mn 1/3 O 2 , P2/O3 layered Na 0.85 Mn 0.5 Ni 0.4 Fe 0.1 O 2 , and Na 3 V 2 (PO 4 ) 3 cathodes. As a result, SSNIBs with P2/O3 layered Na 0.85 Mn 0.5 Ni 0.4 Fe 0.1 O 2 employing the sodium hafnium chalcohalide SSEs demonstrate outstanding cycling performance, achieving a capacity retention of 88.5% after 200 cycles at 0.1 C. This study establishes a new design strategy for high-performance SSEs, demonstrating that mixed-anion frameworks offer a viable route to overcome the intrinsic limitations of single-anion electrolytes in next-generation SSNIBs.

DFT calculation

Pushing the Limits: Maximizing Energy Density in Silicon Sulfide Solid‐State Batteries

Here, for the first time, we demonstrate a silicon solid-state battery (SSB) architecture that achieves >400 Wh kg −1 , approaching the theoretical limit for silicon-based SSBs. This configuration features a 99.9 wt% micro-Si, a thin sulfide solid electrolyte (SSE), and a high-loading NMC811. Key to these results is strategically selecting and evaluating the processing techniques, whether wet or dry, for the negative electrode, positive electrode and thin sheet-type SSE. Excessive lithium incorporation into the silicon host, beyond the Li 3.75 +Si phase to form a LiSi composite, is essential to match the high capacity of the positive electrode. This SSB achieves over 1000 cycles for a 2 mAh cm −2 with ≈80% capacity retention and 94% capacity retention for 3 mAh cm −2 over 500 cycles at 25 °C. Post analysis identifies the primary capacity decay mechanisms as oxidation at the NMC/SSE interface and structural disruptions within NMC. Meanwhile, the Si electrode maintains a robust solid-electrolyte interphase layer, minimizing capacity decay. This study highlights the necessity for improved NMC coatings, lattice oxygen stabilization, and a durable positive electrode-electrolyte interface to improve the long-term stability of SSBs. Strategies leading to a single-layer pouch cell SSB exceeding 400 Wh kg −1 are developed.

25 ENERGY STORAGE

Marine algae growth and carbon capture augmentation by antioxidant nanozymes

Large scale commercial cultivation of microalgae year-round is limited by seasonal stress conditions. The rapid growth and high CO 2 capture of the marine microalga Picochlorum celeri is largely inhibited under winter stress conditions of low temperature and high light. Herein, we demonstrated a nanotechnology approach to enhance the biomass productivity and CO 2 capture of P. celeri under abiotic stress by interfacing with antioxidant cerium oxide nanozymes (nanoceria). Antioxidant nanoceria catalytically scavenged reactive oxygen species (ROS) generated under stress conditions, reducing damage to the microalgae photosynthetic machinery in chloroplasts. Negatively charged poly-acrylic acid-coated nanoceria (PNC, 10 μM) were biocompatible in microalgae cells and colocalized with chloroplasts. In contrast, positively charged aminated nanoceria (ANC) resulted in microalgae aggregation (>50 μM) and were toxic at all concentrations tested (≥10 μM). PNC reduction of ROS levels in microalgae (78%) and superoxide levels (26%), enhanced microalgae growth (65%), photosynthetic performance (130%), and CO 2 uptake rate (380%) under low-temperature stress (15 °C) and high light (500 μmol/m 2 /s PAR) stress relative to controls without nanoceria. Nanoceria augmentation of microalgae provides a rapid and facile technology to increase algae CO 2 capture and biomass under stress conditions.

09 BIOMASS FUELS

Evolution of Ni-Mo/MgO during catalytic methane pyrolysis to produce base-growth nanotubes

Catalytic pyrolysis of methane is a promising approach for affordable hydrogen production without CO 2 emissions. While this process is thermodynamically appealing compared to steam reforming, the high stability of methane requires severe conditions, making catalyst stability challenging. Here, we report the behavior of a highly promising Ni-Mo/MgO catalyst, which greatly outperforms its Ni/MgO, Mo/MgO, and Ni-Mo/SiO 2 counterparts at atmospheric pressure. At 800°C, nearly 229 g of carbon nanotubes per gram of Ni are produced. We propose that this superior performance results from the phase evolution of the catalyst, which exsolves stable nickel catalyst particles under reaction conditions. We further reveal that molybdenum carbide formation reduces sintering and adheres the active catalytic particles to the support throughout the reaction, enabling catalyst reuse. Several characterization techniques (same-spot TEM, XPS, XRD, and Raman) are employed to examine catalyst morphology at every step, fostering a deeper understanding of its catalytic activity and stability.

36 MATERIALS SCIENCE

Low resistance p-type contacts to monolayer WSe2 through chlorinated solvent doping

Tungsten diselenide (WSe 2 ) is a promising p-type semiconductor limited by high contact resistance (R C ) and the lack of a reliable doping strategy. Here, we demonstrate that exposing WSe 2 to chloroform provides simple and stable p-type doping. In monolayer WSe 2 transistors with Pd contacts, chloroform increases the maximum hole current by over 100× (>200 µA/µm), reduces R C to ~ 2.5 kΩ·μm, and retains an on/off ratio of 10 10 at room temperature. These improvements persist for over 8 months, survive a 150 °C thermal anneal, and remain effective down to 10 K, enabling a cryogenic R C of ~ 1 kΩ·μm. Density functional theory indicates that chloroform strongly physisorbs to WSe 2 , inducing hole doping with minimal impact on the electronic states between the valence band and conduction band edges. Auger electron spectroscopy and atomic force microscopy suggest that chloroform intercalates at the WSe 2 interface with the gate oxide, contributing to doping stability and mitigating interfacial dielectric disorder, though further studies are needed to conclusively confirm this mechanism. This robust, scalable approach enables high-yield WSe 2 transistors with good p-type performance.

42 ENGINEERING

Critical role of nitrogen during high temperature scaling of zirconium

The mechanisms of scale cracking, scale color changes, and scale growth, and their interrelations, were studied in zirconium specimens at elevated temperatures in air, oxygen and nitrogen. Nitrogen was found to be responsible for monoclinic-to-cubic ZrO2 conversion, for scale cracking and breakaway on zirconium nitride, and for the formation of ZrN on the metal interface underneath an outer oxide layer.

Evans, E. B.

Space-related composite-material experiments

The preparation of composites in space depends on the immersion of reinforcements in a liquid-metal matrix and their uniform, stable dispersion in the bulk products until solidification occurs. The chief problem in achieving the composite is associated with the 'wetting' of the reinforcements. A study of the theory of wetting revealed that wetting is prevented by the presence of gaseous and oxide contaminants at the interface between the pure liquid and pure solid. Experiment then confirmed that the use of a vacuum environment, cleaning of all surfaces, elevated temperature, ion bombardment, and vigorous mechanical agitation enabled the immersion and dispersion of candidate reinforcements. The technique is limited by the increased tendency for reaction if the time at elevated temperature is extended.

Kaye, S.

Temperature Dependence of Diffusion and Reaction at a Pd/SiC Contact

Schottky diodes of Palladium/SiC are good candidates for hydrogen and hydrocarbon gas sensors at elevated temperature. The detection sensibility of the diodes has been found heavily temperature dependent. In this work, emphasis has been put on the understanding of changes of physical and chemical properties of the Schottky diodes with variation of temperature. Schottky diodes were made by depositing ultra-thin palladium films onto silicon carbide substrates. The electrical and chemical properties of Pd/SiC Schottky contacts were studied by XPS and AES at different annealing temperatures. No significant change in the Schottky barrier height of the Pd/SiC contact was found in the temperature range of RT-400 C. However, both palladium diffused into SiC and silicon migrated into palladium thin film as well as onto surface were observed at room temperature. The formation of palladium compounds at the Pd/SiC interface was also observed. Both diffusion and reaction at the Pd/SiC interface became significant at 300 C and higher temperature. In addition, silicon oxide was found also at the interface of the Pd/SiC contact at high temperature. In this report, the mechanism of diffusion and reaction at the Pd/SiC interface will be discussed along with experimental approaches.

Shi, D.T.

Charge Yield at Low Electric Fields: Considerations for Bipolar Integrated Circuits

A significant reduction in total dose damage is observed when bipolar integrated circuits are irradiated at low temperature. This can be partially explained by the Onsager theory of recombination, which predicts a strong temperature dependence for charge yield under low-field conditions. Reduced damage occurs for biased as well as unbiased devices because the weak fringing field in thick bipolar oxides only affects charge yield near the Si/SiO2 interface, a relatively small fraction of the total oxide thickness. Lowering the temperature of bipolar ICs - either continuously, or for time periods when they are exposed to high radiation levels - provides an additional degree of freedom to improve total dose performance of bipolar circuits, particularly in space applications.

ionizing radiation

Characterization of SiCSiC Composites in Support of Environmental Degradation Modeling

SiCSiC (silicon carbide fiber reinforced silicon carbide) composites are candidate materials for various turbine engine applications because of their high specific strength and good creep and oxidation resistance at elevated temperatures. This study was performed to characterize the microstructure of a melt infiltrated (MI) SiCSiC, and to examine environmental degradation mechanisms occurring in precracked MI SiCSiC CMC specimens under tensile stresses of 30 ksi or less at 815C in dry air or argon. In addition, the oxidation of the BN interface was characterized at815C, and crack opening displacement as a function of stress measurements were made. This material characterization is being performed to obtain data to support NASA GRC modeling of SiCSiC environmental degradation. The comparison of experimentally-observed phenomena with model predictions can lead to improved understanding of material degradation mechanisms.

SiC/SiC composites

High-Quality Factor Microwave Resonators using Rhenium

Coplanar waveguide resonators are a perfect tool to evaluate the losses induced by defects and interfaces in superconducting devices. Even if niobium is the most used superconductor for resonators and qubits, its native oxide at the metal-air (MA) interface limits the device results. Tantalum has recently significantly improved qubit performances due to a thinner and less disordered oxide layer compared to Nb. To further improve the MA interface, we used rhenium, a superconducting material with 1.7 K critical temperature resistant to oxidation: it forms an oxide layer thinner than 1 nm. In this study, we will present a thorough investigation of rhenium CPW resonator measurements with internal quality factors at the single photon level exceeding 2 million. The devices have been fabricated on a sapphire substrate while the processing parameters have been varying and optimized. The measurements have been performed as a function of power and temperature to disentangle different sources of losses, such as two-level systems (TLS) and quasi-particles. A peculiar TLS temperature dependence has been measured and analyzed. In this work, we also vary the participation ratio of the devices to extract the losses introduced by the involved interfaces with higher fidelity and precision. We carried on a deep material characterization effort to link the results to the differences in the fabrication steps, and we will present material characterization measurements performed via AFM, ToF-SIMS, XPS, and TEM.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS

Cryogenic Quenching Process for Electronic Part Screening

The use of electronic parts at cryogenic temperatures (less than 100 C) for extreme environments is not well controlled or developed from a product quality and reliability point of view. This is in contrast to the very rigorous and well-documented procedures to qualify electronic parts for mission use in the 55 to 125 C temperature range. A similarly rigorous methodology for screening and evaluating electronic parts needs to be developed so that mission planners can expect the same level of high reliability performance for parts operated at cryogenic temperatures. A formal methodology for screening and qualifying electronic parts at cryogenic temperatures has been proposed. The methodology focuses on the base physics of failure of the devices at cryogenic temperatures. All electronic part reliability is based on the bathtub curve, high amounts of initial failures (infant mortals), a long period of normal use (random failures), and then an increasing number of failures (end of life). Unique to this is the development of custom screening procedures to eliminate early failures at cold temperatures. The ability to screen out defects will specifically impact reliability at cold temperatures. Cryogenic reliability is limited by electron trap creation in the oxide and defect sites at conductor interfaces. Non-uniform conduction processes due to process marginalities will be magnified at cryogenic temperatures. Carrier mobilities change by orders of magnitude at cryogenic temperatures, significantly enhancing the effects of electric field. Marginal contacts, impurities in oxides, and defects in conductor/conductor interfaces can all be magnified at low temperatures. The novelty is the use of an ultra-low temperature, short-duration quenching process for defect screening. The quenching process is designed to identify those defects that will precisely (and negatively) affect long-term, cryogenic part operation. This quenching process occurs at a temperature that is at least 25 C colder than the coldest expected operating temperature. This quenching process is the opposite of the standard burn-in procedure. Normal burn-in raises the temperature (and voltage) to activate quickly any possible manufacturing defects remaining in the device that were not already rejected at a functional test step. The proposed inverse burn-in or quenching process is custom-tailored to the electronic device being used. The doping profiles, materials, minimum dimensions, interfaces, and thermal expansion coefficients are all taken into account in determining the ramp rate, dwell time, and temperature.

Sheldon, Douglas J.

Silicon-On-Silicon Carbide Platform for Integrated Photonics

Silicon carbide (SiC)'s nonlinear optical properties and applications to quantum information have recently brought attention to its potential as an integrated photonics platform. However, despite its many excellent material properties, such as large thermal conductivity, wide transparency window, and strong optical nonlinearities, it is generally a difficult material for microfabrication. Here, it is shown that directly bonded silicon-on-silicon carbide can be a high-performing hybrid photonics platform that does not require the need to form SiC membranes or directly pattern in SiC. The optimized bonding method yields defect-free, uniform films with minimal oxide at the silicon–silicon–carbide interface. Ring resonators are patterned into the silicon layer with standard, complimentary metal–oxide–semiconductor (CMOS) compatible (Si) fabrication and measure room-temperature, near-infrared quality factors exceeding 10 5 . The corresponding propagation loss is 5.7 dB cm -1 . The process offers a wafer-scalable pathway to the integration of SiC photonics into CMOS devices.

36 MATERIALS SCIENCE

NSC 800, 8-bit CMOS microprocessor

The NSC 800 is an 8-bit CMOS microprocessor manufactured by National Semiconductor Corp., Santa Clara, California. The 8-bit microprocessor chip with 40-pad pin-terminals has eight address buffers (A8-A15), eight data address -- I/O buffers (AD(sub 0)-AD(sub 7)), six interrupt controls and sixteen timing controls with a chip clock generator and an 8-bit dynamic RAM refresh circuit. The 22 internal registers have the capability of addressing 64K bytes of memory and 256 I/O devices. The chip is fabricated on N-type (100) silicon using self-aligned polysilicon gates and local oxidation process technology. The chip interconnect consists of four levels: Aluminum, Polysi 2, Polysi 1, and P(+) and N(+) diffusions. The four levels, except for contact interface, are isolated by interlevel oxide. The chip is packaged in a 40-pin dual-in-line (DIP), side brazed, hermetically sealed, ceramic package with a metal lid. The operating voltage for the device is 5 V. It is available in three operating temperature ranges: 0 to +70 C, -40 to +85 C, and -55 to +125 C. Two devices were submitted for product evaluation by F. Stott, MTS, JPL Microprocessor Specialist. The devices were pencil-marked and photographed for identification.

Suszko, S. F.