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At least 253 records · Page 14

Multi-level, forming and filament free, bulk switching trilayer RRAM for neuromorphic computing at the edge

CMOS-RRAM integration holds great promise for low energy and high throughput neuromorphic computing. However, most RRAM technologies relying on filamentary switching suffer from variations and noise, leading to computational accuracy loss, increased energy consumption, and overhead by expensive program and verify schemes. We developed a filament-free, bulk switching RRAM technology to address these challenges. We systematically engineered a trilayer metal-oxide stack and investigated the switching characteristics of RRAM with varying thicknesses and oxygen vacancy distributions to achieve reliable bulk switching without any filament formation. We demonstrated bulk switching at megaohm regime with high current nonlinearity, up to 100 levels without compliance current. We developed a neuromorphic compute-in-memory platform and showcased edge computing by implementing a spiking neural network for an autonomous navigation/racing task. Our work addresses challenges posed by existing RRAM technologies and paves the way for neuromorphic computing at the edge under strict size, weight, and power constraints.

97 MATHEMATICS AND COMPUTING↗

Single-Chip T/R Module for 1.2 GHz

A single-chip CMOS-based (complementary-metal-oxide-semiconductorbased) transmit/receive (T/R) module is being developed for L-band radar systems. Previous T/R module implementations required multiple chips employing different technologies (GaAs, Si, and others) combined with off-chip transmission lines and discrete components including circulators. The new design eliminates the bulky circulator, significantly reducing the size and mass of the T/R module. Compared to multi-chip designs, the single-chip CMOS can be implemented with lower cost. These innovations enable cost-effective realization of advanced phased array and synthetic aperture radar systems that require integration of thousands of T/R modules. The circulator is a ferromagnetic device that directs the flow of the RF (radio frequency) power during transmission and reception. During transmission, the circulator delivers the transmitted power from the amplifier to the antenna, while preventing it from damaging the sensitive receiver circuitry. During reception, the circulator directs the energy from the antenna to the low-noise amplifier (LNA) while isolating the output of the power amplifier (PA). In principle, a circulator could be replaced by series transistors acting as electronic switches. However, in practice, the integration of conventional series transistors into a T/R chip introduces significant losses and noise. The prototype single-chip T/R module contains integrated transistor switches, but not connected in series; instead, they are connected in a shunt configuration with resonant circuits (see figure). The shunt/resonant circuit topology not only reduces the losses associated with conventional semiconductor switches but also provides beneficial transformation of impedances for the PA and the LNA. It provides full singlepole/ double-throw switching for the antenna, isolating the LNA from the transmitted signal and isolating the PA from the received signal. During reception, the voltage on control line RX/TX (raised bar) is high, causing the field-effect transistor (FET) switch S1 to be closed, forming a parallel resonant tank circuit L1||C1. This circuit presents high impedance to the left of the antenna, so that the received signal is coupled to the LNA. At the same time, FET switches S2 and S3 are open, so that C2 is removed from the circuit (except for a small parasitic capacitance). The combination of L2 and C3 forms a matching network that transforms the antenna impedance of 50 ohms to a higher value from the perspective of the LNA input terminal. This transformation of impedance improves LNA noise figure by increasing the received voltage delivered to the input transistor. This allows lower transconductance and therefore a smaller transistor, which makes it possible to design the CMOS LNA for low power consumption. During transmission, the voltage on control line RX/TX (raised bar) is low, causing switch S1 to be open. In this configuration, the combination of L1 and C1 transforms the antenna impedance to a lower value from the perspective of the PA. This low impedance is helpful in producing a relatively high output power compatible with the low CMOS operating potential. At the same time, switches S2 and S3 are closed, forming the parallel resonant tank circuit L2||C2. This circuit presents high impedance to the right of the antenna, directing the PA output signal to the antenna and away from the LNA. During this time, S3 presents a short circuit across the LNA input terminals to guarantee that the voltage seen by the LNA is small enough to prevent damage.

Moussessian, Alina↗

High-energy micrometre-scale pixel direct conversion X-ray detector

The objective of this work was to fabricate and characterize a new X-ray imaging detector with micrometre-scale pixel dimensions (7.8 µm) and high detection efficiency for hard X-ray energies above 20 keV. A key technology component consists of a monolithic hybrid detector built by direct deposition of an amorphous selenium film on a custom designed CMOS readout integrated circuit. Characterization was carried out at the synchrotron beamline 1-BM-B at the Advanced Photon Source of Argonne National Laboratory. The direct conversion detector demonstrated micrometre-scale spatial resolution with a 63 keV modulation transfer function of 10% at Nyquist frequency. In addition, spatial resolving power down to 8 µm was determined by imaging a transmission bar target at 21 keV. X-ray signal linearity, responsivity and lag were also characterized in the same energy range. Finally, phase contrast edge enhancement was observed in a phase object placed in the beam path. This amorphous selenium/CMOS detector technology can address gaps in commercially available X-ray detectors which limit their usefulness for existing synchrotron applications at energies greater than 50 keV; for example, phase contrast tomography and high-resolution imaging of nanoscale lattice distortions in bulk crystalline materials using Bragg coherent diffraction imaging. Here, the technology will also facilitate the creation of novel synchrotron imaging applications for X-ray energies at or above 20 keV.

36 MATERIALS SCIENCE↗

Radiation Testing on State-of-the-Art CMOS: Challenges, Plans, and Preliminary Results

At GOMAC 2007 and 2008, we discussed a variety of challenges for radiation testing of modern semiconductor devices and technologies [1, 2]. In this presentation, we provide more specific details in this on-going investigation focusing on out-of-the-box lessons observed for providing radiation effects assurances as well as preliminary test results.

LaBel, Kenneth A.↗

Photonic Integrated Circuit (PIC) Device Structures: Background, Fabrication Ecosystem, Relevance to Space Systems Applications, and Discussion of Related Radiation Effects

Electronic integrated circuits are considered one of the most significant technological advances of the 20th century, with demonstrated impact in their ability to incorporate successively higher numbers transistors and construct electronic devices onto a single CMOS chip. Photonic integrated circuits (PICs) exist as the optical analog to integrated circuits; however, in place of transistors, PICs consist of numerous scaled optical components, including such "building-block" structures as waveguides, MMIs, lasers, and optical ring resonators. The ability to construct electronic and photonic components on a single microsystems platform offers transformative potential for the development of technologies in fields including communications, biomedical device development, autonomous navigation, and chemical and atmospheric sensing. Developing on-chip systems that provide new avenues for integration and replacement of bulk optical and electro-optic components also reduces size, weight, power and cost (SWaP-C) limitations, which are important in the selection of instrumentation for specific flight projects. The number of applications currently emerging for complex photonics systems-particularly in data communications-warrants additional investigations when considering reliability for space systems development. This Body of Knowledge document seeks to provide an overview of existing integrated photonics architectures; the current state of design, development, and fabrication ecosystems in the United States and Europe; and potential space applications, with emphasis given to associated radiation effects and reliability.

Body of Knowledge (BOK)↗

Carrier Plus: A sensor payload for Living With a Star Space Environment Testbed (LWS/SET)

The Defense Threat Reduction Agency (DTR4) and National Aeronautics and Space Administration (NASA) Goddard Space Flight Center are collaborating to develop the Carrier Plus sensor experiment platform as a capability of the Space Environments Testbed (SET). The Space Environment Testbed (SET) provides flight opportunities for technology experiments as part of NASA's Living With a Star (LWS) program. The Carrier Plus will provide new capability to characterize sensor technologies such as state-of-the-art visible focal plane arrays (FPAs) in a natural space radiation environment. The technical objectives include on-orbit validation of recently developed FPA technologies and performance prediction methodologies, as well as characterization of the FPA radiation response to total ionizing dose damage, displacement damage and transients. It is expected that the sensor experiment will carry 4-6 FPAs and associated radiation correlative environment monitors (CEMs) for a 2006-2007 launch. Sensor technology candidates may include n- and p-charge coupled devices (CCDs), active pixel sensors (APS), and hybrid CMOS arrays. The presentation will describe the Carrier Plus goals and objectives, as well as provide details about the architecture and design. More information on the LWS program can be found at http://lws.gsfc.nasa.gov/. Business announcements for LWS/SET and program briefings are posted at http://lws-set.gsfc.nasa.gov

Marshall, Cheryl J.↗

High Yield Xray Imager Final Design Review

The High Yield Xray Imager (HYXI) is a new NIF target diagnostic system currently under development. The goal of HYXI is to provide high-fidelity, high temporal resolution x-ray imaging capability on high yield NIF implosions at 10MJ and above. The HYXI instrument design concept is based on the combination of two technologies that have been successfully utilized at the NIF on previous instruments, electron pulse-dilation and hybrid-CMOS sensor imaging. The combination of these two techniques will give HYXI sufficient data quality to ascertain differences in hot spot formation dynamics between high and low yield implosions. This information will highlight the critical hot spot conditions needed for ignition and burn. The HYXI design leverages the successful operation of the PDIXI x-ray imager at the NIF on multi MJ yield shots. A new radiation tolerant CMOS imaging array (HYPERION) is being developed to eliminate the significant background noise which limits the data quality of PDIXI. We successfully placed the contract with Advanced hCMOS Systems (AHS) to develop the HYPERION sensor, which fulfils our criteria to place long lead time item procurements by end of FY24. The HYXI Final Design Review was completed at the end of Q4 FY24 (Sep 24 th and Sep 30 th ). The HYXI project is a multi-year effort with a phased approach to be bring up system functionality over time in parallel with the development and fabrication effort of the HYPERION CMOS imaging array. In Phase 1, time-integrated x-ray images on NIF DT experiments will be collected starting in Q3 FY25. In Phase 2 of the project, time-resolved imaging with HYXI utilizing a spare microchannel plate detector back-end will begin in Q3 FY26. Phase 3 concludes the project with the installation of the HYPERION sensor array and the final performance qualification of the HYXI instrument which is scheduled for Q3 FY27 as discussed in the PDR and MRT report on this project in FY23.

42 ENGINEERING↗

NASA AMES infrared detector assemblies

Silicon: Gallium infrared detector assemblies were designed, fabricated, and tested using techniques representative of those employed for hybrid arrays to determine the suitability of this candidate technology for infrared astronomical detector array applications. Both the single channel assembly and the assembly using a 32 channel CMOS multiplexer are considered. The detector material was certified to have a boron background of less than 10 to the 13th power atoms/sq cm counter doped with phosphorus. The gallium concentration is 2 x 10 to the 16th power atoms/cu cm.

Source record↗

CMOS-fabricated ultraviolet light modulator using low-loss alumina piezo-optomechanical photonics

Ultra-violet (UV) and near-UV wavelengths are necessary for many important optical transitions for quantum technologies and various sensing mechanisms for biological and chemical detection. However, all well-known photonic platforms have excessively high losses in the UV, which has prevented photonic integrated circuits (PICs) being used to address these and other important application spaces. Photonic waveguides using low-loss alumina cores and silicon dioxide cladding have emerged as a promising solution because of alumina’s large optical bandgap and the high quality of films enabled by atomic layer deposition. These properties allow passive, low-loss waveguide operation down to at least 266 nm using multimode widths. However, to the best of our knowledge, active alumina PICs have only been realized using thermo-optic tuning, which precludes switching speeds shorter than approximately 100 microseconds, high circuit densities, and cryogenically compatible operation. Here, we introduce a CMOS-fabricated, piezo-optomechanical PIC platform using alumina waveguides and piezoelectric aluminum nitride strain actuators. The platform allows for sub-microsecond switching times, high circuit densities, and cryogenic operation which is desired in many UV PIC applications. We demonstrate a high-performance, reconfigurable optical filter operating at wavelengths as low as 320 nm. The filter has a 6-nanosecond switching time, a loaded linewidth of 3.3 GHz, tuning rate of 28 V/linewidth, and a hold power of less than 20 nW at one linewidth detuning. This work establishes the foundations for a new class of CMOS-fabricated, rapidly reconfigurable, and low-power UV photonic circuits compatible with wavelengths as low as 225 nm.

Castillo, Zachary A. [Sandia National Laboratories↗

Reflectivity of VUV-sensitive silicon photomultipliers in liquid Xenon

Silicon photomultipliers are regarded as a very promising technology for next-generation, cutting-edge detectors for low-background experiments in particle physics. This work presents systematic reflectivity studies of Silicon Photomultipliers (SiPM) and other samples in liquid xenon at vacuum ultraviolet (VUV) wavelengths. A dedicated setup at the University of Münster has been used that allows to acquire angle-resolved reflection measurements of various samples immersed in liquid xenon with 0.45° angular resolution. Four samples are investigated in this work: one Hamamatsu VUV4 SiPM, one FBK VUV-HD SiPM, one FBK wafer sample and one Large-Area Avalanche Photodiode (LA-APD) from EXO-200. Here, the reflectivity is determined to be 25–36 % at an angle of incidence of 20° for the four samples and increases to up to 65 % at 70° for the LA-APD and the FBK samples. The Hamamatsu VUV4 SiPM shows a decline with increasing angle of incidence. The reflectivity results will be incorporated in upcoming light response simulations of the nEXO detector.

(pin diodes, APDs, SiPMs, G-APDs, CCDs, EBCCDs, EM↗

A Roadmap for Reaching the Potential of Brain-Derived Computing

Neuromorphic computing is a critical future technology for the computing industry, but it has yet to achieve its promise and has struggled to establish a cohesive research community. A large part of the challenge is that full realization of the potential of brain inspiration requires advances in both device hardware, computing architectures, and algorithms. This simultaneous development across technology scales is unprecedented in the computing field. This article presents a strategy, framed by market and policy pressures, for moving past these current technological and cultural hurdles to realize its full impact across technology. Achieving the full potential of brain-derived algorithms as well as post-complementary metal-oxide-semiconductor (CMOS) scaling neuromorphic hardware requires appropriately balancing the near-term opportunities of deep learning applications with the long-term potential of less understood opportunities in neural computing.

97 MATHEMATICS AND COMPUTING↗

Batch VUV4 characterization for the SBC-LAr10 scintillating bubble chamber

The Scintillating Bubble Chamber (SBC) collaboration purchased 32 Hamamatsu VUV4 silicon photomultipliers (SiPMs) for use in SBC-LAr10, a bubble chamber containing 10 kg of liquid argon. A dark-count characterization technique, which avoids the use of a single-photon source, was used at two temperatures to measure the VUV4 SiPMs breakdown voltage (V BD ), the SiPM gain (g SiPM ), the rate of change of g SiPM with respect to voltage (m), the dark count rate (DCR), and the probability of a correlated avalanche (P CA ) as well as the temperature coefficients of these parameters. A Peltier-based chilled vacuum chamber was developed at Queen's University to cool down the Quads to 233.15 ± 0.2 K and 255.15 ± 0.2 K with average stability of ±20 mK. An analysis framework was developed to estimate V BD to tens of mV precision and DCR close to Poissonian error. The temperature dependence of V BD was found to be 56 ± 2 mV K -1 , and m on average across all Quads was found to be (459 ± 3(stat.)±23(sys.))× 10 3 e- PE -1 V -1 . The average DCR temperature coefficient was estimated to be 0.099 ± 0.008 K -1 corresponding to a reduction factor of 7 for every 20 K drop in temperature. The average temperature dependence of P CA was estimated to be 4000 ± 1000 ppm K -1 . P CA estimated from the average across all SiPMs is a better estimator than the P CA calculated from individual SiPMs, for all of the other parameters, the opposite is true. All the estimated parameters were measured to the precision required for SBC-LAr10, and the Quads will be used in conditions to optimize the signal-to-noise ratio.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Infrared readout electronics; Proceedings of the Meeting, Orlando, FL, Apr. 21, 22, 1992

The present volume on IR readout electronics discusses cryogenic readout using silicon devices, cryogenic readout using III-V and LTS devices, multiplexers for higher temperatures, and focal-plane signal processing electronics. Attention is given to the optimization of cryogenic CMOS processes for sub-10-K applications, cryogenic measurements of aerojet GaAs n-JFETs, inP-based heterostructure device technology for ultracold readout applications, and a three-terminal semiconductor-superconductor transimpedance amplifier. Topics addressed include unfulfilled needs in IR astronomy focal-plane readout electronics, IR readout integrated circuit technology for tactical missile systems, and radiation-hardened 10-bit A/D for FPA signal processing. Also discussed are the implementation of a noise reduction circuit for spaceflight IR spectrometers, a real-time processor for staring receivers, and a fiber-optic link design for INMOS transputers.

Fossum, Eric R.↗

Spacecraft in switch matrix for wide band service applicatons in 30/20 GHz communications satellite systems

Bandwidth, switching speed, off-state isolation, and reliability over a ten-year mission were factors in determining the optimum available technology for satellite communications switching in 1982. A proof of concept model for a 20 x 20 coupled crossbar switch matrix designed with FET devices for microwave switching and with high speed CMOS LIS for switch crosspoint addressing was fabricated and tested. Results show the design is feasible for application in a multichannel SS-TDMA communications system. Expandibility can readily be achieved with this design. A conceptual design study for a 100 x 100 switch matrix utilizing a coupled crossbar architecture implemented with a monolithic microwave integrated circuits revealed technology needs for high capacity switch matrices.

Cory, B. J.↗

Combined EDS and EBSD dataset from TiB2 ceramic material

This is supplemental information to a paper to be submitted, tentatively titled Cluster analysis of combined EDS and EBSD data to solve ambiguous phase identifications. Data was acquired from a TiB2 ceramic provided by Missouri University of Science and Technology. Simultaneous EDS and EBSD were acquired on a Tescan MIRA3 GMH field-emission SEM equipped with Oxford Instruments Symmetry CMOS-based EBSD detector and Oxford Instruments UltimMax 170 mm2 silicon-drift detector EDS. Data was acquired using Oxford Instruments AZtec 4.0 software. Data was acquired at 20 keV, 70° tilt, and ≈1 nA probe current. An 80×60 pixel, 40×30 μm map (500 nm pixel pitch) was acquired. EBSD indexing was performed using TiB2, space group 191 P6/mmm, and TiC, space group 225 Fm \bar{3}m, crystal cards.

36 MATERIALS SCIENCE↗

Total Dose Testing of a CMOS Charged Particle Spectrometer

A first-generation CMOS Charged Particle Spectrometer chip [1] was designed at JPL for flight on the STRV-2 spacecraft. These devices will collect electron and proton spectra in low Earth orbit as part of an experiment to demonstrate Active Pixel Sensor (APS) technology in space. This paper presents the results of total dose testing on these chips and, where possible, attempts to extend the results to other Active Pixel Sensors.

CMOS↗

Electronics for Extreme Environments

Most of the NASA missions involve extreme environments comprising radiation and low or high temperatures. Current practice of providing friendly ambient operating environment to electronics costs considerable power and mass (for shielding). Immediate missions such as the Europa orbiter and lander and Mars landers require the electronics to perform reliably in extreme conditions during the most critical part of the mission. Some other missions planned in the future also involve substantial surface activity in terms of measurements, sample collection, penetration through ice and crust and the analysis of samples. Thus it is extremely critical to develop electronics that could reliably operate under extreme space environments. Silicon On Insulator (SOI) technology is an extremely attractive candidate for NASA's future low power and high speed electronic systems because it offers increased transconductance, decreased sub-threshold slope, reduced short channel effects, elimination of kink effect, enhanced low field mobility, and immunity from radiation induced latch-up. A common belief that semiconductor devices function better at low temperatures is generally true for bulk devices but it does not hold true for deep sub-micron SOI CMOS devices with microscopic device features of 0.25 micrometers and smaller. Various temperature sensitive device parameters and device characteristics have recently been reported in the literature. Behavior of state of the art technology devices under such conditions needs to be evaluated in order to determine possible modifications in the device design for better performance and survivability under extreme environments. Here, we present a unique approach of developing electronics for extreme environments to benefit future NASA missions as described above. This will also benefit other long transit/life time missions such as the solar sail and planetary outposts in which electronics is out open in the unshielded space at the ambient space temperatures and always exposed to radiation. Additional information is contained in the original extended abstract.

Patel, J. U.↗