SEARCH · Search NASA
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Over the past few years considerable advancements have been made in the design and manufacture of Millimeter-Wave/Microwave Monolithic Integrated Circuits (MMIC).
A custom designed SRAM was used to measure the thickness of integrated circuit over layers and the epi-layer thickness using alpha particles and a test SRAM. The over layer consists of oxide, nitride, metal, and junction regions.
In this paper, we present a methodology to design for reliability for low temperature applications without requiring process improvement. The developed hot carrier aging lifetime projection model takes into account both the transistor substrate current profile and temperature profile to determine the minimum transistor size needed in order to meet reliability requirements. The methodology is applicable for automotive, military, and space applications, where there can be varying temperature ranges. A case study utilizing this methodology is given to design for reliability into a custom application-specific integrated circuit (ASIC) for a Mars exploration mission.
A proposed special-purpose infrared imaging system would be a compact, portable, less-expensive alternative to functional magnetic resonance imaging (fMRI) systems heretofore used to study brain function. Whereas a typical fMRI system fills a large room, and must be magnetically isolated, this system would fit into a bicycle helmet. The system would include an assembly that would be mounted inside the padding in a modified bicycle helmet or other suitable headgear. The assembly would include newly designed infrared photodetectors and data-acquisition circuits on integrated-circuit chips on low-thermal-conductivity supports in evacuated housings (see figure) arranged in multiple rows and columns that would define image coordinates. Each housing would be spring-loaded against the wearer s head. The chips would be cooled by a small Stirling Engine mounted contiguous to, but thermally isolated from, the portions of the assembly in thermal contact with the wearer s head. Flexible wires or cables for transmitting data from the aforementioned chips would be routed to an integrated, multichannel transmitter and thence through the top of the assembly to a patch antenna on the outside of the helmet. The multiple streams of data from the infrared-detector chips would be sent to a remote site, where they would be processed, by software, into a three-dimensional display of evoked potentials that would represent firing neuronal bundles and thereby indicate locations of neuronal activity associated with mental or physical activity. The 3D images will be analogous to current fMRI images. The data would also be made available, in real-time, for comparison with data in local or internationally accessible relational databases that already exist in universities and research centers. Hence, this system could be used in research on, and for the diagnosis of response from the wearer s brain to physiological, psychological, and environmental changes in real time. The images would also be stored in a relational database for comparison with corresponding responses previously observed in other subjects.
A coplanar waveguide 3 dB quadrature coupler operating from 500 to 700 GHz is designed, fabricated and measured. On-wafer measurements demonstrate an amplitude balance of +/-2 dB and phase balance of +/-20 deg.
A highly programmable, land based, real time synthetic aperture radar (SAR) processor requiring a processed pixel rate of 2.75 MHz or more in a four look system was designed. Variations in range and azimuth compression, number of looks, range swath, range migration and SR mode were specified. Alternative range and azimuth processing algorithms were examined in conjunction with projected integrated circuit, digital architecture, and software technologies. The advaced digital SAR processor (ADSP) employs an FFT convolver algorithm for both range and azimuth processing in a parallel architecture configuration. Algorithm performace comparisons, design system design, implementation tradeoffs and the results of a supporting survey of integrated circuit and digital architecture technologies are reported. Cost tradeoffs and projections with alternate implementation plans are presented.
The Spacecraft Optical Disk Recorder (SODR) is a state of the art mass storage system for future NASA missions requiring high transmission rates and a large capacity storage system. This report covers the design and development of an SODR memory buffer control applications specific integrated circuit (ASIC). The memory buffer control ASIC has two primary functions: (1) buffering data to prevent loss of data during disk access times, (2) converting data formats from a high performance parallel interface format to a small computer systems interface format. Ten 144 p in, 50 MHz CMOS ASIC's were designed, fabricated and tested to implement the memory buffer control function.
A monolithic, GaAs, dual mode, quadrature amplitude shift keying and quadrature phase shift keying transceiver with one and two billion bits per second data rate is being considered to achieve a low power, small and ultra high speed communication system for satellite as well as terrestrial purposes. Recent GaAs integrated circuit achievements are surveyed and their constituent device types are evaluated. Design considerations, on an elemental level, of the entire modem are further included for monolithic realization with practical fabrication techniques. Numerous device types, with practical monolithic compatability, are used in the design of functional blocks with sufficient performances for realization of the transceiver.
This paper summarizes and reports a radiation hardened Spacecraft Integrated Circuit Technology to be flown on board the Cassini spacecraft in 1997 A.D. The Multichip Module has been designed to have an operating life of fifeteen (15) years with appropriate derating guidelines for high reliability.
A monolithic silicon-on-insulator (SOI) complementary metal oxide/semiconductor (CMOS) image-detecting integrated circuit of the active-pixel-sensor type, now undergoing development, is designed to operate at visible and near-infrared wavelengths and to offer a combination of high quantum efficiency and low diffusion and capacitive cross-talk among pixels. The imager is designed to be especially suitable for astronomical and astrophysical applications. The imager design could also readily be adapted to general scientific, biological, medical, and spectroscopic applications. One of the conditions needed to ensure both high quantum efficiency and low diffusion cross-talk is a relatively high reverse bias potential (between about 20 and about 50 V) on the photodiode in each pixel. Heretofore, a major obstacle to realization of this condition in a monolithic integrated circuit has been posed by the fact that the required high reverse bias on the photodiode is incompatible with metal oxide/semiconductor field-effect transistors (MOSFETs) in the CMOS pixel readout circuitry. In the imager now being developed, the SOI structure is utilized to overcome this obstacle: The handle wafer is retained and the photodiode is formed in the handle wafer. The MOSFETs are formed on the SOI layer, which is separated from the handle wafer by a buried oxide layer. The electrical isolation provided by the buried oxide layer makes it possible to bias the MOSFETs at CMOS-compatible potentials (between 0 and 3 V), while biasing the photodiode at the required higher potential, and enables independent optimization of the sensory and readout portions of the imager.
Design of digital adapter with limit storage for transducers for use in multichannel digital data acquisition system
A fault injector system, called an in-circuit injector, was designed and developed to facilitate fault injection experiments performed at NASA-Langley's Avionics Integration Research Lab (AIRLAB). The in-circuit fault injector (ICFI) allows fault injections to be performed on electronic systems without special test features, e.g., sockets. The system supports stuck-at-zero, stuck-at-one, and transient fault models. The ICFI system is interfaced to a VAX-11/750 minicomputer. An interface program has been developed in the VAX. The computer code required to access the interface program is presented. Also presented is the connection procedure to be followed to connect the ICFI system to a circuit under test and the ICFI front panel controls which allow manual control of fault injections.
The configuration described is one of four antenna system configurations developed using a variety of monolithic microwave integrated circuit module arrangements and optical systems. A parametric analysis is expected to produce a data base for the selection of design points for a variety of applications. Soon to be accomplished is the design concept of the active (lens) array, which will take into consideration such factors as, coupling effects, the space-fed power divider network design, input bias and control layout, investigation of thermal distribution, and analysis of module failure (graceful degradation).
Monte Carlo computer analysis method for yield and reliability predictions of integrated circuits
A computer program is described that checks for the correctness of chip design layout generated by the Banning Placement Routing Folding program (PRF) by verifying agreement between a specified circuit design and a corresponding computer generated circuit layout as stored on the Artwork (PRF output) tape. An example computer run is included.
The back-to-back barrier-N-N(+) (bbBNN) varactor is a nonlinear device being developed for frequency multiplier applications above 100 GHz. Its symmetrical C-V characteristic, low series resistance, freedom from external bias and suitability to planarization make it an ideal choice for high frequency, low power, odd harmonic generation. In this paper, the performance of a 220-GHz waveguide tripler using, for the first time, a planar GaAs bbBNN device integrated on a quartz microstrip circuit is presented. A new split-waveguide block design has been employed to provide the proper embedding impedances to the device at the input and third harmonic output frequencies. A flange-to-flange tripling efficiency of 7% has been obtained at 220 GHz with an output power in excess of 700 mu W. This is believed to be the highest conversion efficiency yet reported for a tripler with an integrated device at this frequency. Theoretical calculations indicate that substantial improvement is possible with modest changes to the device and circuit parameters.
Typically, fully active magnetically suspended systems require one axial and two radial magnetic bearings. Combining radial and axial functions into a single device allows for more compact and elegant packaging. Furthermore, in the case of high-speed devices such as energy storage flywheels, it is beneficial to minimize shaft length to keep rotor mode frequencies as high as possible. Attempts have been made to combine radial and axial functionality, but with certain drawbacks. One approach requires magnetic control flux to flow through a bias magnet reducing control effectiveness, thus resulting in increased resistive losses. This approach also requires axial force producing magnetic flux to flow in a direction into the rotor laminate that is undesirable for minimizing eddy-current losses resulting in rotational losses. Another approach applies a conical rotor shape to what otherwise would be a radial heteropolar magnetic bearing configuration. However, positional non-linear effects are introduced with this scheme and the same windings are used for bias, radial, and axial control adding complexity to the controller and electronics. For this approach, the amount of axial capability must be limited. It would be desirable for an integrated radial and axial magnetic bearing to have the following characteristics, separate inputs for radial and axial control for electronics and control simplicity, all magnetic control fluxes should only flow through their respective air gaps and should not flow through any bias magnets for minimal resistive losses, be of a homopolar design to minimize rotational losses, position related non-linear effects should be minimized, and dependent upon the design parameters, be able to achieve any radial/axial force or power ratio as desired. The integrated radial and axial magnetic bearing described in this paper exhibits all these characteristics. Magnetic circuit design, design equations, and analysis results will be presented.
Typically, fully active magnetically suspended systems require one axial and two radial magnetic bearings. Combining radial and axial functions into a single device allows for more compact and elegant packaging. Furthermore, in the case of high-speed devices such as energy storage flywheels, it is beneficial to minimize shaft length to keep rotor mode frequencies as high as possible. Attempts have been made to combine radial and axial functionality, but with certain drawbacks. One approach requires magnetic control flux to flow through a bias magnet reducing control effectiveness, thus resulting in increased resistive losses. This approach also requires axial force producing magnetic flux to flow in a direction into the rotor laminate that is undesirable for minimizing eddy-current losses resulting in rotational losses. Another approach applies a conical rotor shape to what otherwise would be a radial heteropolar magnetic bearing configuration. However, positional non-linear effects are introduced with this scheme and the same windings are used for bias, radial, and axial control adding complexity to the controller and electronics. For this approach, the amount of axial capability must be limited. It would be desirable for an integrated radial and axial magnetic bearing to have the following characteristics; separate inputs for radial and axial control for electronics and control simplicity, all magnetic control fluxes should only flow through their respective air gaps and should not flow through any bias magnets for minimal resistive losses, be of a homopolar design to minimize rotational losses, position related non-linear effects should be minimized, and dependent upon the design parameters, be able to achieve any radial/axial force or power ratio as desired. The integrated radial and axial magnetic bearing described in this paper exhibits all these characteristics. Magnetic circuit design, design equations, and magnetic field modeling results will be presented.