Search NASA⌕ Search

SEARCH · Search NASA

Results for “Memory device”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 325 records · Page 18

Hybrid analog-digital associative neural network

Random access memory is used to store synaptic information in the form of a matrix of rows and columns of binary digits. N rows read in sequence are processed through switches and resistors, and a summing amplifier to N neural amplifiers in sequence, one row for each amplifier, using a first array of sample-and-hold devices S/H1 for commutation. The outputs of the neural amplifiers are stored in a second array of sample-and-hold devices S/H2 so that after N rows are processed, all of said second array of sample-and-hold devices are updated. A second memory may be added for binary values of 0 and -1, and processed simultaneously with the first to provide for values of 1, 0, and -1, the results of which are combined in a difference amplifier.

Moopenn, Alexander W.↗

A radiation - tolerant, low - power non - volatile memory based on silicon nanocrystal quantum dots.

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in Si02 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled.

Green, M. L.↗

Feasibility of self-structured current accessed bubble devices in spacecraft recording systems

The self-structured, current aperture approach to magnetic bubble memory is described. Key results include: (1) demonstration that self-structured bubbles (a lattice of strongly interacting bubbles) will slip by one another in a storage loop at spacings of 2.5 bubble diameters, (2) the ability of self-structured bubbles to move past international fabrication defects (missing apertures) in the propagation conductors (defeat tolerance), and (3) moving bubbles at mobility limited speeds. Milled barriers in the epitaxial garnet are discussed for containment of the bubble lattice. Experimental work on input/output tracks, storage loops, gates, generators, and magneto-resistive detectors for a prototype device are discussed. Potential final device architectures are described with modeling of power consumption, data rates, and access times. Appendices compare the self-structured bubble memory from the device and system perspectives with other non-volatile memory technologies.

Nelson, G. L.↗

Shape Memory Alloy Rock Splitters (SMARS) - A Non-Explosive Method for Fracturing Planetary Rocklike Materials and Minerals

A static rock splitter device based on high-force, high-temperature shape memory alloys (HTSMAs) was developed for space related applications requiring controlled geologic excavation in planetary bodies such as the Moon, Mars, and near-Earth asteroids. The device, hereafter referred to as the shape memory alloy rock splitter (SMARS), consisted of active (expanding) elements made of Ni50.3Ti29.7Hf20 (at.%) that generate extremely large forces in response to thermal input. The preshaping (training) of these elements was accomplished using isothermal, isobaric and cyclic training methods, which resulted in active components capable of generating stresses in excess of 1.5 GPa. The corresponding strains (or displacements) were also evaluated and were found to be 2 to 3 percent, essential to rock fracturing and/or splitting when placed in a borehole. SMARS performance was evaluated using a test bed consisting of a temperature controller, custom heaters and heater holders, and an enclosure for rock placement and breakage. The SMARS system was evaluated using various rock types including igneous rocks (e.g., basalt, quartz, granite) and sedimentary rocks (e.g., sandstone, limestone).

NiTiHf↗

Formal verification of an MMU and MMU cache

We describe the formal verification of a hardware subsystem consisting of a memory management unit and a cache. These devices are verified independently and then shown to interact correctly when composed. The MMU authorizes memory requests and translates virtual addresses to real addresses. The cache improves performance by maintaining a LRU (least recently used) list from the memory resident segment table.

Schubert, E. T.↗

Carbon nanotube switches for memory, RF communications and sensing applications, and methods of making the same

Switches having an in situ grown carbon nanotube as an element thereof, and methods of fabricating such switches. A carbon nanotube is grown in situ in mechanical connection with a conductive substrate, such as a heavily doped silicon wafer or an SOI wafer. The carbon nanotube is electrically connected at one location to a terminal. At another location of the carbon nanotube there is situated a pull electrode that can be used to elecrostatically displace the carbon nanotube so that it selectively makes contact with either the pull electrode or with a contact electrode. Connection to the pull electrode is sufficient to operate the device as a simple switch, while connection to a contact electrode is useful to operate the device in a manner analogous to a relay. In various embodiments, the devices disclosed are useful as at least switches for various signals, multi-state memory, computational devices, and multiplexers.

Kaul, Anupama B.↗

High-Resolution Full-Field Structural Microscopy of the Voltage-Induced Filament Formation in VO 2 -Based Neuromorphic Devices

In order to make neuromorphic functions in memristive devices more efficient, information about the structural properties of filament formation at the micro- and mesoscopic scales is necessary. Despite extensive research on VO 2 , a key material due to its filament formation, local operando structural measurements remain challenging and often involve destructive specimen preparation and long rastering times, greatly limiting the scope of experimental studies. Utilizing dark-field X-ray microscopy (DFXM), a fullfield imaging modality, structural signatures of the filament formation process operando are revealed in VO 2 devices. DFXM experiments illustrate that rutile filaments contain isolated monoclinic clusters, indicating structural nonuniformity interior to the filament. The formation of the rutile phase beneath device electrodes was shown to precede filament development, followed by the formation of filament paths guided by nucleation sites within the device. Finally, a medium-term (<30 min) memory mechanism is observed in VO 2 , mediated by sites within the device gap that tend to switch at significantly lower voltages after electrical cycling, a tendency that persists through a brief thermal reset. High spatial resolution, large field-of-view, structure selectivity, and fast signal acquisition of DFXM provided insight into structural features of the filamentary channel and surrounding regions during voltage cycling.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Implementing a bubble memory hierarchy system

This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.

Segura, R.↗

Gigarad-tolerant power switches and memory elements

A new class of silicon devices operating without p-n junctions has been studied for radiation hardness. The electric field in these devices is uniform over most of the device, thus causing high-voltage breakdown to increase with electrode spacing. Deep acceptor levels are created in the silicon by diffusing gold atoms into the lattice, or by electron radiation. These acceptor levels, near the center of the band gap, trap out electrons so that the low resistivity of the n-type doped wafer can be raised to intrinsic resistivity. Switching between a high-resistivity state at low currents and a low-resistivity state at high currents occurs at a definite threshold voltage, exhibiting characteristics similar to silicon-controlled rectifiers. Compensating 0.1 ohm-meter (10 ohm-cm) silicon wafers requires electron fluxes of 10 to the 23rd electrons per square meter (10 to the 19th electrons per square centimeter). Experiments demonstrating gamma tolerance to 1 Gigarad(Si) are described. Calculations for maximum tolerable neutron fluence are shown, and a phenomenological explanation for these results is presented.

Joyner, W. T.↗

Variation-Resilient FeFET-Based In-Memory Computing Leveraging Probabilistic Deep Learning

Reliability issues stemming from device level nonidealities of nonvolatile emerging technologies like ferroelectric field-effect transistors (FeFETs), especially at scaled dimensions, cause substantial degradation in the accuracy of in-memory crossbar-based AI systems. Here, in this work, we present a variation-aware design technique to characterize the device level variations and to mitigate their impact on hardware accuracy employing a Bayesian neural network (BNN) approach. An effective conductance variation model is derived from the experimental measurements of cycle-to-cycle (C2C) and device-to-device (D2D) variations performed on FeFET devices fabricated using 28 nm high-k metal gate technology. The variations were found to be a function of different conductance states within the given programming range, which sharply contrasts earlier efforts where a fixed variation dispersion was considered for all conductance values. Such variation characteristics formulated for three different device sizes at different read voltages were provided as prior variation information to the BNN to yield a more exact and reliable inference. Near-ideal accuracy for shallow networks (MLP5 and LeNet models) on the MNIST dataset and limited accuracy decline by ~3.8%–16.1% for deeper AlexNet models on CIFAR10 dataset under a wide range of variations corresponding to different device sizes and read voltages, demonstrates the efficacy of our proposed device-algorithm co-design technique.

97 MATHEMATICS AND COMPUTING↗

Unconventional unidirectional magnetoresistance in heterostructures of a topological semimetal and a ferromagnet

Unidirectional magnetoresistance (UMR) in a bilayer heterostructure, consisting of a spin-source material and a magnetic layer, refers to a change in the longitudinal resistance on the reversal of magnetization and originates from the interaction of non-equilibrium spin accumulation and magnetization at the interface. Since the spin polarization of an electric-field-induced non-equilibrium spin accumulation in conventional spin-source materials is restricted to be in the film plane, the ensuing UMR can only respond to the in-plane component of magnetization. However, magnets with perpendicular magnetic anisotropy are highly desired for magnetic memory and spin-logic devices, whereas the electrical read-out of perpendicular magnetic anisotropy magnets through UMR is critically missing. Here, in this study, we report the discovery of an unconventional UMR in the heterostructures of a topological semimetal (WTe 2 ) and a perpendicular magnetic anisotropy ferromagnetic insulator (Cr 2 Ge 2 Te 6 ), which allows to electrically read the up and down magnetic states of the Cr 2 Ge 2 Te 6 layer through longitudinal resistance measurements.

Kao, I-Hsuan [Carnegie Mellon Univ., Pittsburgh, P↗

Strain-concentration for fast, compact photonic modulation and non-volatile memory

A critical figure of merit (FoM) for electro-optic (EO) modulators is the transmission change per voltage, d T / d V . Conventional approaches in wave-guided modulators maximize d T / d V via a high EO coefficient or longer light-material interaction lengths but are ultimately limited by material losses and nonlinearities. Optical and RF resonances improve d T / d V at the cost of spectral non-uniformity, especially for high- Q optical cavity resonances. Here, we introduce an EO modulator based on piezo-strain-concentration of a photonic crystal cavity to address both trade-offs: (i) it eliminates the trade-off between d T / d V and waveguide loss—i.e., enhancement of the resonance tuning efficiency d v c / d V for the fixed EO coefficient, waveguide length, and cavity Q —and (ii) at high DC strains it exhibits a non-volatile (NV) cavity tuning Δ v c ,NV for passive memory and programming of multiple devices into resonance despite fabrication variations. The device is fabricated on a scalable silicon nitride-on-aluminum nitride platform. We measure d v c / d V =177±1MHz/V, corresponding to Δ v c =40±0.32GHz for a voltage spanning ±120V with an energy consumption of δ U /Δ v c =0.17nW/GHz. The modulation bandwidth is flat up to ω BW,3dB /2 π =3.2±0.07MHz for broadband DC-AC and 142±17MHz for resonant operation near a 2.8 GHz mechanical resonance. Optical extinction up to 25 dB is obtained via Fano-type interference. Strain-induced beam-buckling modes are programmable under a “read-write” protocol with a continuous, repeatable tuning range of 5±0.25GHz, allowing for storage and retrieval, which we quantify with mutual information of 2.4 bits and a maximum non-volatile excursion of 8 GHz. Using a full piezo-optical finite-element-model (FEM) we identify key design principles for optimizing strain-based modulators and chart a path towards achieving performance comparable to lithium niobate-based modulators and the study of high strain physics on-chip.

Wen, Y. Henry (ORCID:0009000685423628)↗

Exploring transport-enabled gates with integrated optical addressing to demonstrate high fidelity control of trapped ion qubits in a scalable quantum computer

In recent years, experiments involving micofabricated surface ion traps have grown in complexity, and as this complexity grows, a common design has emerged in the form of quantum charge-coupled device architecture. This architecture, already utilized on multiple systems, supports multiple zones on a device for areas such as memory or computation. The shutting process between these zones is a process often seen to be minimized. An additional component to scalable surface trapped-ion experiments includes some form of integrated photonics, as free space lasers have difficulty scaling to many ions. Here, we discuss recent results in utilizing the shuttling process with integrated photonics to perform a specific type of gate, as well as demonstrating state preparation. Furthermore, we show that these gates can be utilized as a type of optical modulator as the Doppler shift that occurs during shuttling will make the light seen by shuttled ions different than that seen by stationary ions. Furthermore, we show that the shuttling operation can be utilized as an optical modulator, where the Doppler shift changes the frequency from that of a stationary ion.

42 ENGINEERING↗

Advances in rechargeable lithium molybdenum disulfide batteries

The lithium molybdenum disulfide system as demonstrated in a C size cell, offers performance characteristics for applications where light weight and low volume are important. A gravimetric energy density of 90 watt hours per kilogram can be achieved in a C size cell package. The combination of charge retention capabilities, high energy density and a state of charge indicator in a rechargeable cell provides power package for a wide range of devices. The system overcomes the memory effect in Nicads where the full capacity of the battery cannot be utilized unless it was utilized on previous cycles. The development of cells with an advanced electrolyte formulation led to an improved rate capability especially at low temperatures and to a significantly improved life cycle.

Brandt, K.↗

Computers in Aerospace Conference, 5th, Long Beach, CA, October 21-23, 1985, Technical Papers

Among the topics discussed are: access control models for a distributed CAIS-conforming system; a knowledge-based advisory system for casualty procedures; and automated interactive simulation modeling system. Consideration is also given to: reusable software concepts and software development methodologies; the electronic device aspects of neutral network memories; an expert system for automated satellite anomaly resolution; and the use of automatic programming techniques for fault-tolerant computing systems. Among additional topics discussed are: systems approaches to software fault tolerance; a Space Shuttle navigation validation system; and a vision-based road following system for an autonomous land vehicle.

Source record↗

Temperature Dependence Of Single-Event Effects

Report describes experimental study of effects of temperature on vulnerability of integrated-circuit memories and other electronic logic devices to single-event effects - spurious bit flips or latch-up in logic state caused by impacts of energetic ions. Involved analysis of data on 14 different device types. In most cases examined, vulnerability to these effects increased or remain constant with temperature.

Coss, James R.↗

Coupling device with improved thermal interface

The primary object of the present invention is to provide a simple, reliable, and lightweight coupling that will also have an efficient thermal interface. A further object of the invention is to provide a coupling that is capable of blind mating with little or no insertion forces. Another object of the invention is to provide a coupling that acts as a thermal regulator to maintain a constant temperature on one side of the coupling. Another object of the invention is to increase the available surface area of a coupling thus providing a larger area for the conduction of heat across the thermal interface. Another object of the invention is to provide a fluidic coupling that has no fluid passing across the interface, thus reducing the likelihood of leaks and contamination. The foregoing objects are achieved by utilizing, as in the prior art, a hot area (at an elevated temperature as compared to a cold area) with a need to remove excess heat from the hot area to a cold area. In this device, the thermal interface will occur not on a planar horizontal surface, but along a non-planar vertical surface, which will reduce the reaction forces and increase the thermal conductivity of the device. One non-planar surface is a surface on a cold pin extending from the cold area and the other non-planar surface is a surface on a hot pin extending from the hot area. The cold pin is fixed and does not move while the hot pin is a flexible member and its movement towards the cold pin will bring the two non-planar surfaces together forming the thermal interface. The actuating member for the device is a shape-memory actuation wire which is attached through an aperture to the hot pin and through another aperture to an actuation wire retainer. By properly programming the actuation wire, heat from the hot area will cause the actuation wire to bend the hot wire. Heat from the hot area will cause the actuation wire to bend the hot pin towards the cold pin forming the coupling and the desired thermal interface. The shape-memory actuation wire is made of a shape-memory-effect alloy such as Nitinol.

Milam, Malcolm Bruce↗