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Results for “Non-Volatile”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 325 records · Page 18

Interlayer Exciton Polarons in Mesoscopic V 2 O 5 for Broadband Optoelectronic Synapses

Persistent photoconductivity and optoelectronic synaptic behavior are demonstrated in solution-processed mesoscopic α-phase vanadium pentoxide (V 2 O 5 ) thin films. First-principles simulations coupled with the two-site Holstein polaron hopping model show that vacancies at the terminal oxygen position lead to long recombination times because photoexcited electrons and holes reside on different layers separated by the van der Waals gap, forming a weakly coupled interlayer exciton polaron. Mid-gap polaronic states also significantly broaden the photoresponse of the films to span across visible and infrared wavelengths. By controlling the amplitude/intensity, duration, and/or number of optical pulses, tunable optoelectronic memory functions, such as short-term and long-term plasticity, are experimentally established in V 2 O 5 -based optoelectronic synapses. Furthermore, device fabrication was extended to mechanically flexible ultrathin glass substrates. Flexible optoelectronic synapses maintained high performance after 150 bending cycles.

Phan, Thanh Luan [National Renewable Energy Labora↗

Compute in‐Memory with Non‐Volatile Elements for Neural Networks: A Review from a Co‐Design Perspective

Abstract Deep learning has become ubiquitous, touching daily lives across the globe. Today, traditional computer architectures are stressed to their limits in efficiently executing the growing complexity of data and models. Compute‐in‐memory (CIM) can potentially play an important role in developing efficient hardware solutions that reduce data movement from compute‐unit to memory, known as the von Neumann bottleneck. At its heart is a cross‐bar architecture with nodal non‐volatile‐memory elements that performs an analog multiply‐and‐accumulate operation, enabling the matrix‐vector‐multiplications repeatedly used in all neural network workloads. The memory materials can significantly influence final system‐level characteristics and chip performance, including speed, power, and classification accuracy. With an over‐arching co‐design viewpoint, this review assesses the use of cross‐bar based CIM for neural networks, connecting the material properties and the associated design constraints and demands to application, architecture, and performance. Both digital and analog memory are considered, assessing the status for training and inference, and providing metrics for the collective set of properties non‐volatile memory materials will need to demonstrate for a successful CIM technology.

36 MATERIALS SCIENCE↗

Compact Ferroelectric Programmable Majority Gate for Compute-in-Memory Applications

In this study, a compact and novel ferroelectric (FE) programmable majority gate is proposed and its novel application in Binary Neural Network (BNNs) is investigated. We demonstrate: i) by integrating N metal-ferroelectric-metal (MFM) capacitors on the gate of a transistor (1T-N-MFM structure), a nonvolatile and programmable majority (MAJ) gate that performs MAJ of AND between the gate input and polarization is realized; ii) validation the functionality of our 3-input MAJ of AND gate through comprehensive theoretical and experimental investigations; iii) a compact implementation of 3-input MAJ of XNOR gate that leverages only five of our 3-input MAJ of AND gates connected in parallel; iv) application of MAJ of XNOR gates to replace the XNOR gates and the first layer of the adder tree in the BNNs for up to 21x area saving on top of eliminating the energy-hungry memory accesses due to the compute-in-memory nature.

97 MATHEMATICS AND COMPUTING↗

Heavy-ion-induced displacement damage effects in magnetic tunnel junctions with perpendicular anisotropy

Here, we evaluate the resilience of CoFeB/MgO/CoFeB magnetic tunnel junctions (MTJs) with perpendicular magnetic anisotropy to displacement damage induced by heavy ion irradiation. MTJs were exposed to 3 MeV Ta 2+ ions at different levels of ion beam fluence spanning five orders of magnitude. The devices remained insensitive to beam fluences up to 10 11 ions/cm 2 , beyond which a gradual degradation in the device magnetoresistance, coercive magnetic field, and spin-transfer-torque switching voltage were observed, ending with a complete loss of magnetoresistance at very high levels of displacement damage (>0.035 displacements per atom). The loss of magnetoresistance is attributed to structural damage at the MgO interfaces, which allows electrons to scatter among the propagating modes within the tunnel barrier and reduces the net spin polarization. Ion-induced damage to the interface also reduces the perpendicular magnetic anisotropy. This study clarifies the displacement damage thresholds that lead to significant irreversible changes in the characteristics of spin-transfer-torque magnetic random access memory (STT-MRAM) and elucidates the physical mechanisms underlying the deterioration in device properties.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗

The Effect of Integration of Strontium-Bismuth-Tantalate Capacitors onto SOI Wafers

We report for the first time the successful integration of Strontium-Bismuth-Tantalate ferroelectric capacitors on an SOI Substrate. We have verified that the unique processing requirements of SBT capacitors does not affect the properties of the surrounding FD-SOI transistors, and, conversely, we have verified that the SOI processing does not affect the quality of the SBT capacitors.

memory↗

Single-Event Effect Performance of a Conductive-Bridge Memory EEPROM

We investigated the heavy ion SEE characteristics of an EEPROM based on CBRAM technology. SEFI is the dominant type of SEE for each operating mode (standby, read-only, write/read). We also observed single bit upsets in the CBRAM cell, during write/read tests. the SEULET threshold is between 10 and 20 MeV * sq cm/mg, with an upper fluence limit of 3 × 10(exp 6) cm(exp -2) at 10 MeV * sq cm/mg. In the stand by mode, the CBRAM array appears immune to bit upsets.

single event effects↗

One Time Programmable Antifuse Memory Based on Bulk Junctionless Transistor

One time programmable (OTP) antifuse base memory is demonstrated based on a bulk junctionless gate-all-around (GAA) nanowire transistor technology. The presented memory consists of a single transistor (1T) footprint without any process modification. The source/drain (S/D) and gate respectively become bit line and word line where the antifuse is formed by oxide breakdown across the gate and the channel. The channel is connected directly to the bit line due to junctionless S/D and inherently isolated from the neighboring cell by the GAA channel. Therefore, an array of 1T antifuse OTP can be a candidate for the sub-5-nanometer technology node.

Antifuse↗