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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 325 records · Page 18
All sourcesNASA NTRSDOE OSTI
NASA NTRS1976

Status of silicon solar cell technology

Major progress in solar cell technology leading to increased efficiency has occurred since 1970. Technical approaches leading to this increased output include surface texturing, improved antireflection coatings, reduced grid pattern area coverage, shallow junctions and back surface fields. The status of these developments and their incorporation into cell production is discussed. Future research and technology trends leading to further efficiency increases and substantial cost reductions are described.

Brandhorst, H. W., Jr.↗
NASA NTRS1986

Optimization methods and silicon solar cell numerical models

The goal of this project is the development of an optimization algorithm for use with a solar cell model. It is possible to simultaneously vary design variables such as impurity concentrations, front junction depth, back junctions depth, and cell thickness to maximize the predicted cell efficiency. An optimization algorithm has been developed and interfaced with the Solar Cell Analysis Program in 1 Dimension (SCAPID). SCAPID uses finite difference methods to solve the differential equations which, along with several relations from the physics of semiconductors, describe mathematically the operation of a solar cell. A major obstacle is that the numerical methods used in SCAPID require a significant amount of computer time, and during an optimization the model is called iteratively until the design variables converge to the value associated with the maximum efficiency. This problem has been alleviated by designing an optimization code specifically for use with numerically intensive simulations, to reduce the number of times the efficiency has to be calculated to achieve convergence to the optimal solution. Adapting SCAPID so that it could be called iteratively by the optimization code provided another means of reducing the cpu time required to complete an optimization. Instead of calculating the entire I-V curve, as is usually done in SCAPID, only the efficiency is calculated (maximum power voltage and current) and the solution from previous calculations is used to initiate the next solution.

Girardini, K.↗
NASA NTRS1979

Method of construction of a multi-cell solar array

The method of constructing a high voltage, low power, multicell solar array is described. A solar cell base region is formed in a substrate such as but not limited to silicon or sapphire. A protective coating is applied on the base and a patterned etching of the coating and base forms discrete base regions. A semiconductive junction and upper active region are formed in each base region, and defined by photolithography. Thus, discrete cells which are interconnected by metallic electrodes are formed.

Routh, D. E.↗
NASA NTRS1981

Processing of silicon solar cells by ion implantation and laser annealing

Methods to improve the radiation tolerance of silicon cells for spacecraft use are described. The major emphasis of the program was to reduce the process-induced carbon and oxygen impurities in the junction and base regions of the solar cell, and to measure the effect of reduced impurity levels on the radiation tolerance of cells. Substrates of 0.1, 1.0 and 10.0 ohm-cm float-zone material were used as starting material in the process sequence. High-dose, low-energy ion implantation was used to form the junction in n+p structures. Implant annealing was performed by conventional furnace techniques and by pulsed laser and pulsed electron beam annealing. Cells were tested for radiation tolerance at Spire and NASA-LeRC. After irradiation by 1 MeV electrons to a fluence of 10 to the 16th power per sq cm, the cells tested at Spire showed no significant process induced variations in radiation tolerance. However, for cells tested at Lewis to a fluence of 10 to the 15th power per sq cm, ion-implanted cells annealed in vacuum by pulsed electron beam consistently showed the best radiation tolerance for all cell resistivities.

Minnucci, J. A.↗
NASA NTRS1984

A theoretical study of the effects of interacting grain boundaries on electron-beam-induced currents

The influence of several grain boundaries on the electron-beam-induced current in polycrystalline silicon is investigated. The simple geometry contemplated here, consisting of two plane parallel grain boundaries possessing different effective, albeit constant, surface recombination velocities, intersecting a planar junction at right angles allows for an exact solution of the corresponding boundary value problem. It is shown that if the distance between the grain boundaries w becomes less than the diffusion length for minority carriers L within the grain, the grain boundary with the smaller effective recombination velocity becomes less and less visible the smaller the ratio w/L.

Luke, K. L.↗
NASA NTRS2004

Silicon Carbide Schottky Barrier Diode

This chapter reviews the status of SiC Schottky barrier diode development. The fundamental of Schottky barrier diodes is first provided, followed by the review of high-voltage SiC Schottky barrier diodes, junction-barrier Schottky diodes, and merged-pin-Schottky diodes. The development history is reviewed ad the key performance parameters are discussed. Applications of SiC SBDs in power electronic circuits as well as other areas such as gas sensors, microwave and UV detections are also presented, followed by discussion of remaining challenges.

Zhao, Jian H.↗
NASA NTRS1985

High-efficiency silicon solar-cell design and practical barriers

A numerical evaluation technique is used to study the impact of practical barriers, such as heavy doping effects (Auger recombination, band gap narrowing), surface recombination, shadowing losses and minority-carrier lifetime (Tau), on a high efficiency silicon solar cell performance. Considering a high Tau of 1 ms, efficiency of a silicon solar cell of the hypothetical case is estimated to be around 29%. This is comparable with (detailed balance limit) maximum efficiency of a p-n junction solar cell of 30%. Value of Tau is varied from 1 second to 20 micro. Heavy doping effects, and realizable values of surface recombination velocities and shadowing, are then considered in succession and their influence on cell efficiency is evaluated and quantified. These practical barriers cause the cell efficiency to reduce from the maximum value of 29% to the experimentally achieved value of about 19%. Improvement in open circuit voltage V sub oc is required to achieve cell efficiency greater than 20%. Increased value of Tau reduces reverse saturation current and, hence, improves V sub oc. Control of surface recombination losses becomes critical at higher V sub oc. Substantial improvement in Tau and considerable reduction in surface recombination velocities is essential to achieve cell efficiencies greater than 20%.

Mokashi, A.↗
NASA NTRS2005

Measurements of Breakdown Field and Forward Current Stability in 3C-SiC P-N Junction Diodes Grown on Step-Free 4H-SiC

This paper reports on initial fabrication and electrical characterization of 3C-SiC p-n junction diodes grown on step-free 4H-SiC mesas. Diodes with n-blocking-layer doping ranging from approx. 2 x 10(exp 16)/cu cm to approx.. 5 x 10(exp 17)/cu cm were fabricated and tested. No optimization of junction edge termination or ohmic contacts was employed. Room temperature reverse characteristics of the best devices show excellent low-leakage behavior, below previous 3C-SiC devices produced by other growth techniques, until the onset of a sharp breakdown knee. The resulting estimated breakdown field of 3C-SiC is at least twice the breakdown field of silicon, but is only around half the breakdown field of <0001> 4H-SiC for the doping range studied. Initial high current stressing of 3C diodes at 100 A/sq cm for more than 20 hours resulted in less than 50 mV change in approx. 3 V forward voltage. 3C-SiC, pn junction, p+n diode, rectifier, reverse breakdown, breakdown field,heteroepitaxy, epitaxial growth, electroluminescence, mesa, bipolar diode

Neudeck, Philip G.↗
NASA NTRS1970

Improved silicon solar cells

Redistribution of phosphorus within the n-type layers of n-on-p silicon solar cells results in significant improvements in cell performance. Electrical current output is increased, reduction in current output due to radiation damage is lessened, and very shallow junctions are no longer needed.

Kautz, H. E.↗
NASA NTRS1980

Ion-implanted laser annealed silicon solar cells

Development of low cost solar cells fabrication technology is being sponsored by NASA JPL as part of the Low Cost Solar Array Project (LSA). In conformance to Project requirements ion implantation and laser annealing were evaluated as junction formation techniques offering low cost-high throughput potential. Properties of cells fabricated utilizing this technology were analyzed by electrical, transmission electron microscopy, Rutherford backscattering and secondary ion mass spectrometry techniques. Tests indicated the laser annealed substrates to be damage free and electrically active. Similar analysis of ion implanted furnace annealed substrates revealed the presence of residual defects in the form of dislocation lines and loops with substantial impurity redistribution evident for some anneal temperature/time regimes. Fabricated laser annealed cells exhibited improved spectral response and conversion efficiency in comparison to furnace annealed cells. An economic projection for LSA indicates a potential for considerable savings from laser annealing technology.

Katzeff, J. S.↗
NASA NTRS1980

Development of low cost contacts to silicon solar cells

A copper based contact system using plated Pd-Cr-Cu was developed. Good cells were made but cells degraded under low temperature (300 C) heat treatments. The degradation was identified as copper migration into the cells junction region. A paper study was conducted to find a proper barrier to the copper migration problem. Nickel was identified as the best candidate barrier and this was verified in a heat treatment study using evaporated metal layers. An electroless nickel solution was substituted for the electroless chromium solution in the original process.

Tanner, D. P.↗
NASA NTRS1999

Analyses of Transistor Punchthrough Failures

The failure of two transistors in the Altitude Switch Assembly for the Solid Rocket Booster followed by two additional failures a year later presented a challenge to failure analysts. These devices had successfully worked for many years on numerous missions. There was no history of failures with this type of device. Extensive checks of the test procedures gave no indication for a source of the cause. The devices were manufactured more than twenty years ago and failure information on this lot date code was not readily available. External visual exam, radiography, PEID, and leak testing were performed with nominal results Electrical testing indicated nearly identical base-emitter and base-collector characteristics (both forward and reverse) with a low resistance short emitter to collector. These characteristics are indicative of a classic failure mechanism called punchthrough. In failure analysis punchthrough refers to an condition where a relatively low voltage pulse causes the device to conduct very hard producing localized areas of thermal runaway or "hot spots". At one or more of these hot spots, the excessive currents melt the silicon. Heavily doped emitter material diffuses through the base region to the collector forming a diffusion pipe shorting the emitter to base to collector. Upon cooling, an alloy junction forms between the pipe and the base region. Generally, the hot spot (punch-through site) is under the bond and no surface artifact is visible. The devices were delidded and the internal structures were examined microscopically. The gold emitter lead was melted on one device, but others had anomalies in the metallization around the in-tact emitter bonds. The SEM examination confirmed some anomalies to be cosmetic defects while other anomalies were artifacts of the punchthrough site. Subsequent to these analyses, the contractor determined that some irregular testing procedures occurred at the time of the failures heretofore unreported. These testing irregularities involved the use of a breakout box and were the likely cause of the failures. There was no evidence to suggest a generic failure mechanism was responsible for the failure of these transistors.

Nicolas, David P.↗
NASA NTRS1988

Forming n/p Junctions With An Excimer Laser

Compact equipment yields high-quality solar cells. Computer controls pulses of excimer laser and movement of silcon wafer. Mirrors direct laser beam to wafer. Lenses focus beam to small spot on surface. Process suitable for silicon made by dendritic-web-growth process.

Alexander, Paul, Jr.↗
NASA NTRS1986

Optimization methods and silicon solar cell numerical models

An optimization algorithm for use with numerical silicon solar cell models was developed. By coupling an optimization algorithm with a solar cell model, it is possible to simultaneously vary design variables such as impurity concentrations, front junction depth, back junction depth, and cell thickness to maximize the predicted cell efficiency. An optimization algorithm was developed and interfaced with the Solar Cell Analysis Program in 1 Dimension (SCAP1D). SCAP1D uses finite difference methods to solve the differential equations which, along with several relations from the physics of semiconductors, describe mathematically the performance of a solar cell. A major obstacle is that the numerical methods used in SCAP1D require a significant amount of computer time, and during an optimization the model is called iteratively until the design variables converge to the values associated with the maximum efficiency. This problem was alleviated by designing an optimization code specifically for use with numerically intensive simulations, to reduce the number of times the efficiency has to be calculated to achieve convergence to the optimal solution.

Girardini, K.↗
NASA NTRS1995

Developing Low-Noise GaAs JFETs For Cryogenic Operation

Report discusses aspects of effort to develop low-noise, low-gate-leakage gallium arsenide-based junction field-effect transistors (JFETs) for operation at temperature of about 4 K as readout amplifiers and multiplexing devices for infrared-imaging devices. Transistors needed to replace silicon transistors, relatively noisy at 4 K. Report briefly discusses basic physical principles of JFETs and describes continuing process of optimization of designs of GaAs JFETs for cryogenic operation.

Cunningham, Thomas J.↗
NASA NTRS1979

Silicon solar cell fabrication technology

The laser cell scanner was used to characterize a number of solar cells made in various materials. An electron beam-induced current (EBIC) study was performed using a stereoscan scanning electron microscope. Planar p-n junctions were analyzed. A theory for the EBIC based on the analytical solution of the ambipolar diffusion equation under the influence of electron beam excitation parameter z (which is related to beam penetration), the junction depth Z sub j, the beam current and the surface recombination, was formulated and tested. The effect of a grain boundary was studied.

Stafsudd, O. M.↗
NASA NTRS1972

Methods of measurement for semiconductor materials, process control, and devices

Significant accomplishments include development of a procedure to correct for the substantial differences of transistor delay time as measured with different instruments or with the same instrument at different frequencies; association of infrared response spectra of poor quality germanium gamma ray detectors with spectra of detectors fabricated from portions of a good crystal that had been degraded in known ways; and confirmation of the excellent quality and cosmetic appearance of ultrasonic bonds made with aluminum ribbon wire. Work is continuing on measurement of resistivity of semiconductor crystals; study of gold-doped silicon, development of the infrared response technique; evaluation of wire bonds and die attachment; and measurement of thermal properties of semiconductor devices, delay time and related carrier transport properties in junction devices, and noise properties of microwave diodes.

Bullis, W. M.↗