Search NASA⌕ Search

SEARCH · Search NASA

Results for “integrated circuit testing”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 343 records · Page 19
All sourcesNASA NTRSDOE OSTI
NASA NTRS2018

Evaluation of Space Radiation Effects on HgCdTe Avalanche Photodiode Arrays for Lidar Applications

We report the results from proton and gamma ray radiation testing of HgCdTe avalanche photodiode (APD) arrays developed by Leonardo DRS for space lidar detectors. We tested these devices with both approximately 60 MeV protons and gamma rays, with and without the read out integrated circuit (ROIC). We also measured the transient responses with the device fully powered and with the APD gain from unity to greater than 1000. The detectors produced a large current impulse in response to each proton hit but the response completely recovered within 1 microsecond. The devices started to have persistent damage at a proton fluence of 7e10 protons/cm2, equivalent to 10 krad(Si) total ionization dose. The dark current became much higher after the device was warmed to room temperature and cooled to 80K again, but it completely annealed after baking at 85 C for several hours. These results showed the HgCdTe APD arrays are suitable for use in space lidar for typical Earth orbiting and planetary missions provided that provisions are made to heat the detector chip to 85 C for several hours after radiation damage becomes evident that system performance is impacted.

Sun, Xiaoli↗
DOE OSTI2025

Medium Voltage Testbed for Comparing Advanced Power Line Sensors vs. Transformers with Electrical Grid Events

Electrical utilities have relied upon potential transformers (PTs) and current transformers (CTs) for very accurate metering and to provide reliable signals for protective relays. These devices measure phase voltages and currents and are commissioned by electrical engineers. PTs/CTs can detect and react to various electrical anomalies that could adversely affect electrical grid operations. Less expensive alternative sensing technologies offer the possibility of wider deployment, particularly in grids that employ distributed energy resources. In this work, the performance of an advanced medium-voltage sensor is compared with that of a reference PT and a CT and experimentally evaluated for different power grid scenarios on an advanced outdoor power line sensor testbed at the U.S. Department of Energy’s Oak Ridge National Laboratory. The sensor is based on a capacitive divider for voltage monitoring and a Rogowski coil with an integrator for current monitoring. This study simulated a power grid model based on a utility circuit at the Riverside EPB of Chattanooga. The simulation circuit was created with MATLAB/Simulink software and was integrated into an RT-LAB project to run with the OP4510 real-time simulator at the OPLST. During the tests, the real-time simulations were run for 40 s, and the signal to record the test event with the power meter was set at 30 s for the event-trigger circuit. The advanced outdoor power line sensor testbed has a real-time simulator that is used to generate transient scenarios (e.g., electrical faults, capacitor bank operation, and service restoration), while the analog signals are recorded by the same high-resolution power meter. The behaviors of analog signals, harmonic components, total harmonic distortion, and crest factors are assessed for this power line sensor and compared with those of the reference PT/CT because of the absence of testing standards for advanced outdoor power line sensors. The results showed that this OPLS technology responded identically to the PT and CT under all conditions.

Piesciorovsky, Emilio [ORNL]↗
NASA NTRS1991

Testing interconnected VLSI circuits in the Big Viterbi Decoder

The Big Viterbi Decoder (BVD) is a powerful error-correcting hardware device for the Deep Space Network (DSN), in support of the Galileo and Comet Rendezvous Asteroid Flyby (CRAF)/Cassini Missions. Recently, a prototype was completed and run successfully at 400,000 or more decoded bits per second. This prototype is a complex digital system whose core arithmetic unit consists of 256 identical very large scale integration (VLSI) gate-array chips, 16 on each of 16 identical boards which are connected through a 28-layer, printed-circuit backplane using 4416 wires. Special techniques were developed for debugging, testing, and locating faults inside individual chips, on boards, and within the entire decoder. The methods are based upon hierarchical structure in the decoder, and require that chips or boards be wired themselves as Viterbi decoders. The basic procedure consists of sending a small set of known, very noisy channel symbols through a decoder, and matching observables against values computed by a software simulation. Also, tests were devised for finding open and short-circuited wires which connect VLSI chips on the boards and through the backplane.

Onyszchuk, I. M.↗
NASA NTRS1992

Thermal verification testing of commercial printed-circuit boards for spaceflight

A method developed to verify commercial printed-circuit boards for a Shuttle orbital flight is discussed. The test sequence is based on early fault detection, desire to test the final assembly, and integration with other verification testing. A component thermal screening test is performed first to force flaws in design, workmanship, parts, processes, and materials into observable failures. Temperature definition and vibration tests are performed next. Final assembly testing is performed to simulate the Shuttle flight. An abbreviated thermal screening test is performed as a check after the vibration test, and then a complete thermal operational test is performed. The final assembly test finishes up with a burn-in of 100 h of trouble-free operation. Verification is successful when all components and final assemblies have passed each test. This method was very successful in verifying that commercial printed-circuit boards will survive in the Shuttle environment.

Foster, William M., II↗
NASA NTRS1992

A gallium-arsenide digital phase shifter for clock and control signal distribution in high-speed digital systems

The design, implementation, testing, and applications of a gallium-arsenide digital phase shifter and fan-out buffer are described. The integrated circuit provides a method for adjusting the phase of high-speed clock and control signals in digital systems, without the need for pruning cables, multiplexing between cables of different lengths, delay lines, or similar techniques. The phase of signals distributed with the described chip can be dynamically adjusted in eight different steps of approximately 60 ps per step. The IC also serves as a fan-out buffer and provides 12 in-phase outputs. The chip is useful for distributing high-speed clock and control signals in synchronous digital systems, especially if components are distributed over a large physical area or if there is a large number of components.

Fouts, Douglas J.↗
NASA NTRS2000

High-Speed Automated Tester for Vacuum Chamber Feedthrough Connectors and Cables

The Goddard Space Flight Center's thermal vacuum laboratory has developed a high-speed automated system for testing the integrity of 37-pin MIL-C-5015 cylindrical electrical feedthrough connectors used on penetration plates of thermal vacuum chambers. The system consists of a desktop PC driving a data acquisition front end. The latter measures the resistance through each pin of the connector and the resistance from each pin to all other pins and the connector shell. In addition to identifying unacceptable feedthroughs, the system is also used for testing cables. In the special case of Type T thermocouples (used almost exclusively at the lab), the difference in resistance between the copper and constantan wires provides positive proof of accidentally reversed connector wiring. Data acquisition time to completely test a cable or feedthrough connector is less than thirty seconds. The system provides a hardcopy printout of the resistance readings. Connectors or cables with fewer wires are tested using simple adapter cables. Initial tests indicate that the performance of a given feedthrough connector can be predicted on the basis of measured resistance readings, reducing ongoing cost of connector replacement. The opportunity to positively certify the integrity of cables, cable connectors and feedthroughs before the start of a thermal vacuum test minimizes the likelihood of a circuit problem that would require returning the chamber to ambient conditions for repair. This system has two principal advantages for the Goddard thermal vacuum laboratory. Its only significant cost was the labor to fabricate the test cable and shorting cable -- about 40 man-hours total. The system was built around a computer and data acquisition unit that were already on hand. The second advantage is that it very quickly tests both of the parameters that are essential.

Swope, Robert H.↗
NASA NTRS2007

Assessment of SOI Devices and Circuits at Extreme Temperatures

Electronics designed for use in future NASA space exploration missions are expected to encounter extreme temperatures and wide thermal swings. Such missions include planetary surface exploration, bases, rovers, landers, orbiters, and satellites. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of mission. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical devices, circuits, and systems suitable for applications in deep space exploration missions and aerospace environment. Silicon-On-Insulator (SOI) technology has been under active consideration in the electronics industry for many years due to the advantages that it can provide in integrated circuit (IC) chips and computer processors. Faster switching, less power, radiationtolerance, reduced leakage, and high temp-erature capability are some of the benefits that are offered by using SOI-based devices. A few SOI circuits are available commercially. However, there is a noticeable interest in SOI technology for different applications. Very little data, however, exist on the performance of such circuits under cryogenic temperatures. In this work, the performance of SOI integrated circuits, evaluated under low temperature and thermal cycling, are reported. In particular, three examples of SOI circuits that have been tested for operation at low at temperatures are given. These circuits are SOI operational amplifiers, timers and power MOSFET drivers. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these circuits for use in space exploration missions at cryogenic temperatures. The findings are useful to mission planners and circuit designers so that proper selection of electronic parts can be made, and risk assessment can be established for such circuits for use in space missions.

Elbuluk, Malik↗
NASA NTRS2016

Field Programmable Gate Aray (FPGA) Radiation Data: All Data is Not Equal

Electronic parts (integrated circuits) have grown in complexity such that determining all failure modes and risks based on single particle event radiation testing is impossible. In this presentation, the authors will present why this is so and provide some realism on what this means to FPGAs. Its all about understanding actual risks and not making assumptions.

radiation testing↗
DOE OSTI2023

Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis

Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics stems from piracy of intellectual properties (IP) and counterfeiting, which causes significant revenue loss to the semiconductor manufacturers. Further, these components often lead to compromised functionality, reliability, security, and safety of an electronic system. This paper presents secure information transmission and probing methods for verifying the integrity of digital integrated circuit (ICs) based on their electromagnetic (EM) near-field emissions and thereby protecting systems against counterfeit components. The proposed method has been tested on both high-level instructions executed by microprocessors or Systems-on-Chip (serving as examples of software), and also logic circuits within FPGA fabrics and ASICs (serving as examples of hardware). The authentication information required by each digital system is generated using a pseudo-random number generator circuit and securely transmitted via near-field magnetic emissions. The authorized party can probe these emissions using a near-field probe, process the acquired signals to improve the signal-to-noise ratio (SNR), and then recover the secure information through matched filtering. Experimental results from commercial SoCs are used to demonstrate the proposed technique. Methods for reducing EM interference during integrity verification of both FPGAs and ASICs are also described.

47 OTHER INSTRUMENTATION↗
NASA NTRS1999

On-Wafer Testing of Circuits Through 220 GHz

We have jointly developed the capability to perform on-wafer s-parameter and noise figure measurements through 220 GHz. S-parameter test sets have been developed covering full waveguide bands of 90-140 GHz (WR-08) and 140-220 GHz (WR-05). The test sets have been integrated with coplanar probes to allow accurate measurements on-wafer. We present the design and performance of the test sets and wafer probes. We also present calibration data as well as measurements of active circuits at frequencies as high as 215 GHz.

Gaier, Todd↗
NASA NTRS2018

Stirling Convertor Controller Development at NASA Glenn Research Center

For nearly two decades, NASA Glenn Research Center (GRC) has been supporting the development of Radioisotope Power Systems (RPS). NASA desires higher conversion efficiency RPS options that are reliable and robust with long life design. Dynamic conversion, such as Stirling and Brayton, offer the potential for higher conversion efficiencies than current RPS but have yet to be demonstrated in a flight application. The RPS program sent out a solicitation to investigate options for dynamic conversion technologies. As a result of this solicitation, four dynamic power convertor (DPC) technologies were selected for design and three are proceeding to the fabrication phase of prototype dynamic convertors. One lesson learned from the Advanced Stirling Radioisotope Generator (ASRG) project is that controller development should be coordinated with the development of a dynamic convertor. As a result of this, NASA GRC has been utilizing hardware from past Stirling convertor projects including that of the ASRG to support controller development for the DPC's. NASA GRC has developed a strong knowledge base on both analog and digital Stirling dynamic power convertor controllers and will continue to expand and apply that knowledge to the DPC's. Over the past 15 years, controllers were developed at GRC, at Lockheed Martin (LM) and by the Johns Hopkins University/Applied Physics Laboratory (JHU/APL). Various generations of the controllers have been developed as lessons were learned through various component and system level tests. Some of the tests performed were fault tolerance, flight acceptance vibration, electromagnetic interference (EMI), spacecraft integration, and extended operation. The fault tolerance test characterized the controller's ability to handle various fault conditions, including high or low bus power consumptions, total open load or short circuit, and replacing a failed controller card while the backup maintains control of the Stirling convertor. The vibration test confirms the controller's ability to control an ASC during launch. The EMI test characterized the AC and DC magnetic and electric fields emitted by the single ASC and if the controller has an impact on the radiated EMI. Spacecraft integration testing in the Radioisotope Power Systems System Integration Laboratory (RSIL) provided insight into the electrical interactions between the representative RPS, its associated control schemes, and realistic electric system loads. The extended operation test allows data to be collected over a period of thousands of hours to obtain long term performance data of the system. This paper describes the history of controller development at NASA GRC, tests performed on these controllers, and lessons learned.

Dugala, Gina M.↗
NASA NTRS2011

Cable Tester Box

Cables are very important electrical devices that carry power and signals across multiple instruments. Any fault in a cable can easily result in a catastrophic outcome. Therefore, verifying that all cables are built to spec is a very important part of Electrical Integration Procedures. Currently, there are two methods used in lab for verifying cable connectivity. (1) Using a Break-Out Box and an ohmmeter this method is time-consuming but effective for custom cables and (2) Commercial Automated Cable Tester Boxes this method is fast, but to test custom cables often requires pre-programmed configuration files, and cables used on spacecraft are often uniquely designed for specific purposes. The idea is to develop a semi-automatic continuity tester that reduces human effort in cable testing, speeds up the electrical integration process, and ensures system safety. The JPL-Cable Tester Box is developed to check every single possible electrical connection in a cable in parallel. This system indicates connectivity through LED (light emitting diode) circuits. Users can choose to test any pin/shell (test node) with a single push of a button, and any other nodes that are shorted to the test node, even if they are in the same connector, will light up with the test node. The JPL-Cable Tester Boxes offers the following advantages: 1. Easy to use: The architecture is simple enough that it only takes 5 minutes for anyone to learn how operate the Cable Tester Box. No pre-programming and calibration are required, since this box only checks continuity. 2. Fast: The cable tester box checks all the possible electrical connections in parallel at a push of a button. If a cable normally takes half an hour to test, using the Cable Tester Box will improve the speed to as little as 60 seconds to complete. 3. Versatile: Multiple cable tester boxes can be used together. As long as all the boxes share the same electrical potential, any number of connectors can be tested together.

Lee, Jason H.↗
DOE OSTI2022

Damage of prismatic lithium‐ion cells subject to bending: Test, model, and detection

Abstract The mechanically induced internal short circuit (ISC) is one of the major safety concerns of lithium‐ion batteries. Mechanical abuse tests are often performed to evaluate the integrity and safety of lithium‐ion batteries under mechanical loadings. Except for the widely explored compression‐dominated indentation tests, bending is another typical real‐world loading condition that is tension‐dominated. To investigate the mechanical damage and ISC behavior of batteries under bending, we carried out controlled three‐point bending tests in four progressive steps on prismatic battery cells with maximum deflections ranging from 38% to 76% of the cell thickness. None of the tested cells experienced an ISC. We then conducted 3D X‐ray computed tomography (CT) scanning on the bent cells after unloading. X‐ray CT images showed three out of the four tested cells have extensive cracking in the electrode layers at the bottom side (opposite to the loading head). This indicates that cracking does not necessarily lead to an ISC under bending. Electrochemical impedance spectroscopy was also measured on the bent cells and substantial changes were observed. Both the bulk resistance and charge‐transfer resistance increased significantly after bending, which could influence the battery performance and lifespan. We then developed a detailed finite (FE) element model to further investigate the mechanical deformation and failure mechanisms. The FE model successfully predicts the load–displacement response and reproduces the deformation patterns. The findings and the FE model developed in the present study provide useful insights and tools for the battery structure and crash safety design. image

25 ENERGY STORAGE↗
DOE OSTI2024

Eliminating Signal Bias Caused by Vacuum System Backstreaming in the Diagnostic Residual Gas Analyzer of ITER

In fusion neutral gas analysis, such as with the Diagnostic Residual Gas Analyzer (DRGA) for ITER, the primary measurement range of interest comprises the low-amu species (1 to 6), especially deuterium and helium. The challenge in successfully obtaining accurate measurements is two-fold. First, the sensitivity of the method must be sufficient to resolve trace amounts accurately; typically, one percent or less. Second, the gas signal from the fusion processes must be free of bias caused by the latent presence (from system outgassing and/or vacuum backstreaming) of these gases to enable accurate interpretation of the measured signal. This latter criterion can be problematic for the lightest gases since there is a propensity for some fraction of the pumped gas load to undergo a phenomenon known as backstreaming. This behavior is manifested in pumping systems for gas properties related to relative atomic weight (lightest) and size (smallest). Backstreaming results in a significant amount of the pumped gas undertaking a reverse flow and re-entering the measurement region; thus, contaminating the forward, real-time measurement. To fully eliminate this adverse effect, a conductance-limiting device – or orifice – has been installed in the high-vacuum pumping system of the present ITER DRGA prototype. The system was already equipped with a secondary turbomolecular pump (TMP), but with limited effectiveness against backstreaming in the inter-pump volume (IPV). This orifice is placed within the suction inlet coupling of the secondary TMP, which is downstream of the IPV. Its objective is to eliminate the backstreaming phenomenon by increasing the back pressure in the IPV. However, the orifice sizing must take into consideration other factors, such as the diagnostic measurement objectives. For example, in the ITER DRGA, one of the measurement requirements is a dynamic response time of ~1s. Fortunately, an added benefit of the pumping restriction created by the orifice is that the upstream pressure increase is beneficial for the DRGA’s optical gas analysis (OGA) sensors. These sensors are attached to the IPV in the present design. The glow discharges, when used as an OGA light source, will typically have a brighter light emission with increasing plasma cell pressure. In addition to the fusion machine research sector, there are other potential applications of this pumping technique where the monitoring of lighter gas concentrations is essential, such as the photolithography process for the semiconductor fabrication of integrated circuits. This presentation will describe the vacuum system used to demonstrate a process to eliminate backstreaming as well as show test results to verify the accomplishment of this critical objective.

Marcus, Chris↗
NASA NTRS1988

A software simulation study of the long constraint length VLSI Viterbi decoder

A software simulation of long constraint length Viterbi decoders was developed. This software closely follows the hardware architecture that was chosen for the Very Large Scale Integration implementation. The program is used to validate the design of the decoder and to generate test vectors for the VLSI circuits.

Arnold, S.↗
NASA NTRS2018

Stirling Convertor Controller Development at NASA Glenn Research Center

For nearly two decades, NASA Glenn Research Center has been supporting the development of radioisotope power systems (RPS). NASA desires higher conversion efficiency RPS options that are reliable and robust with long-life design. Dynamic conversion, such as Stirling and Brayton, offer the potential for higher conversion efficiencies than current RPS but have yet to be demonstrated in a flight application. The RPS program sent out a solicitation to investigate options for dynamic conversion technologies. As a result of this solicitation, four dynamic power convertor (DPC) technologies were selected for design and three are proceeding to the fabrication phase of prototype dynamic convertors. One lesson learned from the Advanced Stirling Radioisotope Generator (ASRG) project is that controller development should be coordinated with the development of a dynamic convertor. As a result of this, Glenn has been utilizing hardware from past Stirling convertor projects, including that of the ASRG, to support controller development for the DPCs. Glenn has developed a strong knowledge base on both analog and digital Stirling DPC controllers and will continue to expand and apply that knowledge to the DPCs. Over the past 15 years, controllers were developed at Glenn, at Lockheed Martin (LM), and by the Johns Hopkins University Applied Physics Laboratory (APL). Various generations of the controllers have been developed as lessons were learned through various component- and system-level tests. Some of the tests performed were fault tolerance, flight acceptance vibration, electromagnetic interference (EMI), spacecraft integration, and extended operation. The fault tolerance test characterized the controller’s ability to handle various fault conditions, including high or low bus power consumption, total open load or short circuit, and replacing a failed controller card while the backup maintains control of the Stirling convertor. The vibration test confirms the controller’s ability to control an Advanced Stirling Convertor (ASC) during launch. The EMI test characterized the alternating-current (AC) and direct-current (DC) magnetic and electric fields emitted by the single ASC and if the controller has an impact on the radiated EMI. Spacecraft integration testing in the Radioisotope Power Systems (RPS), System Integration Laboratory (RSIL) provided insight into the electrical interactions between the representative RPS, its associated control schemes, and realistic electric system loads. The extended operation test allows data to be collected over a period of thousands of hours to obtain long-term performance data of the system. This paper describes the history of controller development at Glenn, tests performed on these controllers, and lessons learned.

Dugala, Gina M.↗
NASA NTRS1973

Glass encapsulation provides extra protection for IC semiconductor devices

Oxide-passivated semiconductor chip is given protective glass coating by means of vapor deposition over metallic substrate of integrated circuit (IC). Method provides more reliable oxide-passivation and hermetic sealing in current use. Chips and scratches incurred during dicing, testing, and assembly are markedly reduced.

Doelp, W. L., Jr.↗
NASA NTRS1985

A dual frequency microstrip antenna for Ka band

For fixed satellite communication systems at Ka band with downlink at 17.7 to 20.2 GHz and uplink at 27.5 to 30.0 GHz, the focused optics and the unfocused optics configurations with monolithic phased array feeds have often been used to provide multiple fixed and multiple scanning spot beam coverages. It appears that a dual frequency microstrip antenna capable of transmitting and receiving simultaneously is highly desirable as an array feed element. This paper describes some early efforts on the development and experimental testing of a dual frequency annular microstrip antenna. The antenna has potential application for use in conjunction with a monolithic microwave integrated circuit device as an active radiating element in a phased array of phased array feeds. The antenna is designed to resonate at TM sub 12 and TM sub 13 modes and tuned with a circumferential microstrip ring to vary the frequency ratio. Radiation characteristics at both the high and low frequencies are examined. Experimental results including radiating patterns and swept frequency measurements are presented.

Lee, R. Q.↗