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A method for protecting the photovoltaic cells in a photovoltaic (PV) array from reverse bias damage by utilizing a rechargeable battery for bypassing current from a shaded photovoltaic cell or group of cells, avoiding the need for a bypass diode. Further, the method mitigates the voltage degradation of a PV array caused by shaded cells.
The objective of this work was to conduct a modeling study of SiC P-N junction diodes operating under high reverse biased conditions. Analytical models and numerical simulation capabilities were to be developed for self-consistent electro-thermal analysis of the diode current-voltage (I-V) characteristics. Data from GRC indicate that screw dislocations are unavoidable in large area SiC devices, and lead to changes in the SiC diode electrical response characteristics under high field conditions. For example, device instability and failures linked to internal current filamentation have been observed. The physical origin of these processes is not well understood, and quantitative projections of the electrical behavior under high field and temperature conditions are lacking. Thermal calculations for SiC devices have not been reported in the literature either. So estimates or projections of peak device temperatures and power limitations do not exist. This numerical study and simulation analysis was aimed at resolving some of the above issues. The following tasks were successfully accomplished: (1) Development of physically based models using one- and two-dimensional drift-diffusion theory for the transport behavior and I-V characteristics; (2) One- and two-dimensional heat flow to account for internal device heating. This led to calculations of the internal temperature profiles, which in turn, were used to update the electrical transport parameters for a self-consistent analysis. The temperature profiles and the peak values were thus obtainable for a given device operating condition; (3) Inclusion of traps assumed to model the presence of internal screw dislocations running along the longitudinal direction; (4) Predictions of the operating characteristics with and without heating as a function of applied bias with and without traps. Both one and two-dimensional cases were implemented; (5) Assessment of device stability based on the operating characteristics. The presence of internal non-uniformities, particularly filamentary structures, was probed and demonstrated; (6) Cause and physical origins of filamentary behavior and unstable I-V characteristics were made transparent; (7) It was demonstrated that diodes containing defects would be more prone to thermal breakdown associated with the temperature dependent decrease in the thermal conductivity; and (8) Finally, negative differential resistance (S-shaped NDR) which can potential lead to device instability and filamentary behavior was shown to occur for diodes containing a line of defects such as could be associated with a screw dislocation line.
This project improved the understanding of how electrochemical reactions cause degradation when perovskite solar cells are operated in reversed bias. Atomic layer deposition of
A cold cathode emitter of hot electrons for use as a source of electrons in vacuum gauges and mass spectrometers was developed using standard Norton electroluminescent silicon carbide p-n diodes operated under reverse bias conditions. Continued development including variations in the geometry of these emitters was carried out such that emitters with an emission efficiency (emitted current/junction current) as high as 3 x 10-0.00001 were obtained. Pulse measurements of the diode characteristics were made and showed that higher efficiency can be attained under pulse conditions probably due to the resulting lower temperatures resulting from such operation.
The power systems for use in NASA space missions must work reliably under harsh conditions including radiation, thermal cycling, and exposure to extreme temperatures. Gallium nitride semiconductors show great promise, but information pertaining to their performance is scarce. Gallium nitride N-channel enhancement-mode field effect transistors made by EPC Corporation in a 2nd generation of manufacturing were exposed to radiation followed by long-term thermal cycling and testing under high temperature reverse bias conditions in order to address their reliability for use in space missions. Result of the experimental work are presented and discussed.
Solar cell reverse current-voltage characteristics have been found to vary widely and to be generally unstable. At reverse voltages greater than approximately 20 V and at cell power dissipations of more than 4 W, the probability of permanent breakdown, resulting in cell short-circuit failure, was found to increase with increasing voltage and exposure time. Shorted cells showed evidence of cell contact material and silicon melting in very localized areas with lava-like flow patterns and channels bridging the p and n contacts.
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SiC-based high temperature power devices are being developed for aerospace systems which will require high reliability. One behavior crucial to power device reliability. To date, it has necessarily been assumed to date is that the breakdown behavior of SiC pn junctions will be similar to highly reliable silicon-based pn junctions. Challenging this assumption, we report the observation of anomalous unreliable reverse breakdown behavior in moderately doped (2-3 x 10(exp 17) cm(exp -3)) small-area 4H- and 6H-SiC pn junction diodes at temperatures ranging from 298 K (25 C) to 873 K (600 C). We propose a mechanism in which carrier emission from un-ionized dopants and deep level defects leads to this unstable behavior. The fundamental instability mechanism is applicable to all wide bandgap semiconductors whose dopants are significantly un-ionized at typical device operating temperatures.
Because of field experience (indicating that cell and module degradation could occur as a result of hot spot heating), a laboratory test was developed at JPL to determine hot spot susceptibility of modules. The initial hot spot testing work at JPL formed a foundation for the test development. Test parameters are selected as follows. For high shunt resistance cells, the applied back bias test current is set equal to the test cell current at maximum power. For low shunt resistance cells, the test current is set equal to the cell short circuit current. The shadow level is selected to conform to that which would lead to maximum back bias voltage under the appropriate test current level. The test voltage is determined by the bypass diode frequency. The test conditions are meant to simulate the thermal boundary conditions for 100 mW/sq cm, 40C ambient environment. The test lasts 100 hours. A key assumption made during the development of the test is that no current imbalance results from the connecting of multiparallel cell strings. Therefore, the test as originally developed was applicable for single string case only.
When a single solar cell of a series-connect string is placed in shadow, the entire array current is forced through that cell in reverse bias. Reverse bias current can lead to "hot-spot" heating, where the power produced by the unshadowed cells is dissipated as heat in the shadowed cell. Since occasional shadows are unavoidable in most applications, most solar arrays include shadow protection to prevent damage. In current practice, shadow protection is done with a "bypass diode" on each cell, to shunt the reverse bias current if a cell is shadowed. A new method of reverse bias protection is to use an Integral thin-film battery to provide voltage in the case of a shadowed cell. In this case, the shadowed cell continues to provide voltage during the transient shadow.
A method of testing a PIN diode for a power limiter circuit comprises measuring a reverse bias current of the PIN diode; applying a reverse bias voltage to the PIN diode; increasing the reverse bias voltage until the reverse bias current of the PIN diode reaches a threshold current indicative of a reverse voltage breakdown; and determining whether the reverse bias breakdown voltage of the PIN diode is within an acceptable range of reverse bias breakdown voltages corresponding to a power range at which the power limiter circuit would enter power limiting mode with the PIN diode.
A top-illuminated deep-ultraviolet Al 0.6 Ga 0.4 N p-i-n avalanche photodiode (APD) structure was designed and grown by metalorganic chemical vapor deposition on an AlN bulk substrate and on two different quality AlN/sapphire templates, and APDs were fabricated and tested. The APD devices with a circular diameter of 20 μm have demonstrated a distinctive reverse-bias breakdown behavior. The reverse breakdown voltage of the APDs is approximately -140 V, which corresponds to a breakdown electric field of 6–6.2 MV/cm for the Al 0.6 Ga 0.4 N material as estimated by Silvaco TCAD simulation. The APDs grown on the AlN bulk substrate show the lowest leakage current density of < 1 × 10 -8 A/cm 2 (at low reverse bias) compared to that of the devices grown on the AlN templates. From the photocurrent measurement, a maximum gain (current limited) of 1.2 × 10 4 is calculated. The average temperature coefficients of the breakdown voltage are negative for APD devices fabricated from both the AlN bulk substrate and the AlN templates, but these data show that the coefficient is the least negative for the APD devices grown on the low-dislocation-density AlN bulk substrate.
Commercial silicon heterojunction photovoltaic modules, known as amorphous-silicon-based heterojunction with intrinsic thin-film layer (HIT) modules, show average degradation after 10 years in the field. HIT modules weathered outdoors in Colorado and Florida display mostly uniform decreases in intensity when mapped with photoluminescence (PL) imaging compared to a control module. Flash-table-based current-voltage curves show that degradation is dominated by voltage loss. Samples are cored from each of the modules, and deep level transient spectroscopy (DLTS) detects three electron-trap defect states in all modules with activation energies of electron emission from the defects of 0.07, 0.16, and 0.50 eV. DLTS measurements on the weathered modules show an additional deep-level, electron-trap defect state with an activation energy of 0.51 eV and a trap density of approximately 10 12 cm –3 . The capture rate is measured using varying short filling pulse times, and the resulting capture cross section is estimated to be 1.1x10 –16 cm 2 . The development of the weathering-related defect level correlates to decreases in carrier lifetime, PL intensity, and module voltage. Various depths of the space charge region are probed with increments in applied reverse bias and filling-pulse bias. Furthermore, this DLTS depth profiling shows a trend of trap density increasing with less applied reverse bias, suggesting that the weathering-related defect increases carrier recombination toward the interface between the bulk silicon wafer and the junction-forming amorphous-silicon passivation layers.
Previous studies of reverse-bias stability in perovskite solar cells have focused primarily on voltage controlled reverse-bias tests. Here we instead present an investigation of perovskite solar cell degradation under well-defined, constant reverse-current stress. We show that the choice of hole-transport layer dictates the dominant degradation pathway: cells using thick poly(triphenylamine) (PTAA) layers with better indium-doped tin oxide (ITO) coverage can tolerate high reverse bias but quickly undergo catastrophic breakdown under fixed reverse current near their one-sun maximum power-point. In contrast, cells modified with the phosphonic-acid interface layer MeO-2PACz, with poorer ITO coverage compared to PTAA, exhibit soft, gradual, and largely recoverable degradation, regardless of the shading conditions. For MeO-2PACz devices, degradation increases with both current magnitude and duration. Importantly, when normalized by injected charge (current times duration), lower currents applied over longer times cause more severe degradation than higher currents over shorter periods. Combining electrical measurements with spatially resolved photoluminescence imaging, we argue against shunt formation and instead support an ion- and charge-mediated interfacial electrochemical degradation mode.
Radiation effects studies on a commercial beveled-edge avalanche photodiode (APD) showed that applying reverse bias to the device during irradiation enhanced the severity of apparent damage. Proton microbeam irradiations were made using a proton beam energy of 2 MeV and fluence ranging from 2.0 × 10 10 to 5.1 × 10 12 cm -2 . Charge collection measurements using the ion beam induced charge (IBIC) technique showed that relative losses increased by up to an order of magnitude when the reverse bias applied during irradiation increased from 50 to 1500 V. The presence of reverse bias also led to equivalent losses in charge collection that would only be seen in irradiations with an order of magnitude higher fluence in unbiased APDs. The results demonstrate that bias-enhanced irradiation damage is insufficiently understood and must be accounted for in characterizations of radiation effects.
Preliminary conclusions include: Limits for reverse currents cannot be set. Based on current data we want to avoid any reverse bias current. We know 1 micro-A is too high. Leakage current gets suppressed when operated at 120K. Migration and verification: a) Reverse Bias Voltage will be limited; b) Health check with I/V curve: 1) Minimal reverse voltage shall be x0.75 of the calculated voltage breakdown Vbr; 2) Degradation of the Reverse Bias voltage at given current will be used as indication of ESD incidents or other Damages (high RF power, heat); 3) Calculation of diodes parameter to verify initial health check result in forward direction. RF output power starts to degrade when diode I/V curve is very strongly degraded only. Experienced on 400GHz doubler and 200GHz doubler